71ba65e7c0
原始提交PR：https://gitee.com/rtthread/rt-thread/pulls/372 提交者：https://gitee.com/wei-handong ---------------------- 在TI公司C6000 DSP处理器上成功移植rt-thread操作系统；主要在libcpu/ti-dsp/c6x添加keystone架构底层代码，在bsp/ti-c6678添加bsp工程，该工程已在本人的开发板上成功运行 * 添加TMS320C6678处理器，keystone架构底层代码 * 添加支持中断栈部分代码，修改格式 * 修改汇编rt_hw_context_switch_to处关于时间槽的使用；修改格式 * 修改使用C语言构建任务栈帧，清除fls和ffs对<c6x.h>文件的依赖 * 修改bsp tms320c6678工程，并测试 * 删除依赖TI的KeyStone_common.c文件 * 添加编译说明 * update bsp/ti-tms320c6678/README.md. * format code Co-authored-by: Huang bo <hb265419@126.com> Co-authored-by: hdwei <1147479335@qq.com> Co-authored-by: bernard <bernard.xiong@gmail.com> Co-authored-by: rtthread-bot <48120998+rtthread-bot@users.noreply.github.com> Co-authored-by: Meco Man <920369182@qq.com>
99 lines
3.0 KiB
C
99 lines
3.0 KiB
C
/*
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* Copyright (c) 2021, Shenzhen Academy of Aerospace Technology
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-11-16 Dystopia the first version
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*/
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#ifndef __C66XX_H__
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#define __C66XX_H__
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extern __cregister volatile unsigned int IERR; /* Internal Exception Report Register */
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extern __cregister volatile unsigned int ECR; /* Exception Clear Register */
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extern __cregister volatile unsigned int EFR; /* Exception Flag Register */
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extern __cregister volatile unsigned int TSR; /* Task State Register */
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extern __cregister volatile unsigned int ITSR; /* Interrupt Task State Register */
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extern __cregister volatile unsigned int NTSR; /* NMI/exception Task State Register */
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extern __cregister volatile unsigned int TSCL; /* Time Stamp Counter Register - Low Half */
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extern __cregister volatile unsigned int TSCH; /* Time Stamp Counter Register - High Half */
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extern __cregister volatile unsigned int DNUM; /* Core number */
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extern __cregister volatile unsigned int AMR;
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extern __cregister volatile unsigned int CSR;
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extern __cregister volatile unsigned int IFR;
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extern __cregister volatile unsigned int ISR;
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extern __cregister volatile unsigned int ICR;
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extern __cregister volatile unsigned int IER;
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extern __cregister volatile unsigned int ISTP;
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extern __cregister volatile unsigned int IRP;
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extern __cregister volatile unsigned int NRP;
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#ifdef _BIG_ENDIAN
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#define RT_REG_PAIR(odd, even) unsigned long odd; unsigned long even
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#else
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#define RT_REG_PAIR(odd, even) unsigned long even; unsigned long odd
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#endif
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struct rt_hw_register
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{
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RT_REG_PAIR(b17, b16);
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RT_REG_PAIR(b19, b18);
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RT_REG_PAIR(b21, b20);
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RT_REG_PAIR(b23, b22);
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RT_REG_PAIR(b25, b24);
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RT_REG_PAIR(b27, b26);
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RT_REG_PAIR(b29, b28);
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RT_REG_PAIR(b31, b30);
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RT_REG_PAIR(b1, b0);
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RT_REG_PAIR(b3, b2);
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RT_REG_PAIR(b5, b4);
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RT_REG_PAIR(b7, b6);
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RT_REG_PAIR(b9, b8);
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RT_REG_PAIR(b11, b10);
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RT_REG_PAIR(b13, b12);
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RT_REG_PAIR(a17, a16);
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RT_REG_PAIR(a19, a18);
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RT_REG_PAIR(a21, a20);
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RT_REG_PAIR(a23, a22);
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RT_REG_PAIR(a25, a24);
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RT_REG_PAIR(a27, a26);
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RT_REG_PAIR(a29, a28);
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RT_REG_PAIR(a31, a30);
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RT_REG_PAIR(a1, a0);
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RT_REG_PAIR(a3, a2);
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RT_REG_PAIR(a5, a4);
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RT_REG_PAIR(a7, a6);
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RT_REG_PAIR(a9, a8);
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RT_REG_PAIR(a11, a10);
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RT_REG_PAIR(a13, a12);
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RT_REG_PAIR(a15, a14);
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RT_REG_PAIR(sp, dp);
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};
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typedef struct rt_hw_exp_stack_register
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{
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RT_REG_PAIR(tsr, orig_a4);
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RT_REG_PAIR(rilc, ilc);
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RT_REG_PAIR(pc, csr);
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struct rt_hw_register hw_register;
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} rt_hw_thread_stack_register;
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#define __dint() asm(" DINT")
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#define __rint() asm(" RINT")
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#define __system_call() asm(" SWE")
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#define __enter_idle() asm(" IDLE")
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#define __nop() asm(" NOP")
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#define __mfence() asm(" MFENCE")
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#define __SYSREG(ADDR, TYPE) (*(volatile TYPE*)(ADDR))
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#define __SYSREGA(ADDR, TYPE) ((volatile TYPE*)(ADDR))
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#endif /* __C66XX_H__ */
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