18a14cc935
* [syscall] move sys_cacheflush to lwp_syscall.c * [syscall] improve assertion * [format] rename to rt_ctassert * [debug] modified ct assertion on mm_page.c
109 lines
3.1 KiB
C
109 lines
3.1 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-11-05 JasonHu The first version
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*/
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#ifndef CACHE_H__
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#define CACHE_H__
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#include "opcode.h"
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#ifndef ALWAYS_INLINE
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#define ALWAYS_INLINE inline __attribute__((always_inline))
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#endif
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#define rt_hw_cpu_sync() __asm__ volatile(OPC_SYNC:: \
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: "memory")
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#define rt_hw_cpu_sync_i() __asm__ volatile(OPC_SYNC_I:: \
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: "memory");
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/**
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* ========================================
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* Local cpu cache maintainence operations
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* ========================================
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*/
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void rt_hw_cpu_dcache_clean_local(void *addr, int size);
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void rt_hw_cpu_dcache_invalidate_local(void *addr, int size);
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void rt_hw_cpu_dcache_clean_and_invalidate_local(void *addr, int size);
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void rt_hw_cpu_icache_invalidate_local(void *addr, int size);
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ALWAYS_INLINE void rt_hw_cpu_dcache_clean_all_local(void)
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{
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__asm__ volatile(OPC_DCACHE_CALL ::
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: "memory");
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rt_hw_cpu_sync();
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}
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ALWAYS_INLINE void rt_hw_cpu_dcache_invalidate_all_local(void)
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{
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__asm__ volatile(OPC_DCACHE_IALL ::
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: "memory");
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rt_hw_cpu_sync();
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}
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ALWAYS_INLINE void rt_hw_cpu_dcache_clean_and_invalidate_all_local(void)
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{
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__asm__ volatile(OPC_DCACHE_CIALL ::
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: "memory");
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rt_hw_cpu_sync();
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}
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ALWAYS_INLINE void rt_hw_cpu_icache_invalidate_all_local(void)
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{
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__asm__ volatile(OPC_ICACHE_IALL ::
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: "memory");
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rt_hw_cpu_sync_i();
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}
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#define rt_hw_icache_invalidate_all rt_hw_cpu_icache_invalidate_all
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/**
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* ========================================
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* Multi-core cache maintainence operations
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* ========================================
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*/
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#ifdef RT_USING_SMP
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#error "TODO: cache maintainence have not ported to RISC-V SMP yet"
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void rt_hw_cpu_dcache_clean(void *addr, int size);
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void rt_hw_cpu_dcache_invalidate(void *addr, int size);
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void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, int size);
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void rt_hw_cpu_dcache_clean_all(void);
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void rt_hw_cpu_dcache_invalidate_all(void);
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void rt_hw_cpu_dcache_clean_and_invalidate_all(void);
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void rt_hw_cpu_icache_invalidate(void *addr, int size);
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void rt_hw_cpu_icache_invalidate_all(void);
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#else /* !RT_USING_SMP */
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#define rt_hw_cpu_dcache_clean rt_hw_cpu_dcache_clean_local
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#define rt_hw_cpu_dcache_invalidate rt_hw_cpu_dcache_invalidate_local
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#define rt_hw_cpu_dcache_clean_and_invalidate rt_hw_cpu_dcache_clean_and_invalidate_local
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#define rt_hw_cpu_dcache_clean_all rt_hw_cpu_dcache_clean_all_local
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#define rt_hw_cpu_dcache_invalidate_all rt_hw_cpu_dcache_invalidate_all_local
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#define rt_hw_cpu_dcache_clean_and_invalidate_all rt_hw_cpu_dcache_clean_and_invalidate_all_local
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#define rt_hw_cpu_icache_invalidate rt_hw_cpu_icache_invalidate_local
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#define rt_hw_cpu_icache_invalidate_all rt_hw_cpu_icache_invalidate_all_local
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#endif /* RT_USING_SMP */
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/**
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* @brief Synchronize cache to Point of Coherent
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*/
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void rt_hw_sync_cache_local(void *addr, int size);
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#endif /* CACHE_H__ */
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