242 lines
11 KiB
C
242 lines
11 KiB
C
/*
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-10-30 CDT first version
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*/
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#ifndef __DRV_PULSE_ENCODER_H__
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#define __DRV_PULSE_ENCODER_H__
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#include <rtthread.h>
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#include "board_config.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef BSP_USING_PULSE_ENCODER1
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#ifndef PULSE_ENCODER1_OVF_IRQ_CONFIG
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#define PULSE_ENCODER1_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER1_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER1_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER1_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER1_UDF_IRQ_CONFIG
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#define PULSE_ENCODER1_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER1_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER1_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER1_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER1 */
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#ifdef BSP_USING_PULSE_ENCODER2
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#ifndef PULSE_ENCODER2_OVF_IRQ_CONFIG
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#define PULSE_ENCODER2_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER2_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER2_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER2_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER2_UDF_IRQ_CONFIG
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#define PULSE_ENCODER2_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER2_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER2_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER2_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER2 */
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#ifdef BSP_USING_PULSE_ENCODER3
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#ifndef PULSE_ENCODER3_OVF_IRQ_CONFIG
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#define PULSE_ENCODER3_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER3_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER3_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER3_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER3_UDF_IRQ_CONFIG
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#define PULSE_ENCODER3_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER3_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER3_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER3_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER3 */
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#ifdef BSP_USING_PULSE_ENCODER4
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#ifndef PULSE_ENCODER4_OVF_IRQ_CONFIG
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#define PULSE_ENCODER4_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER4_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER4_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER4_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER4_UDF_IRQ_CONFIG
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#define PULSE_ENCODER4_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER4_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER4_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER4_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER4 */
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#ifdef BSP_USING_PULSE_ENCODER5
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#ifndef PULSE_ENCODER5_OVF_IRQ_CONFIG
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#define PULSE_ENCODER5_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER5_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER5_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER5_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER5_UDF_IRQ_CONFIG
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#define PULSE_ENCODER5_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER5_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER5_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER5_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER5 */
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#ifdef BSP_USING_PULSE_ENCODER6
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#ifndef PULSE_ENCODER6_OVF_IRQ_CONFIG
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#define PULSE_ENCODER6_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER6_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER6_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER6_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER6_UDF_IRQ_CONFIG
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#define PULSE_ENCODER6_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER6_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER6_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER6_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER6 */
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#ifdef BSP_USING_PULSE_ENCODER7
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#ifndef PULSE_ENCODER7_OVF_IRQ_CONFIG
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#define PULSE_ENCODER7_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER7_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER7_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER7_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER7_UDF_IRQ_CONFIG
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#define PULSE_ENCODER7_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER7_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER7_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER7_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER7 */
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#ifdef BSP_USING_PULSE_ENCODER8
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#ifndef PULSE_ENCODER8_OVF_IRQ_CONFIG
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#define PULSE_ENCODER8_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER8_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER8_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER8_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER8_UDF_IRQ_CONFIG
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#define PULSE_ENCODER8_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER8_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER8_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER8_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER8 */
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#ifdef BSP_USING_PULSE_ENCODER9
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#ifndef PULSE_ENCODER9_OVF_IRQ_CONFIG
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#define PULSE_ENCODER9_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER9_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER9_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER9_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER9_UDF_IRQ_CONFIG
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#define PULSE_ENCODER9_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER9_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER9_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER9_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER9 */
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#ifdef BSP_USING_PULSE_ENCODER10
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#ifndef PULSE_ENCODER10_OVF_IRQ_CONFIG
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#define PULSE_ENCODER10_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER10_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER10_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER10_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER10_UDF_IRQ_CONFIG
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#define PULSE_ENCODER10_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER10_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER10_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER10_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER10 */
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#ifdef BSP_USING_PULSE_ENCODER11
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#ifndef PULSE_ENCODER11_OVF_IRQ_CONFIG
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#define PULSE_ENCODER11_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER11_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER11_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER11_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER11_UDF_IRQ_CONFIG
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#define PULSE_ENCODER11_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER11_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER11_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER11_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER11 */
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#ifdef BSP_USING_PULSE_ENCODER12
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#ifndef PULSE_ENCODER12_OVF_IRQ_CONFIG
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#define PULSE_ENCODER12_OVF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER12_OVF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER12_OVF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER12_OVF_IRQ_CONFIG */
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#ifndef PULSE_ENCODER12_UDF_IRQ_CONFIG
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#define PULSE_ENCODER12_UDF_IRQ_CONFIG \
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{ \
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.irq = PULSE_ENCODER12_UNF_INT_IRQn, \
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.irq_prio = PULSE_ENCODER12_UNF_INT_PRIO, \
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}
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#endif /* PULSE_ENCODER12_UDF_IRQ_CONFIG */
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#endif /* BSP_USING_PULSE_ENCODER12 */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DRV_PULSE_ENCODER_H__ */
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