f51bce3fed
We currently only support building with CCS and SCons is not using.
bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file.
You may need to regenerate the source file as you like, providing that:
1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The
channel 5 in enabled and connected to IRQ.
2, RTI driver is enabled and compare3 source is selected to counter1
and the compare3 will generate tick in the period of 10ms. This
value is coresponding with RT_TICK_PER_SECOND in rtconfig.h.
In CCS, you need to create a new CCS project and create link folders
pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember
to add the include path to the Build Properties.
116 lines
2.1 KiB
C
116 lines
2.1 KiB
C
/*
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* File : startup.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006-2013, RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2008-12-11 xuxinming first version
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* 2010-4-3 LiJin add init soft timer thread
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* 2013-05-24 Grissiom port to RM48x50
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#ifdef RT_USING_FINSH
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#include <finsh.h>
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extern void finsh_system_init(void);
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#endif
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#include <board.h>
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/**
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* @addtogroup LPC2478
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*/
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/*@{*/
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extern int rt_application_init(void);
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#ifdef RT_USING_DEVICE
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extern rt_err_t rt_hw_serial_init(void);
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#endif
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#elif defined(__GNUC__)
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extern int __bss_end;
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#else
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extern unsigned char *__TI_DATA_Limit;
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#endif
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#define MEMEND 0x08040000
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/**
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* This function will startup RT-Thread RTOS.
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*/
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void rtthread_startup(void)
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{
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/* init hardware interrupt */
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rt_hw_interrupt_init();
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/* init board */
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rt_hw_board_init();
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/* init tick */
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rt_system_tick_init();
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/* init kernel object */
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rt_system_object_init();
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rt_show_version();
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/* init timer system */
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rt_system_timer_init();
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/* init memory system */
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#ifdef RT_USING_HEAP
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#ifdef __CC_ARM
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rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)MEMEND);
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#elif defined(__GNUC__)
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rt_system_heap_init((void*)&__bss_end, (void*)MEMEND);
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#else
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rt_system_heap_init((void*)&__TI_DATA_Limit, (void*)MEMEND);
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#endif
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#endif
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/* init scheduler system */
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rt_system_scheduler_init();
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/* init application */
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rt_application_init();
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#ifdef RT_USING_FINSH
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/* init finsh */
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finsh_system_init();
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finsh_set_device("uart1");
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#endif
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/* init soft timer thread */
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rt_system_timer_thread_init();
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/* init idle thread */
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rt_thread_idle_init();
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/* start scheduler */
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rt_system_scheduler_start();
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/* never reach here */
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return ;
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}
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int main(void)
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{
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/* disable interrupt first */
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rt_hw_interrupt_disable();
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/* invoke rtthread_startup */
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rtthread_startup();
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return 0;
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}
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/*@}*/
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