406 lines
11 KiB
C
406 lines
11 KiB
C
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-11-16 bluebear233 first version
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*/
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#include <rtconfig.h>
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#include <rtdevice.h>
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#include <drv_uart.h>
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#include "NuMicro.h"
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/* Private Define ---------------------------------------------------------------*/
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#define USEING_UART0 //Tx:PB13 Rx:PB12
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/* Private Typedef --------------------------------------------------------------*/
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struct usart
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{
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rt_serial_t dev;
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UART_T *usart_base;
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};
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typedef struct usart* usart_t;
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/* Private functions ------------------------------------------------------------*/
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static rt_err_t usart_gpio_configure(struct rt_serial_device *serial);
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static rt_err_t usart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
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static rt_err_t usart_control(struct rt_serial_device *serial, int cmd, void *arg);
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static int usart_send(struct rt_serial_device *serial, char c);
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static int usart_receive(struct rt_serial_device *serial);
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static void rt_hw_uart_register(usart_t uart, UART_T *uart_base,
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char *name);
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static void uart_isr(usart_t serial);
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/* Private Variables ------------------------------------------------------------*/
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static const struct rt_uart_ops m487_uart_ops =
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{ usart_configure, usart_control, usart_send, usart_receive,
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RT_NULL };
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static const struct serial_configure m487_uart_default_config =
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RT_SERIAL_CONFIG_DEFAULT;
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#ifdef USEING_UART0
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struct usart uart0;
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#endif
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/* Interrupt Handle Funtion ----------------------------------------------------*/
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#ifdef USEING_UART0
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/* 串口0 中断入口 */
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void UART0_IRQHandler(void)
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{
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uart_isr(&uart0);
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}
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#endif
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/**
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* 中断处理函数
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*/
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static void uart_isr(usart_t serial)
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{
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// 获取串口基地址
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UART_T *uart_base = ((usart_t)serial)->usart_base;
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// 获取中断事件
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uint32_t u32IntSts= uart_base->INTSTS;
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// 接收中断
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if(u32IntSts & (UART_INTSTS_RDAINT_Msk | UART_INTSTS_RXTOINT_Msk))
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{
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rt_hw_serial_isr(&serial->dev, RT_SERIAL_EVENT_RX_IND);
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}
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}
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/**
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* 串口端口配置
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*/
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static rt_err_t usart_gpio_configure(struct rt_serial_device *serial)
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{
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// 获取串口基地址
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UART_T *uart_base = ((usart_t)serial)->usart_base;
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switch((uint32_t)uart_base)
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{
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case UART0_BASE:
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SYS->GPB_MFPH &= ~(SYS_GPB_MFPH_PB12MFP_Msk | SYS_GPB_MFPH_PB13MFP_Msk);
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SYS->GPB_MFPH |= (SYS_GPB_MFPH_PB12MFP_UART0_RXD | SYS_GPB_MFPH_PB13MFP_UART0_TXD);
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break;
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default:
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rt_kprintf("unknow uart module\n");
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RT_ASSERT(0);
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}
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return RT_EOK;
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}
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/**
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* 串口配置
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*/
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static rt_err_t usart_configure(struct rt_serial_device *serial,
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struct serial_configure *cfg)
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{
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// 获取串口基地址
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UART_T *uart_base = ((usart_t)serial)->usart_base;
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uint32_t uart_module = 0;
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uint32_t uart_word_len = 0;
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uint32_t uart_stop_bit = 0;
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uint32_t uart_parity = 0;
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IRQn_Type uart_irq_channel = 0;
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switch((uint32_t)uart_base)
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{
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case UART0_BASE:
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uart_module = UART0_MODULE;
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uart_irq_channel = UART0_IRQn;
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break;
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default:
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rt_kprintf("unknow uart module\n");
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RT_ASSERT(0);
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}
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/* Enable IP clock */
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CLK_EnableModuleClock(uart_module);
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/* Select IP clock source */
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CLK_SetModuleClock(uart_module, CLK_CLKSEL1_UART0SEL_HXT, CLK_CLKDIV0_UART0(1));
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/* check baudrate */
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RT_ASSERT(cfg->baud_rate != 0);
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/* check word len */
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switch(cfg->data_bits)
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{
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case DATA_BITS_5:
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uart_word_len = UART_WORD_LEN_5;
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break;
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case DATA_BITS_6:
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uart_word_len = UART_WORD_LEN_6;
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break;
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case DATA_BITS_7:
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uart_word_len = UART_WORD_LEN_7;
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break;
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case DATA_BITS_8:
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uart_word_len = UART_WORD_LEN_8;
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break;
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default:
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rt_kprintf("unsupose data len");
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RT_ASSERT(0);
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}
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/* check stop bit */
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switch(cfg->stop_bits)
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{
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case STOP_BITS_1:
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uart_stop_bit = UART_STOP_BIT_1;
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break;
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case STOP_BITS_2:
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uart_stop_bit = UART_STOP_BIT_2;
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break;
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default:
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rt_kprintf("unsupose stop bit");
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RT_ASSERT(0);
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}
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/* check stop bit */
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switch(cfg->parity)
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{
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case PARITY_NONE:
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uart_parity = UART_PARITY_NONE;
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break;
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case PARITY_ODD:
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uart_parity = UART_PARITY_ODD;
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break;
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case PARITY_EVEN:
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uart_parity = UART_PARITY_EVEN;
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break;
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default:
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rt_kprintf("unsupose parity");
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RT_ASSERT(0);
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}
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/* Open uart */
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{
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uint32_t u32UartClkSrcSel=0ul, u32UartClkDivNum=0ul;
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uint32_t u32ClkTbl[4] = {__HXT, 0ul, __LXT, __HIRC};
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uint32_t u32Baud_Div = 0ul;
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if(uart_base == (UART_T*)UART0 )
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{
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/* Get UART clock source selection */
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u32UartClkSrcSel = ((uint32_t)(CLK->CLKSEL1 & CLK_CLKSEL1_UART0SEL_Msk)) >> CLK_CLKSEL1_UART0SEL_Pos;
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/* Get UART clock divider number */
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u32UartClkDivNum = (CLK->CLKDIV0 & CLK_CLKDIV0_UART0DIV_Msk) >> CLK_CLKDIV0_UART0DIV_Pos;
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}
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else if(uart_base == (UART_T*)UART1 )
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{
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/* Get UART clock source selection */
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u32UartClkSrcSel = (CLK->CLKSEL1 & CLK_CLKSEL1_UART1SEL_Msk) >> CLK_CLKSEL1_UART1SEL_Pos;
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/* Get UART clock divider number */
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u32UartClkDivNum = (CLK->CLKDIV0 & CLK_CLKDIV0_UART1DIV_Msk) >> CLK_CLKDIV0_UART1DIV_Pos;
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}
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else if(uart_base == (UART_T*)UART2 )
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{
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/* Get UART clock source selection */
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u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos;
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/* Get UART clock divider number */
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u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART2DIV_Msk) >> CLK_CLKDIV4_UART2DIV_Pos;
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}
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else if(uart_base == (UART_T*)UART3 )
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{
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/* Get UART clock source selection */
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u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos;
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/* Get UART clock divider number */
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u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART3DIV_Msk) >> CLK_CLKDIV4_UART3DIV_Pos;
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}
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else if(uart_base == (UART_T*)UART4 )
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{
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/* Get UART clock source selection */
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u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART4SEL_Msk) >> CLK_CLKSEL3_UART4SEL_Pos;
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/* Get UART clock divider number */
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u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART4DIV_Msk) >> CLK_CLKDIV4_UART4DIV_Pos;
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}
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else if(uart_base == (UART_T*)UART5 )
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{
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/* Get UART clock source selection */
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u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos;
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/* Get UART clock divider number */
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u32UartClkDivNum = (CLK->CLKDIV4 & CLK_CLKDIV4_UART5DIV_Msk) >> CLK_CLKDIV4_UART5DIV_Pos;
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}
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/* Select UART function */
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uart_base->FUNCSEL = UART_FUNCSEL_UART;
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/* Set UART line configuration */
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uart_base->LINE = uart_word_len | uart_stop_bit | uart_parity;
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/* Set UART Rx and RTS trigger level */
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uart_base->FIFO &= ~(UART_FIFO_RFITL_Msk | UART_FIFO_RTSTRGLV_Msk);
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/* Get PLL clock frequency if UART clock source selection is PLL */
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if(u32UartClkSrcSel == 1ul)
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{
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u32ClkTbl[u32UartClkSrcSel] = CLK_GetPLLClockFreq();
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}
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/* Set UART baud rate */
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if(cfg->baud_rate != 0ul)
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{
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u32Baud_Div = UART_BAUD_MODE2_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), cfg->baud_rate);
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if(u32Baud_Div > 0xFFFFul)
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{
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uart_base->BAUD = (UART_BAUD_MODE0 | UART_BAUD_MODE0_DIVIDER((u32ClkTbl[u32UartClkSrcSel]) / (u32UartClkDivNum + 1ul), cfg->baud_rate));
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}
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else
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{
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uart_base->BAUD = (UART_BAUD_MODE2 | u32Baud_Div);
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}
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}
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}
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/* config nvic */
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NVIC_EnableIRQ(uart_irq_channel);
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/* config gpio */
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usart_gpio_configure(serial);
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return RT_EOK;
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}
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/**
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* 串口中断控制
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*/
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static rt_err_t usart_control(struct rt_serial_device *serial,
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int cmd, void *arg)
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{
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rt_err_t result = RT_EOK;
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rt_uint32_t flag;
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// 获取串口基地址
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UART_T *uart_base = ((usart_t)serial)->usart_base;
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switch ((uint32_t) arg)
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{
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case RT_DEVICE_FLAG_INT_RX:
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flag = UART_INTEN_RDAIEN_Msk | UART_INTEN_RXTOIEN_Msk | UART_INTEN_TOCNTEN_Msk;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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UART_DISABLE_INT(uart_base, flag);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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UART_ENABLE_INT(uart_base, flag);
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break;
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default:
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RT_ASSERT(0);
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}
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break;
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// TODO 完善DMA接口
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// case RT_DEVICE_FLAG_DMA_TX:
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// USART_DMACmd(dev->usart_base, USART_DMAReq_Tx, ENABLE);
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// stm32_uart_tx_dma_configure(dev, RT_TRUE);
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// stm32_uart_tx_dma_nvic(dev, RT_TRUE);
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// break;
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default:
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RT_ASSERT(0)
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;
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}
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return result;
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}
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/**
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* 串口发送函数
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*/
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static int usart_send(struct rt_serial_device *serial, char c)
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{
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// 获取串口基地址
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UART_T *uart_base = ((usart_t)serial)->usart_base;
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// 等待FIFO 发送
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while(uart_base->FIFOSTS & UART_FIFOSTS_TXFULL_Msk);
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// 发送字符
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uart_base->DAT = c;
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return 1;
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}
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/**
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* 串口接收函数
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*/
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static int usart_receive(struct rt_serial_device *serial)
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{
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// 获取串口基地址
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UART_T *uart_base = ((usart_t)serial)->usart_base;
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// 如果FIFO 为空返回
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if(uart_base->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
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{
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return -1;
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}
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return UART_READ(uart_base);
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}
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/**
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* @brief 串口设备注册
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* @param uart : UART设备结构体
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* @param uart_base : STM32 UART外设基地址
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* @param name : STM32 UART设备名
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* @param tx_dma_channel : STM32 UART TX的DMA通道基地址(可选)
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*/
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static void rt_hw_uart_register(usart_t usart, UART_T * uart_base, char *name)
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{
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rt_uint32_t flag;
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RT_ASSERT(usart != RT_NULL);
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RT_ASSERT(uart_base != RT_NULL);
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// 没有定义对应的硬件I2C
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if (!(uart_base == UART0 || uart_base == UART1 || uart_base == UART2
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|| uart_base == UART3 || uart_base == UART4 || uart_base == UART5))
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{
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RT_ASSERT(0);
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}
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usart->usart_base = uart_base;
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usart->dev.ops = &m487_uart_ops;
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usart->dev.config = m487_uart_default_config;
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flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
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rt_hw_serial_register(&usart->dev, name,
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flag, RT_NULL);
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}
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/**
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* 硬件串口注册
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*/
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int rt_hw_uart_init(void)
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{
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#ifdef USEING_UART0
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rt_hw_uart_register(&uart0, UART0, "uart0");
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#endif
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return 0;
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}
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