42 lines
781 B
C
42 lines
781 B
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2015-01-07 Grissiom init commit
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*/
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#ifndef __VBUS_HW_H__
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#define __VBUS_HW_H__
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#include <rtthread.h>
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#include <stddef.h>
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#include <gic.h>
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rt_inline void rt_vbus_tick(unsigned int target_cpu, unsigned int irqnr)
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{
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arm_gic_trigger(0, 1, irqnr);
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}
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/* Read memory barrier. */
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rt_inline void rt_vbus_smp_rmb(void)
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{
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asm volatile ("dsb" : : : "memory");
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}
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/* Write memory barrier. */
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rt_inline void rt_vbus_smp_wmb(void)
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{
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asm volatile ("dsb" : : : "memory");
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}
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/* General memory barrier. */
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rt_inline void rt_vbus_smp_mb(void)
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{
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asm volatile ("dsb" : : : "memory");
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}
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#endif /* __VBUS_HW_H__ */
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