260 lines
10 KiB
C
260 lines
10 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fgmac.h
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* Date: 2022-04-06 14:46:52
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* LastEditTime: 2022-04-06 14:46:58
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* Description: This file is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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*/
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#ifndef DRIVERS_ETH_FGMAC_H
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#define DRIVERS_ETH_FGMAC_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/***************************** Include Files *********************************/
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#include "ftypes.h"
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#include "fassert.h"
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#include "ferror_code.h"
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#include "fkernel.h"
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#define FGMAC_PHY_MAX_NUM 32U
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/************************** Constant Definitions *****************************/
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#define FGMAC_SUCCESS FT_SUCCESS
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#define FGMAC_ERR_TIMEOUT FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 1)
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#define FGMAC_ERR_INVALID_DMA_MEM FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 2)
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#define FGMAC_ERR_NOT_READY FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 3)
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#define FGMAC_ERR_TRANS_FAILED FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 4)
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#define FGMAC_ERR_PHY_NOT_SUPPORT FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 5)
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#define FGMAC_ERR_PHY_IS_NOT_FOUND FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 6)
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#define FGMAC_ERR_FAILED FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 7)
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#define FGMAC_ERR_PHY_AUTO_FAILED FT_MAKE_ERRCODE(ErrModBsp, ErrBspEth, 8)
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#define FGMAC_ERR_CODE_PREFIX FGMAC_ERR_TIMEOUT & (FT_ERRCODE_SYS_MODULE_MASK | FT_ERRCODE_SUB_MODULE_MASK)
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#define FGMAC_NUM_OF_ERR_CODE 5
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/********发送描述符********/
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/* TDES0 包含发送的帧状态和描述符所有权信息 */
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#define FGMAC_DMA_TDES0_DEFERRED BIT(0)
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#define FGMAC_DMA_TDES0_UNDERFLOW_ERROR BIT(1)
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#define FGMAC_DMA_TDES0_EXCESSIVE_DEFERRAL BIT(2)
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#define FGMAC_DMA_TDES0_COLLISION_COUNT_MASK GENMASK(6, 3)
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#define FGMAC_DMA_TDES0_VLAN_FRAME BIT(7)
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#define FGMAC_DMA_TDES0_EXCESSIVE_COLLISIONS BIT(8)
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#define FGMAC_DMA_TDES0_LATE_COLLISION BIT(9)
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#define FGMAC_DMA_TDES0_NO_CARRIER BIT(10)
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#define FGMAC_DMA_TDES0_LOSS_CARRIER BIT(11)
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#define FGMAC_DMA_TDES0_PAYLOAD_ERROR BIT(12)
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#define FGMAC_DMA_TDES0_FRAME_FLUSHED BIT(13)
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#define FGMAC_DMA_TDES0_JABBER_TIMEOUT BIT(14)
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#define FGMAC_DMA_TDES0_ERROR_SUMMARY BIT(15)
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#define FGMAC_DMA_TDES0_IP_HEADER_ERROR BIT(16)
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#define FGMAC_DMA_TDES0_TIME_STAMP_STATUS BIT(17) /* 指示已捕获相应发送帧的时间戳 */
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#define FGMAC_DMA_TDES0_OWN BIT(31) /* 该位表示描述符归 DMA 所有 */
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/* TDES1 包含缓冲区大小和控制描述符链/环和正在传输的帧的其他位 */
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#define FGMAC_DMA_TDES1_BUFFER1_SIZE_MASK GENMASK(10, 0)
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#define FGMAC_DMA_TDES1_BUFFER2_SIZE_MASK GENMASK(21, 11)
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#define FGMAC_DMA_TDES1_BUFFER2_SIZE_SHIFT 11
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#define FGMAC_DMA_TDES1_TIME_STAMP_ENABLE BIT(22)
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#define FGMAC_DMA_TDES1_DISABLE_PADDING BIT(23)
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#define FGMAC_DMA_TDES1_SECOND_ADDRESS_CHAINED BIT(24)
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#define FGMAC_DMA_TDES1_END_RING BIT(25)
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#define FGMAC_DMA_TDES1_CRC_DISABLE BIT(26)
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#define FGMAC_DMA_TDES1_CHECKSUM_INSERTION_MASK GENMASK(28, 27)
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#define FGMAC_DMA_TDES1_CHECKSUM_INSERTION_SHIFT 27
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#define FGMAC_DMA_TDES1_FIRST_SEGMENT BIT(29)
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#define FGMAC_DMA_TDES1_LAST_SEGMENT BIT(30)
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#define FGMAC_DMA_TDES1_INTERRUPT BIT(31)
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/********接收描述符********/
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/* RDES0 包含接收的帧状态，帧长度和描述符所有权信息 */
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#define FGMAC_DMA_RDES0_PAYLOAD_CSUM_ERR BIT(0)
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#define FGMAC_DMA_RDES0_CRC_ERROR BIT(1)
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#define FGMAC_DMA_RDES0_DRIBBLING BIT(2)
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#define FGMAC_DMA_RDES0_MII_ERROR BIT(3)
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#define FGMAC_DMA_RDES0_RECEIVE_WATCHDOG BIT(4)
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#define FGMAC_DMA_RDES0_FRAME_TYPE BIT(5)
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#define FGMAC_DMA_RDES0_COLLISION BIT(6)
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#define FGMAC_DMA_RDES0_IPC_CSUM_ERROR BIT(7)
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#define FGMAC_DMA_RDES0_LAST_DESCRIPTOR BIT(8)
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#define FGMAC_DMA_RDES0_FIRST_DESCRIPTOR BIT(9)
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#define FGMAC_DMA_RDES0_VLAN_TAG BIT(10)
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#define FGMAC_DMA_RDES0_OVERFLOW_ERROR BIT(11)
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#define FGMAC_DMA_RDES0_LENGTH_ERROR BIT(12)
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#define FGMAC_DMA_RDES0_SA_FILTER_FAIL BIT(13)
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#define FGMAC_DMA_RDES0_DESCRIPTOR_ERROR BIT(14)
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#define FGMAC_DMA_RDES0_ERROR_SUMMARY BIT(15)
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#define FGMAC_DMA_RDES0_FRAME_LEN_MASK (0x3FFF << 16) /* GENMASK(29, 16)*/
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#define FGMAC_DMA_RDES0_FRAME_LEN_SHIFT 16
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#define FGMAC_DMA_RDES0_DA_FILTER_FAIL BIT(30)
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#define FGMAC_DMA_RDES0_OWN BIT(31)
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/* RDES1 包含缓冲区大小和控制描述符链/环的其他位 */
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#define FGMAC_DMA_RDES1_BUFFER1_SIZE_MASK GENMASK(10, 0)
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#define FGMAC_DMA_RDES1_BUFFER2_SIZE_MASK GENMASK(21, 11)
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#define FGMAC_DMA_RDES1_BUFFER2_SIZE_SHIFT 11
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#define FGMAC_DMA_RDES1_SECOND_ADDRESS_CHAINED BIT(24)
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#define FGMAC_DMA_RDES1_END_RING BIT(25)
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#define FGMAC_DMA_RDES1_DISABLE_IC BIT(31)
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/* Operational Mode */
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enum
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{
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FGMAC_CHECKSUM_BY_SOFTWARE = 0,
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FGMAC_CHECKSUM_BY_HARDWARE
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}; /* software checksum or hardware checksum */
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enum
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{
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FGMAC_TX_COMPLETE_EVT = 0,
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FGMAC_RX_COMPLETE_EVT,
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FGMAC_LINK_STATUS_EVT,
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FGMAC_PHY_STATUS_EVT,
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FGMAC_DMA_ERR_EVT,
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FGMAC_INTR_EVT_NUM
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}; /* interrupt event type */
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/**************************** Type Definitions *******************************/
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/**
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* This typedef contains configuration information for the device.
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*/
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typedef struct
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{
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u32 instance_id; /* device instance id */
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uintptr base_addr; /* device base address */
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u32 irq_num; /* irq num */
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u32 irq_prority; /* device intrrupt priority */
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u32 cheksum_mode; /* hardware or software checksum */
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u32 duplex_mode; /* selects the MAC duplex mode: Half-Duplex or Full-Duplex mode */
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u32 max_packet_size; /* max num of bytes in frame transfer */
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u32 mdc_clk_hz; /* MDC clock access PHY. [1.0MHz ~2.5MHz] */
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boolean en_auto_negtiation; /* auto-negotiation or not */
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u32 speed; /* sets the Ethernet speed: 10/100/1000 Mbps. */
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} FGmacConfig; /* FGMAC 驱动配置数据 */
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/**
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* This typedef contains driver instance data. The user is required to allocate a
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* variable of this type for every device in the system. A pointer
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* to a variable of this type is then passed to the driver API functions.
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*/
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typedef struct
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{
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volatile u32 status;
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u32 ctrl;
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u32 buf_addr;
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u32 next;
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} FGmacDmaDesc; /* FGMAC DMA描述符 */
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typedef struct
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{
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u32 desc_idx; /* For Current Desc position */
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u32 desc_buf_idx; /* For Current Desc buffer buf position */
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u32 desc_max_num; /* Max Number for Desc and Desc buffer */
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u8 *desc_buf_base; /* Desc buffer Base */
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} FGmacRingDescData; /* FGMAC DMA描述符表(链式)相关数据 */
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typedef void (*FGmacEvtHandler)(void *pCtrl);
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typedef struct
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{
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FGmacConfig config; /* Current active configs */
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u32 is_ready; /* Device is initialized and ready */
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FGmacRingDescData rx_ring; /* RX DMA descriptor data (idx, length) */
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volatile FGmacDmaDesc *rx_desc; /* RX DMA descriptor table in ring */
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FGmacRingDescData tx_ring; /* TX DMA descriptor data (idx, length) */
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volatile FGmacDmaDesc *tx_desc; /* TX DMA descriptor table in ring */
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FGmacEvtHandler evt_handler[FGMAC_INTR_EVT_NUM]; /* User registered interrupt handler */
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u32 phy_valid_mask; /* phy valid addr sequence mask */
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u32 phy_speed;
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u32 phy_addr; /* phy max valid addr, or the unique value */
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u16 phy_id1; /*phy tag,only value to identify phy*/
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} FGmac; /* FGMAC 驱动控制数据 */
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/************************** Variable Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/* 获取FGMAC驱动的默认配置参数 */
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const FGmacConfig *FGmacLookupConfig(u32 instance_id);
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/* 完成FGMAC驱动实例的初始化，使之可以使用 */
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FError FGmacCfgInitialize(FGmac *instance_p, const FGmacConfig *cofig_p);
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/* 完成FGMAC驱动实例去使能，清零实例数据 */
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FError FGmacDeInitialize(FGmac *instance_p);
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/* 配置FGMAC的发送DMA描述符和缓冲区 */
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FError FGmacSetupTxDescRing(FGmac *instance_p, volatile FGmacDmaDesc *tx_desc_tbl,
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u8 *tx_buf, const fsize_t tx_pre_buf_len, const fsize_t tx_buf_num);
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/* 配置FGMAC的接收DMA描述符和缓冲区 */
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FError FGmacSetupRxDescRing(FGmac *instance_p, volatile FGmacDmaDesc *rx_desc_tbl,
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u8 *rx_buf, const fsize_t rx_pre_buf_len, const fsize_t rx_buf_num);
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/* FGMAC中断处理函数 */
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void FGmacInterruptHandler(s32 vector, void *param);
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/* 注册FGMAC中断事件处理函数 */
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void FGmacRegisterEvtHandler(FGmac *instance_p, u32 evt, FGmacEvtHandler handler);
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/* 使能FGMAC DMA，使之可以接收/发送数据 */
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FError FGmacStartTrans(FGmac *instance_p);
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/* 去使能FGMAC DMA, 使之不再能接收/发送数据 */
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FError FGmacStopTrans(FGmac *instance_p);
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/* 通过FGMAC接收数据帧 */
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FError FGmacRecvFrame(FGmac *instance_p);
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/* 通过FGMAC发送数据帧 */
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FError FGmacSendFrame(FGmac *instance_p, u32 frame_len);
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/* 设置FGMAC中断屏蔽位 */
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void FGmacSetInterruptMask(FGmac *instance_p, u32 intr_type, u32 mask);
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/* 设置FGMAC中断使能位 */
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void FGmacSetInterruptUmask(FGmac *instance_p, u32 intr_type, u32 mask);
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/*fgmac deplex mode configuration */
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void FGmacControllerDuplexConfig(FGmac *instance_p, u32 duplex);
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/*fgmac speed configuration */
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void FGmacControllerSpeedConfig(FGmac *instance_p, u32 speed);
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#ifdef __cplusplus
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}
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#endif
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#endif
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