2394e75265
* [libcpu/risc-v] support noncached normal memory * [mm] check before dereference in _fetch_page * [mm] add comments on ioremap * [ioremap] report more info on failed
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-05-06 Jesven first version
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*/
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#ifndef __IOREMAP_H__
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#define __IOREMAP_H__
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#include <stddef.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* IOREMAP family
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* `rt_ioremap` default to map physical memory in MMIO region as DEVICE memory
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* to kernel space. And there are 3 variants currently supported.
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*
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* name | attribution
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* ------------------ | -----------
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* rt_ioremap_nocache | Device (MMU_MAP_K_DEVICE)
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* rt_ioremap_cache | Normal memory (MMU_MAP_K_RWCB)
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* rt_ioremap_wt | Normal memory but guarantee that
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* | Each write access should go to system memory directly
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* | Currently as non-cacheable
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*/
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void *rt_ioremap(void *paddr, size_t size);
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void *rt_ioremap_nocache(void *paddr, size_t size);
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void *rt_ioremap_cached (void *paddr, size_t size);
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void rt_iounmap(volatile void *addr);
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extern void *rt_ioremap_start;
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extern size_t rt_ioremap_size;
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#ifdef __cplusplus
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}
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#endif
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#endif /*__LWP_IOREMAP_H__*/
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