480 lines
15 KiB
C
480 lines
15 KiB
C
/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_enc.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define ENC_CTRL_W1C_FLAGS (ENC_CTRL_HIRQ_MASK | ENC_CTRL_XIRQ_MASK | ENC_CTRL_DIRQ_MASK | ENC_CTRL_CMPIRQ_MASK)
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#define ENC_CTRL2_W1C_FLAGS (ENC_CTRL2_SABIRQ_MASK | ENC_CTRL2_ROIRQ_MASK | ENC_CTRL2_RUIRQ_MASK)
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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/*!
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* @brief Get instance number for ENC module.
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*
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* @param base ENC peripheral base address
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*/
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static uint32_t ENC_GetInstance(ENC_Type *base);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/*! @brief Pointers to ENC bases for each instance. */
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static ENC_Type *const s_encBases[] = ENC_BASE_PTRS;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/*! @brief Pointers to ENC clocks for each instance. */
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static const clock_ip_name_t s_encClocks[] = ENC_CLOCKS;
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/*******************************************************************************
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* Code
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******************************************************************************/
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static uint32_t ENC_GetInstance(ENC_Type *base)
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{
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uint32_t instance;
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/* Find the instance index from base address mappings. */
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for (instance = 0; instance < ARRAY_SIZE(s_encBases); instance++)
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{
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if (s_encBases[instance] == base)
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{
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break;
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}
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}
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assert(instance < ARRAY_SIZE(s_encBases));
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return instance;
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}
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void ENC_Init(ENC_Type *base, const enc_config_t *config)
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{
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assert(NULL != config);
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uint32_t tmp16;
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Enable the clock. */
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CLOCK_EnableClock(s_encClocks[ENC_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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/* ENC_CTRL. */
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tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_HIP_MASK | ENC_CTRL_HNE_MASK | ENC_CTRL_REV_MASK |
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ENC_CTRL_PH1_MASK | ENC_CTRL_XIP_MASK | ENC_CTRL_XNE_MASK | ENC_CTRL_WDE_MASK));
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/* For HOME trigger. */
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if (kENC_HOMETriggerDisabled != config->HOMETriggerMode)
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{
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tmp16 |= ENC_CTRL_HIP_MASK;
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if (kENC_HOMETriggerOnFallingEdge == config->HOMETriggerMode)
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{
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tmp16 |= ENC_CTRL_HNE_MASK;
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}
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}
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/* For encoder work mode. */
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if (config->enableReverseDirection)
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{
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tmp16 |= ENC_CTRL_REV_MASK;
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}
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if (kENC_DecoderWorkAsSignalPhaseCountMode == config->decoderWorkMode)
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{
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tmp16 |= ENC_CTRL_PH1_MASK;
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}
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/* For INDEX trigger. */
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if (kENC_INDEXTriggerDisabled != config->INDEXTriggerMode)
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{
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tmp16 |= ENC_CTRL_XIP_MASK;
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if (kENC_INDEXTriggerOnFallingEdge == config->INDEXTriggerMode)
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{
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tmp16 |= ENC_CTRL_XNE_MASK;
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}
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}
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/* Watchdog. */
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if (config->enableWatchdog)
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{
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tmp16 |= ENC_CTRL_WDE_MASK;
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base->WTR = config->watchdogTimeoutValue; /* WDOG can be only available when the feature is enabled. */
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}
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base->CTRL = tmp16;
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/* ENC_FILT. */
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base->FILT = ENC_FILT_FILT_CNT(config->filterCount) | ENC_FILT_FILT_PER(config->filterSamplePeriod);
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/* ENC_CTRL2. */
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tmp16 = base->CTRL2 & (uint16_t)(~(ENC_CTRL2_W1C_FLAGS | ENC_CTRL2_OUTCTL_MASK | ENC_CTRL2_REVMOD_MASK |
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ENC_CTRL2_MOD_MASK | ENC_CTRL2_UPDPOS_MASK | ENC_CTRL2_UPDHLD_MASK));
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if (kENC_POSMATCHOnReadingAnyPositionCounter == config->positionMatchMode)
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{
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tmp16 |= ENC_CTRL2_OUTCTL_MASK;
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}
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if (kENC_RevolutionCountOnRollOverModulus == config->revolutionCountCondition)
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{
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tmp16 |= ENC_CTRL2_REVMOD_MASK;
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}
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if (config->enableModuloCountMode)
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{
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tmp16 |= ENC_CTRL2_MOD_MASK;
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/* Set modulus value. */
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base->UMOD = (uint16_t)(config->positionModulusValue >> 16U); /* Upper 16 bits. */
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base->LMOD = (uint16_t)(config->positionModulusValue); /* Lower 16 bits. */
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}
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if (config->enableTRIGGERClearPositionCounter)
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{
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tmp16 |= ENC_CTRL2_UPDPOS_MASK;
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}
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if (config->enableTRIGGERClearHoldPositionCounter)
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{
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tmp16 |= ENC_CTRL2_UPDHLD_MASK;
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}
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base->CTRL2 = tmp16;
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/* ENC_UCOMP & ENC_LCOMP. */
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base->UCOMP = (uint16_t)(config->positionCompareValue >> 16U); /* Upper 16 bits. */
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base->LCOMP = (uint16_t)(config->positionCompareValue); /* Lower 16 bits. */
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/* ENC_UINIT & ENC_LINIT. */
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base->UINIT = (uint16_t)(config->positionInitialValue >> 16U); /* Upper 16 bits. */
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base->LINIT = (uint16_t)(config->positionInitialValue); /* Lower 16 bits. */
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}
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void ENC_Deinit(ENC_Type *base)
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{
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#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
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/* Disable the clock. */
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CLOCK_DisableClock(s_encClocks[ENC_GetInstance(base)]);
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#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
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}
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void ENC_GetDefaultConfig(enc_config_t *config)
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{
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assert(NULL != config);
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config->enableReverseDirection = false;
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config->decoderWorkMode = kENC_DecoderWorkAsNormalMode;
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config->HOMETriggerMode = kENC_HOMETriggerDisabled;
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config->INDEXTriggerMode = kENC_INDEXTriggerDisabled;
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config->enableTRIGGERClearPositionCounter = false;
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config->enableTRIGGERClearHoldPositionCounter = false;
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config->enableWatchdog = false;
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config->watchdogTimeoutValue = 0U;
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config->filterCount = 0U;
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config->filterSamplePeriod = 0U;
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config->positionMatchMode = kENC_POSMATCHOnPositionCounterEqualToComapreValue;
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config->positionCompareValue = 0xFFFFFFFFU;
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config->revolutionCountCondition = kENC_RevolutionCountOnINDEXPulse;
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config->enableModuloCountMode = false;
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config->positionModulusValue = 0U;
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config->positionInitialValue = 0U;
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}
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void ENC_DoSoftwareLoadInitialPositionValue(ENC_Type *base)
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{
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uint16_t tmp16 = base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS);
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tmp16 |= ENC_CTRL_SWIP_MASK; /* Write 1 to trigger the command for loading initial position value. */
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base->CTRL = tmp16;
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}
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void ENC_SetSelfTestConfig(ENC_Type *base, const enc_self_test_config_t *config)
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{
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uint16_t tmp16 = 0U;
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if (NULL == config) /* Pass "NULL" to disable the feature. */
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{
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base->TST = 0U;
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return;
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}
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tmp16 = ENC_TST_TEN_MASK | ENC_TST_TCE_MASK | ENC_TST_TEST_PERIOD(config->signalPeriod) |
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ENC_TST_TEST_COUNT(config->signalCount);
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if (kENC_SelfTestDirectionNegative == config->signalDirection)
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{
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tmp16 |= ENC_TST_QDN_MASK;
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}
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base->TST = tmp16;
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}
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void ENC_EnableWatchdog(ENC_Type *base, bool enable)
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{
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uint16_t tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_WDE_MASK));
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if (enable)
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{
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tmp16 |= ENC_CTRL_WDE_MASK;
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}
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base->CTRL = tmp16;
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}
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uint32_t ENC_GetStatusFlags(ENC_Type *base)
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{
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uint32_t ret32 = 0U;
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/* ENC_CTRL. */
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if (ENC_CTRL_HIRQ_MASK == (ENC_CTRL_HIRQ_MASK & base->CTRL))
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{
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ret32 |= kENC_HOMETransitionFlag;
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}
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if (ENC_CTRL_XIRQ_MASK == (ENC_CTRL_XIRQ_MASK & base->CTRL))
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{
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ret32 |= kENC_INDEXPulseFlag;
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}
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if (ENC_CTRL_DIRQ_MASK == (ENC_CTRL_DIRQ_MASK & base->CTRL))
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{
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ret32 |= kENC_WatchdogTimeoutFlag;
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}
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if (ENC_CTRL_CMPIRQ_MASK == (ENC_CTRL_CMPIRQ_MASK & base->CTRL))
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{
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ret32 |= kENC_PositionCompareFlag;
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}
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/* ENC_CTRL2. */
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if (ENC_CTRL2_SABIRQ_MASK == (ENC_CTRL2_SABIRQ_MASK & base->CTRL2))
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{
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ret32 |= kENC_SimultBothPhaseChangeFlag;
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}
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if (ENC_CTRL2_ROIRQ_MASK == (ENC_CTRL2_ROIRQ_MASK & base->CTRL2))
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{
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ret32 |= kENC_PositionRollOverFlag;
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}
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if (ENC_CTRL2_RUIRQ_MASK == (ENC_CTRL2_RUIRQ_MASK & base->CTRL2))
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{
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ret32 |= kENC_PositionRollUnderFlag;
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}
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if (ENC_CTRL2_DIR_MASK == (ENC_CTRL2_DIR_MASK & base->CTRL2))
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{
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ret32 |= kENC_LastCountDirectionFlag;
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}
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return ret32;
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}
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void ENC_ClearStatusFlags(ENC_Type *base, uint32_t mask)
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{
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uint32_t tmp16 = 0U;
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/* ENC_CTRL. */
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if (kENC_HOMETransitionFlag == (kENC_HOMETransitionFlag & mask))
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{
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tmp16 |= ENC_CTRL_HIRQ_MASK;
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}
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if (kENC_INDEXPulseFlag == (kENC_INDEXPulseFlag & mask))
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{
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tmp16 |= ENC_CTRL_XIRQ_MASK;
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}
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if (kENC_WatchdogTimeoutFlag == (kENC_WatchdogTimeoutFlag & mask))
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{
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tmp16 |= ENC_CTRL_DIRQ_MASK;
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}
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if (kENC_PositionCompareFlag == (kENC_PositionCompareFlag & mask))
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{
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tmp16 |= ENC_CTRL_CMPIRQ_MASK;
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}
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if (0U != tmp16)
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{
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base->CTRL = (base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) | tmp16;
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}
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/* ENC_CTRL2. */
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tmp16 = 0U;
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if (kENC_SimultBothPhaseChangeFlag == (kENC_SimultBothPhaseChangeFlag & mask))
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{
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tmp16 |= ENC_CTRL2_SABIRQ_MASK;
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}
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if (kENC_PositionRollOverFlag == (kENC_PositionRollOverFlag & mask))
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{
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tmp16 |= ENC_CTRL2_ROIRQ_MASK;
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}
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if (kENC_PositionRollUnderFlag == (kENC_PositionRollUnderFlag & mask))
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{
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tmp16 |= ENC_CTRL2_RUIRQ_MASK;
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}
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if (0U != tmp16)
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{
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base->CTRL2 = (base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) | tmp16;
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}
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}
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void ENC_EnableInterrupts(ENC_Type *base, uint32_t mask)
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{
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uint32_t tmp16 = 0U;
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/* ENC_CTRL. */
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if (kENC_HOMETransitionInterruptEnable == (kENC_HOMETransitionInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL_HIE_MASK;
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}
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if (kENC_INDEXPulseInterruptEnable == (kENC_INDEXPulseInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL_XIE_MASK;
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}
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if (kENC_WatchdogTimeoutInterruptEnable == (kENC_WatchdogTimeoutInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL_DIE_MASK;
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}
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if (kENC_PositionCompareInerruptEnable == (kENC_PositionCompareInerruptEnable & mask))
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{
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tmp16 |= ENC_CTRL_CMPIE_MASK;
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}
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if (tmp16 != 0U)
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{
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base->CTRL = (base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) | tmp16;
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}
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/* ENC_CTRL2. */
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tmp16 = 0U;
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if (kENC_SimultBothPhaseChangeInterruptEnable == (kENC_SimultBothPhaseChangeInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL2_SABIE_MASK;
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}
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if (kENC_PositionRollOverInterruptEnable == (kENC_PositionRollOverInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL2_ROIE_MASK;
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}
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if (kENC_PositionRollUnderInterruptEnable == (kENC_PositionRollUnderInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL2_RUIE_MASK;
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}
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if (tmp16 != 0U)
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{
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base->CTRL2 = (base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) | tmp16;
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}
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}
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void ENC_DisableInterrupts(ENC_Type *base, uint32_t mask)
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{
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uint16_t tmp16 = 0U;
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/* ENC_CTRL. */
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if (kENC_HOMETransitionInterruptEnable == (kENC_HOMETransitionInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL_HIE_MASK;
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}
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if (kENC_INDEXPulseInterruptEnable == (kENC_INDEXPulseInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL_XIE_MASK;
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}
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if (kENC_WatchdogTimeoutInterruptEnable == (kENC_WatchdogTimeoutInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL_DIE_MASK;
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}
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if (kENC_PositionCompareInerruptEnable == (kENC_PositionCompareInerruptEnable & mask))
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{
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tmp16 |= ENC_CTRL_CMPIE_MASK;
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}
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if (0U != tmp16)
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{
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base->CTRL = (uint16_t)(base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS)) & (uint16_t)(~tmp16);
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}
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/* ENC_CTRL2. */
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tmp16 = 0U;
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if (kENC_SimultBothPhaseChangeInterruptEnable == (kENC_SimultBothPhaseChangeInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL2_SABIE_MASK;
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}
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if (kENC_PositionRollOverInterruptEnable == (kENC_PositionRollOverInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL2_ROIE_MASK;
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}
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if (kENC_PositionRollUnderInterruptEnable == (kENC_PositionRollUnderInterruptEnable & mask))
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{
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tmp16 |= ENC_CTRL2_RUIE_MASK;
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}
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if (tmp16 != 0U)
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{
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base->CTRL2 = (uint16_t)(base->CTRL2 & (uint16_t)(~ENC_CTRL2_W1C_FLAGS)) & (uint16_t)(~tmp16);
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}
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}
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uint32_t ENC_GetEnabledInterrupts(ENC_Type *base)
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{
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uint32_t ret32 = 0U;
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/* ENC_CTRL. */
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if (ENC_CTRL_HIE_MASK == (ENC_CTRL_HIE_MASK & base->CTRL))
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{
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ret32 |= kENC_HOMETransitionInterruptEnable;
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}
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if (ENC_CTRL_XIE_MASK == (ENC_CTRL_XIE_MASK & base->CTRL))
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{
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ret32 |= kENC_INDEXPulseInterruptEnable;
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}
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if (ENC_CTRL_DIE_MASK == (ENC_CTRL_DIE_MASK & base->CTRL))
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{
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ret32 |= kENC_WatchdogTimeoutInterruptEnable;
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}
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if (ENC_CTRL_CMPIE_MASK == (ENC_CTRL_CMPIE_MASK & base->CTRL))
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{
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ret32 |= kENC_PositionCompareInerruptEnable;
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}
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/* ENC_CTRL2. */
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if (ENC_CTRL2_SABIE_MASK == (ENC_CTRL2_SABIE_MASK & base->CTRL2))
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{
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ret32 |= kENC_SimultBothPhaseChangeInterruptEnable;
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}
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if (ENC_CTRL2_ROIE_MASK == (ENC_CTRL2_ROIE_MASK & base->CTRL2))
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{
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ret32 |= kENC_PositionRollOverInterruptEnable;
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}
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if (ENC_CTRL2_RUIE_MASK == (ENC_CTRL2_RUIE_MASK & base->CTRL2))
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{
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ret32 |= kENC_PositionRollUnderInterruptEnable;
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}
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return ret32;
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}
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void ENC_SetInitialPositionValue(ENC_Type *base, uint32_t value)
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{
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base->UINIT = (uint16_t)(value >> 16U); /* Set upper 16 bits. */
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base->LINIT = (uint16_t)(value); /* Set lower 16 bits. */
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}
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uint32_t ENC_GetPositionValue(ENC_Type *base)
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{
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uint32_t ret32;
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ret32 = base->UPOS; /* Get upper 16 bits and make a snapshot. */
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ret32 <<= 16U;
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ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
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return ret32;
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}
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uint32_t ENC_GetHoldPositionValue(ENC_Type *base)
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|
{
|
|
uint32_t ret32;
|
|
|
|
ret32 = base->UPOSH; /* Get upper 16 bits and make a snapshot. */
|
|
ret32 <<= 16U;
|
|
ret32 |= base->LPOSH; /* Get lower 16 bits from hold register. */
|
|
|
|
return ret32;
|
|
}
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