19 lines
385 B
C
19 lines
385 B
C
#ifndef XIL_CACHE_H
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#define XIL_CACHE_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define Xil_DCacheFlushRange(addr, size) rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, (void*)(addr), (size))
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#define Xil_DCacheInvalidateRange(addr, size) rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, (void*)(addr), (size))
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#ifdef __cplusplus
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}
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#endif
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#endif
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/**
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* @} End of "addtogroup r5_cache_apis".
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*/
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