908 lines
31 KiB
C
908 lines
31 KiB
C
/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
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* File Name : stm32f10x_can.c
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* Author : MCD Application Team
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* Version : V2.0.3
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* Date : 09/22/2008
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* Description : This file provides all the CAN firmware functions.
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********************************************************************************
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_can.h"
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#include "stm32f10x_rcc.h"
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* CAN Master Control Register bits */
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#define MCR_INRQ ((u32)0x00000001) /* Initialization request */
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#define MCR_SLEEP ((u32)0x00000002) /* Sleep mode request */
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#define MCR_TXFP ((u32)0x00000004) /* Transmit FIFO priority */
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#define MCR_RFLM ((u32)0x00000008) /* Receive FIFO locked mode */
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#define MCR_NART ((u32)0x00000010) /* No automatic retransmission */
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#define MCR_AWUM ((u32)0x00000020) /* Automatic wake up mode */
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#define MCR_ABOM ((u32)0x00000040) /* Automatic bus-off management */
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#define MCR_TTCM ((u32)0x00000080) /* time triggered communication */
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/* CAN Master Status Register bits */
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#define MSR_INAK ((u32)0x00000001) /* Initialization acknowledge */
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#define MSR_WKUI ((u32)0x00000008) /* Wake-up interrupt */
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#define MSR_SLAKI ((u32)0x00000010) /* Sleep acknowledge interrupt */
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/* CAN Transmit Status Register bits */
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#define TSR_RQCP0 ((u32)0x00000001) /* Request completed mailbox0 */
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#define TSR_TXOK0 ((u32)0x00000002) /* Transmission OK of mailbox0 */
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#define TSR_ABRQ0 ((u32)0x00000080) /* Abort request for mailbox0 */
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#define TSR_RQCP1 ((u32)0x00000100) /* Request completed mailbox1 */
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#define TSR_TXOK1 ((u32)0x00000200) /* Transmission OK of mailbox1 */
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#define TSR_ABRQ1 ((u32)0x00008000) /* Abort request for mailbox1 */
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#define TSR_RQCP2 ((u32)0x00010000) /* Request completed mailbox2 */
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#define TSR_TXOK2 ((u32)0x00020000) /* Transmission OK of mailbox2 */
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#define TSR_ABRQ2 ((u32)0x00800000) /* Abort request for mailbox2 */
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#define TSR_TME0 ((u32)0x04000000) /* Transmit mailbox 0 empty */
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#define TSR_TME1 ((u32)0x08000000) /* Transmit mailbox 1 empty */
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#define TSR_TME2 ((u32)0x10000000) /* Transmit mailbox 2 empty */
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/* CAN Receive FIFO 0 Register bits */
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#define RF0R_FULL0 ((u32)0x00000008) /* FIFO 0 full */
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#define RF0R_FOVR0 ((u32)0x00000010) /* FIFO 0 overrun */
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#define RF0R_RFOM0 ((u32)0x00000020) /* Release FIFO 0 output mailbox */
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/* CAN Receive FIFO 1 Register bits */
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#define RF1R_FULL1 ((u32)0x00000008) /* FIFO 1 full */
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#define RF1R_FOVR1 ((u32)0x00000010) /* FIFO 1 overrun */
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#define RF1R_RFOM1 ((u32)0x00000020) /* Release FIFO 1 output mailbox */
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/* CAN Error Status Register bits */
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#define ESR_EWGF ((u32)0x00000001) /* Error warning flag */
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#define ESR_EPVF ((u32)0x00000002) /* Error passive flag */
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#define ESR_BOFF ((u32)0x00000004) /* Bus-off flag */
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/* CAN Mailbox Transmit Request */
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#define TMIDxR_TXRQ ((u32)0x00000001) /* Transmit mailbox request */
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/* CAN Filter Master Register bits */
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#define FMR_FINIT ((u32)0x00000001) /* Filter init mode */
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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static ITStatus CheckITStatus(u32 CAN_Reg, u32 It_Bit);
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/* Private functions ---------------------------------------------------------*/
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/*******************************************************************************
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* Function Name : CAN_DeInit
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* Description : Deinitializes the CAN peripheral registers to their default
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* reset values.
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* Input : None.
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* Output : None.
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* Return : None.
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*******************************************************************************/
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void CAN_DeInit(void)
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{
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/* Enable CAN reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN, ENABLE);
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/* Release CAN from reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN, DISABLE);
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}
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/*******************************************************************************
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* Function Name : CAN_Init
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* Description : Initializes the CAN peripheral according to the specified
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* parameters in the CAN_InitStruct.
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* Input : CAN_InitStruct: pointer to a CAN_InitTypeDef structure that
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contains the configuration information for the CAN peripheral.
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* Output : None.
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* Return : Constant indicates initialization succeed which will be
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* CANINITFAILED or CANINITOK.
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*******************************************************************************/
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u8 CAN_Init(CAN_InitTypeDef* CAN_InitStruct)
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{
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u8 InitStatus = 0;
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u16 WaitAck = 0;
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/* Check the parameters */
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
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assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
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assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
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assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
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assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
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assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
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/* Request initialisation */
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CAN->MCR = MCR_INRQ;
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/* ...and check acknowledged */
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if ((CAN->MSR & MSR_INAK) == 0)
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{
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InitStatus = CANINITFAILED;
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}
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else
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{
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/* Set the time triggered communication mode */
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if (CAN_InitStruct->CAN_TTCM == ENABLE)
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{
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CAN->MCR |= MCR_TTCM;
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}
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else
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{
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CAN->MCR &= ~MCR_TTCM;
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}
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/* Set the automatic bus-off management */
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if (CAN_InitStruct->CAN_ABOM == ENABLE)
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{
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CAN->MCR |= MCR_ABOM;
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}
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else
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{
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CAN->MCR &= ~MCR_ABOM;
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}
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/* Set the automatic wake-up mode */
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if (CAN_InitStruct->CAN_AWUM == ENABLE)
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{
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CAN->MCR |= MCR_AWUM;
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}
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else
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{
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CAN->MCR &= ~MCR_AWUM;
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}
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/* Set the no automatic retransmission */
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if (CAN_InitStruct->CAN_NART == ENABLE)
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{
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CAN->MCR |= MCR_NART;
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}
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else
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{
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CAN->MCR &= ~MCR_NART;
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}
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/* Set the receive FIFO locked mode */
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if (CAN_InitStruct->CAN_RFLM == ENABLE)
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{
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CAN->MCR |= MCR_RFLM;
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}
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else
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{
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CAN->MCR &= ~MCR_RFLM;
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}
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/* Set the transmit FIFO priority */
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if (CAN_InitStruct->CAN_TXFP == ENABLE)
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{
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CAN->MCR |= MCR_TXFP;
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}
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else
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{
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CAN->MCR &= ~MCR_TXFP;
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}
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/* Set the bit timing register */
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CAN->BTR = (u32)((u32)CAN_InitStruct->CAN_Mode << 30) | ((u32)CAN_InitStruct->CAN_SJW << 24) |
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((u32)CAN_InitStruct->CAN_BS1 << 16) | ((u32)CAN_InitStruct->CAN_BS2 << 20) |
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((u32)CAN_InitStruct->CAN_Prescaler - 1);
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InitStatus = CANINITOK;
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/* Request leave initialisation */
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CAN->MCR &= ~MCR_INRQ;
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/* Wait the acknowledge */
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for(WaitAck = 0x400; WaitAck > 0x0; WaitAck--)
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{
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}
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/* ...and check acknowledged */
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if ((CAN->MSR & MSR_INAK) == MSR_INAK)
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{
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InitStatus = CANINITFAILED;
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}
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}
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/* At this step, return the status of initialization */
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return InitStatus;
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}
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/*******************************************************************************
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* Function Name : CAN_FilterInit
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* Description : Initializes the CAN peripheral according to the specified
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* parameters in the CAN_FilterInitStruct.
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* Input : CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef
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* structure that contains the configuration information.
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* Output : None.
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* Return : None.
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*******************************************************************************/
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void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
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{
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u16 FilterNumber_BitPos = 0;
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/* Check the parameters */
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assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber));
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assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode));
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assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale));
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assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment));
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assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation));
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FilterNumber_BitPos =
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(u16)(((u16)0x0001) << ((u16)CAN_FilterInitStruct->CAN_FilterNumber));
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/* Initialisation mode for the filter */
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CAN->FMR |= FMR_FINIT;
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/* Filter Deactivation */
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CAN->FA1R &= ~(u32)FilterNumber_BitPos;
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/* Filter Scale */
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if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
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{
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/* 16-bit scale for the filter */
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CAN->FS1R &= ~(u32)FilterNumber_BitPos;
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/* First 16-bit identifier and First 16-bit mask */
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/* Or First 16-bit identifier and Second 16-bit identifier */
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CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
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((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
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((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdLow);
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/* Second 16-bit identifier and Second 16-bit mask */
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/* Or Third 16-bit identifier and Fourth 16-bit identifier */
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CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
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((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
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((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdHigh);
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}
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if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
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{
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/* 32-bit scale for the filter */
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CAN->FS1R |= FilterNumber_BitPos;
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/* 32-bit identifier or First 32-bit identifier */
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CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
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((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
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((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdLow);
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/* 32-bit mask or Second 32-bit identifier */
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CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 =
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((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
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((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdLow);
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}
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/* Filter Mode */
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if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
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{
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/*Id/Mask mode for the filter*/
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CAN->FM1R &= ~(u32)FilterNumber_BitPos;
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}
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else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */
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{
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/*Identifier list mode for the filter*/
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CAN->FM1R |= (u32)FilterNumber_BitPos;
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}
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/* Filter FIFO assignment */
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if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_FilterFIFO0)
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{
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/* FIFO 0 assignation for the filter */
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CAN->FFA1R &= ~(u32)FilterNumber_BitPos;
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}
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if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_FilterFIFO1)
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{
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/* FIFO 1 assignation for the filter */
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CAN->FFA1R |= (u32)FilterNumber_BitPos;
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}
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/* Filter activation */
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if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
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{
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CAN->FA1R |= FilterNumber_BitPos;
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}
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/* Leave the initialisation mode for the filter */
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CAN->FMR &= ~FMR_FINIT;
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}
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/*******************************************************************************
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* Function Name : CAN_StructInit
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* Description : Fills each CAN_InitStruct member with its default value.
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* Input : CAN_InitStruct: pointer to a CAN_InitTypeDef structure which
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* will be initialized.
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* Output : None.
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* Return : None.
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*******************************************************************************/
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void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
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{
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/* Reset CAN init structure parameters values */
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/* Initialize the time triggered communication mode */
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CAN_InitStruct->CAN_TTCM = DISABLE;
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/* Initialize the automatic bus-off management */
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CAN_InitStruct->CAN_ABOM = DISABLE;
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/* Initialize the automatic wake-up mode */
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CAN_InitStruct->CAN_AWUM = DISABLE;
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/* Initialize the no automatic retransmission */
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CAN_InitStruct->CAN_NART = DISABLE;
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/* Initialize the receive FIFO locked mode */
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CAN_InitStruct->CAN_RFLM = DISABLE;
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/* Initialize the transmit FIFO priority */
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CAN_InitStruct->CAN_TXFP = DISABLE;
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/* Initialize the CAN_Mode member */
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CAN_InitStruct->CAN_Mode = CAN_Mode_Normal;
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/* Initialize the CAN_SJW member */
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CAN_InitStruct->CAN_SJW = CAN_SJW_1tq;
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/* Initialize the CAN_BS1 member */
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CAN_InitStruct->CAN_BS1 = CAN_BS1_4tq;
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/* Initialize the CAN_BS2 member */
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CAN_InitStruct->CAN_BS2 = CAN_BS2_3tq;
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/* Initialize the CAN_Prescaler member */
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CAN_InitStruct->CAN_Prescaler = 1;
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}
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/*******************************************************************************
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* Function Name : CAN_ITConfig
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* Description : Enables or disables the specified CAN interrupts.
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* Input : - CAN_IT: specifies the CAN interrupt sources to be enabled or
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* disabled.
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* This parameter can be: CAN_IT_TME, CAN_IT_FMP0, CAN_IT_FF0,
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* CAN_IT_FOV0, CAN_IT_FMP1, CAN_IT_FF1,
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* CAN_IT_FOV1, CAN_IT_EWG, CAN_IT_EPV,
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* CAN_IT_LEC, CAN_IT_ERR, CAN_IT_WKU or
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* CAN_IT_SLK.
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* - NewState: new state of the CAN interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None.
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* Return : None.
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*******************************************************************************/
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void CAN_ITConfig(u32 CAN_IT, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_CAN_ITConfig(CAN_IT));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the selected CAN interrupt */
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CAN->IER |= CAN_IT;
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}
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else
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{
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/* Disable the selected CAN interrupt */
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CAN->IER &= ~CAN_IT;
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}
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}
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/*******************************************************************************
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* Function Name : CAN_Transmit
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* Description : Initiates the transmission of a message.
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* Input : TxMessage: pointer to a structure which contains CAN Id, CAN
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* DLC and CAN datas.
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* Output : None.
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* Return : The number of the mailbox that is used for transmission
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* or CAN_NO_MB if there is no empty mailbox.
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*******************************************************************************/
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u8 CAN_Transmit(CanTxMsg* TxMessage)
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{
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u8 TransmitMailbox = 0;
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/* Check the parameters */
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assert_param(IS_CAN_STDID(TxMessage->StdId));
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assert_param(IS_CAN_EXTID(TxMessage->StdId));
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assert_param(IS_CAN_IDTYPE(TxMessage->IDE));
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assert_param(IS_CAN_RTR(TxMessage->RTR));
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assert_param(IS_CAN_DLC(TxMessage->DLC));
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/* Select one empty transmit mailbox */
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if ((CAN->TSR&TSR_TME0) == TSR_TME0)
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{
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TransmitMailbox = 0;
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}
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else if ((CAN->TSR&TSR_TME1) == TSR_TME1)
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{
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TransmitMailbox = 1;
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}
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else if ((CAN->TSR&TSR_TME2) == TSR_TME2)
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{
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TransmitMailbox = 2;
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}
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else
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{
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TransmitMailbox = CAN_NO_MB;
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}
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if (TransmitMailbox != CAN_NO_MB)
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{
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/* Set up the Id */
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CAN->sTxMailBox[TransmitMailbox].TIR &= TMIDxR_TXRQ;
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if (TxMessage->IDE == CAN_ID_STD)
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{
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TxMessage->StdId &= (u32)0x000007FF;
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TxMessage->StdId = TxMessage->StdId << 21;
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CAN->sTxMailBox[TransmitMailbox].TIR |= (TxMessage->StdId | TxMessage->IDE |
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TxMessage->RTR);
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}
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else
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{
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TxMessage->ExtId &= (u32)0x1FFFFFFF;
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TxMessage->ExtId <<= 3;
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CAN->sTxMailBox[TransmitMailbox].TIR |= (TxMessage->ExtId | TxMessage->IDE |
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TxMessage->RTR);
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}
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/* Set up the DLC */
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TxMessage->DLC &= (u8)0x0000000F;
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CAN->sTxMailBox[TransmitMailbox].TDTR &= (u32)0xFFFFFFF0;
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CAN->sTxMailBox[TransmitMailbox].TDTR |= TxMessage->DLC;
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/* Set up the data field */
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CAN->sTxMailBox[TransmitMailbox].TDLR = (((u32)TxMessage->Data[3] << 24) |
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((u32)TxMessage->Data[2] << 16) |
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((u32)TxMessage->Data[1] << 8) |
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((u32)TxMessage->Data[0]));
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CAN->sTxMailBox[TransmitMailbox].TDHR = (((u32)TxMessage->Data[7] << 24) |
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((u32)TxMessage->Data[6] << 16) |
|
||
((u32)TxMessage->Data[5] << 8) |
|
||
((u32)TxMessage->Data[4]));
|
||
|
||
/* Request transmission */
|
||
CAN->sTxMailBox[TransmitMailbox].TIR |= TMIDxR_TXRQ;
|
||
}
|
||
|
||
return TransmitMailbox;
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_TransmitStatus
|
||
* Description : Checks the transmission of a message.
|
||
* Input : TransmitMailbox: the number of the mailbox that is used for
|
||
* transmission.
|
||
* Output : None.
|
||
* Return : CANTXOK if the CAN driver transmits the message, CANTXFAILED
|
||
* in an other case.
|
||
*******************************************************************************/
|
||
u8 CAN_TransmitStatus(u8 TransmitMailbox)
|
||
{
|
||
/* RQCP, TXOK and TME bits */
|
||
u8 State = 0;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_TRANSMITMAILBOX(TransmitMailbox));
|
||
|
||
switch (TransmitMailbox)
|
||
{
|
||
case (0): State |= (u8)((CAN->TSR & TSR_RQCP0) << 2);
|
||
State |= (u8)((CAN->TSR & TSR_TXOK0) >> 0);
|
||
State |= (u8)((CAN->TSR & TSR_TME0) >> 26);
|
||
break;
|
||
case (1): State |= (u8)((CAN->TSR & TSR_RQCP1) >> 6);
|
||
State |= (u8)((CAN->TSR & TSR_TXOK1) >> 8);
|
||
State |= (u8)((CAN->TSR & TSR_TME1) >> 27);
|
||
break;
|
||
case (2): State |= (u8)((CAN->TSR & TSR_RQCP2) >> 14);
|
||
State |= (u8)((CAN->TSR & TSR_TXOK2) >> 16);
|
||
State |= (u8)((CAN->TSR & TSR_TME2) >> 28);
|
||
break;
|
||
default:
|
||
State = CANTXFAILED;
|
||
break;
|
||
}
|
||
|
||
switch (State)
|
||
{
|
||
/* transmit pending */
|
||
case (0x0): State = CANTXPENDING;
|
||
break;
|
||
/* transmit failed */
|
||
case (0x5): State = CANTXFAILED;
|
||
break;
|
||
/* transmit succedeed */
|
||
case (0x7): State = CANTXOK;
|
||
break;
|
||
default:
|
||
State = CANTXFAILED;
|
||
break;
|
||
}
|
||
|
||
return State;
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_CancelTransmit
|
||
* Description : Cancels a transmit request.
|
||
* Input : Mailbox number.
|
||
* Output : None.
|
||
* Return : None.
|
||
*******************************************************************************/
|
||
void CAN_CancelTransmit(u8 Mailbox)
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_TRANSMITMAILBOX(Mailbox));
|
||
|
||
/* abort transmission */
|
||
switch (Mailbox)
|
||
{
|
||
case (0): CAN->TSR |= TSR_ABRQ0;
|
||
break;
|
||
case (1): CAN->TSR |= TSR_ABRQ1;
|
||
break;
|
||
case (2): CAN->TSR |= TSR_ABRQ2;
|
||
break;
|
||
default:
|
||
break;
|
||
}
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_FIFORelease
|
||
* Description : Releases a FIFO.
|
||
* Input : FIFONumber: FIFO to release, CAN_FIFO0 or CAN_FIFO1.
|
||
* Output : None.
|
||
* Return : None.
|
||
*******************************************************************************/
|
||
void CAN_FIFORelease(u8 FIFONumber)
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_FIFO(FIFONumber));
|
||
|
||
/* Release FIFO0 */
|
||
if (FIFONumber == CAN_FIFO0)
|
||
{
|
||
CAN->RF0R = RF0R_RFOM0;
|
||
}
|
||
/* Release FIFO1 */
|
||
else /* FIFONumber == CAN_FIFO1 */
|
||
{
|
||
CAN->RF1R = RF1R_RFOM1;
|
||
}
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_MessagePending
|
||
* Description : Returns the number of pending messages.
|
||
* Input : FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
|
||
* Output : None.
|
||
* Return : NbMessage which is the number of pending message.
|
||
*******************************************************************************/
|
||
u8 CAN_MessagePending(u8 FIFONumber)
|
||
{
|
||
u8 MessagePending=0;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_FIFO(FIFONumber));
|
||
|
||
if (FIFONumber == CAN_FIFO0)
|
||
{
|
||
MessagePending = (u8)(CAN->RF0R&(u32)0x03);
|
||
}
|
||
else if (FIFONumber == CAN_FIFO1)
|
||
{
|
||
MessagePending = (u8)(CAN->RF1R&(u32)0x03);
|
||
}
|
||
else
|
||
{
|
||
MessagePending = 0;
|
||
}
|
||
return MessagePending;
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_Receive
|
||
* Description : Receives a message.
|
||
* Input : FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
|
||
* Output : RxMessage: pointer to a structure which contains CAN Id,
|
||
* CAN DLC, CAN datas and FMI number.
|
||
* Return : None.
|
||
*******************************************************************************/
|
||
void CAN_Receive(u8 FIFONumber, CanRxMsg* RxMessage)
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_FIFO(FIFONumber));
|
||
|
||
/* Get the Id */
|
||
RxMessage->IDE = (u8)0x04 & CAN->sFIFOMailBox[FIFONumber].RIR;
|
||
if (RxMessage->IDE == CAN_ID_STD)
|
||
{
|
||
RxMessage->StdId = (u32)0x000007FF & (CAN->sFIFOMailBox[FIFONumber].RIR >> 21);
|
||
}
|
||
else
|
||
{
|
||
RxMessage->ExtId = (u32)0x1FFFFFFF & (CAN->sFIFOMailBox[FIFONumber].RIR >> 3);
|
||
}
|
||
|
||
RxMessage->RTR = (u8)0x02 & CAN->sFIFOMailBox[FIFONumber].RIR;
|
||
|
||
/* Get the DLC */
|
||
RxMessage->DLC = (u8)0x0F & CAN->sFIFOMailBox[FIFONumber].RDTR;
|
||
|
||
/* Get the FMI */
|
||
RxMessage->FMI = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDTR >> 8);
|
||
|
||
/* Get the data field */
|
||
RxMessage->Data[0] = (u8)0xFF & CAN->sFIFOMailBox[FIFONumber].RDLR;
|
||
RxMessage->Data[1] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDLR >> 8);
|
||
RxMessage->Data[2] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDLR >> 16);
|
||
RxMessage->Data[3] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDLR >> 24);
|
||
|
||
RxMessage->Data[4] = (u8)0xFF & CAN->sFIFOMailBox[FIFONumber].RDHR;
|
||
RxMessage->Data[5] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDHR >> 8);
|
||
RxMessage->Data[6] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDHR >> 16);
|
||
RxMessage->Data[7] = (u8)0xFF & (CAN->sFIFOMailBox[FIFONumber].RDHR >> 24);
|
||
|
||
/* Release the FIFO */
|
||
CAN_FIFORelease(FIFONumber);
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_Sleep
|
||
* Description : Enters the low power mode.
|
||
* Input : None.
|
||
* Output : None.
|
||
* Return : CANSLEEPOK if sleep entered, CANSLEEPFAILED in an other case.
|
||
*******************************************************************************/
|
||
u8 CAN_Sleep(void)
|
||
{
|
||
u8 SleepStatus = 0;
|
||
|
||
/* Sleep mode entering request */
|
||
CAN->MCR |= MCR_SLEEP;
|
||
SleepStatus = CANSLEEPOK;
|
||
|
||
/* Sleep mode status */
|
||
if ((CAN->MCR&MCR_SLEEP) == 0)
|
||
{
|
||
/* Sleep mode not entered */
|
||
SleepStatus = CANSLEEPFAILED;
|
||
}
|
||
|
||
/* At this step, sleep mode status */
|
||
return SleepStatus;
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_WakeUp
|
||
* Description : Wakes the CAN up.
|
||
* Input : None.
|
||
* Output : None.
|
||
* Return : CANWAKEUPOK if sleep mode left, CANWAKEUPFAILED in an other
|
||
* case.
|
||
*******************************************************************************/
|
||
u8 CAN_WakeUp(void)
|
||
{
|
||
u8 WakeUpStatus = 0;
|
||
|
||
/* Wake up request */
|
||
CAN->MCR &= ~MCR_SLEEP;
|
||
WakeUpStatus = CANWAKEUPFAILED;
|
||
|
||
/* Sleep mode status */
|
||
if ((CAN->MCR&MCR_SLEEP) == 0)
|
||
{
|
||
/* Sleep mode exited */
|
||
WakeUpStatus = CANWAKEUPOK;
|
||
}
|
||
|
||
/* At this step, sleep mode status */
|
||
return WakeUpStatus;
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_GetFlagStatus
|
||
* Description : Checks whether the specified CAN flag is set or not.
|
||
* Input : CAN_FLAG: specifies the flag to check.
|
||
* This parameter can be: CAN_FLAG_EWG, CAN_FLAG_EPV or
|
||
* CAN_FLAG_BOF.
|
||
* Output : None.
|
||
* Return : The new state of CAN_FLAG (SET or RESET).
|
||
*******************************************************************************/
|
||
FlagStatus CAN_GetFlagStatus(u32 CAN_FLAG)
|
||
{
|
||
FlagStatus bitstatus = RESET;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_FLAG(CAN_FLAG));
|
||
|
||
/* Check the status of the specified CAN flag */
|
||
if ((CAN->ESR & CAN_FLAG) != (u32)RESET)
|
||
{
|
||
/* CAN_FLAG is set */
|
||
bitstatus = SET;
|
||
}
|
||
else
|
||
{
|
||
/* CAN_FLAG is reset */
|
||
bitstatus = RESET;
|
||
}
|
||
/* Return the CAN_FLAG status */
|
||
return bitstatus;
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_ClearFlag
|
||
* Description : Clears the CAN's pending flags.
|
||
* Input : CAN_FLAG: specifies the flag to clear.
|
||
* Output : None.
|
||
* Return : None.
|
||
*******************************************************************************/
|
||
void CAN_ClearFlag(u32 CAN_FLAG)
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_FLAG(CAN_FLAG));
|
||
|
||
/* Clear the selected CAN flags */
|
||
CAN->ESR &= ~CAN_FLAG;
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_GetITStatus
|
||
* Description : Checks whether the specified CAN interrupt has occurred or
|
||
* not.
|
||
* Input : CAN_IT: specifies the CAN interrupt source to check.
|
||
* This parameter can be: CAN_IT_RQCP0, CAN_IT_RQCP1, CAN_IT_RQCP2,
|
||
* CAN_IT_FF0, CAN_IT_FOV0, CAN_IT_FF1,
|
||
* CAN_IT_FOV1, CAN_IT_EWG, CAN_IT_EPV,
|
||
* CAN_IT_BOF, CAN_IT_WKU or CAN_IT_SLK.
|
||
* Output : None.
|
||
* Return : The new state of CAN_IT (SET or RESET).
|
||
*******************************************************************************/
|
||
ITStatus CAN_GetITStatus(u32 CAN_IT)
|
||
{
|
||
ITStatus pendingbitstatus = RESET;
|
||
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_ITStatus(CAN_IT));
|
||
|
||
switch (CAN_IT)
|
||
{
|
||
case CAN_IT_RQCP0:
|
||
pendingbitstatus = CheckITStatus(CAN->TSR, TSR_RQCP0);
|
||
break;
|
||
case CAN_IT_RQCP1:
|
||
pendingbitstatus = CheckITStatus(CAN->TSR, TSR_RQCP1);
|
||
break;
|
||
case CAN_IT_RQCP2:
|
||
pendingbitstatus = CheckITStatus(CAN->TSR, TSR_RQCP2);
|
||
break;
|
||
case CAN_IT_FF0:
|
||
pendingbitstatus = CheckITStatus(CAN->RF0R, RF0R_FULL0);
|
||
break;
|
||
case CAN_IT_FOV0:
|
||
pendingbitstatus = CheckITStatus(CAN->RF0R, RF0R_FOVR0);
|
||
break;
|
||
case CAN_IT_FF1:
|
||
pendingbitstatus = CheckITStatus(CAN->RF1R, RF1R_FULL1);
|
||
break;
|
||
case CAN_IT_FOV1:
|
||
pendingbitstatus = CheckITStatus(CAN->RF1R, RF1R_FOVR1);
|
||
break;
|
||
case CAN_IT_EWG:
|
||
pendingbitstatus = CheckITStatus(CAN->ESR, ESR_EWGF);
|
||
break;
|
||
case CAN_IT_EPV:
|
||
pendingbitstatus = CheckITStatus(CAN->ESR, ESR_EPVF);
|
||
break;
|
||
case CAN_IT_BOF:
|
||
pendingbitstatus = CheckITStatus(CAN->ESR, ESR_BOFF);
|
||
break;
|
||
case CAN_IT_SLK:
|
||
pendingbitstatus = CheckITStatus(CAN->MSR, MSR_SLAKI);
|
||
break;
|
||
case CAN_IT_WKU:
|
||
pendingbitstatus = CheckITStatus(CAN->MSR, MSR_WKUI);
|
||
break;
|
||
|
||
default :
|
||
pendingbitstatus = RESET;
|
||
break;
|
||
}
|
||
|
||
/* Return the CAN_IT status */
|
||
return pendingbitstatus;
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CAN_ClearITPendingBit
|
||
* Description : Clears the CAN<41>s interrupt pending bits.
|
||
* Input : CAN_IT: specifies the interrupt pending bit to clear.
|
||
* Output : None.
|
||
* Return : None.
|
||
*******************************************************************************/
|
||
void CAN_ClearITPendingBit(u32 CAN_IT)
|
||
{
|
||
/* Check the parameters */
|
||
assert_param(IS_CAN_ITStatus(CAN_IT));
|
||
|
||
switch (CAN_IT)
|
||
{
|
||
case CAN_IT_RQCP0:
|
||
CAN->TSR = TSR_RQCP0; /* rc_w1*/
|
||
break;
|
||
case CAN_IT_RQCP1:
|
||
CAN->TSR = TSR_RQCP1; /* rc_w1*/
|
||
break;
|
||
case CAN_IT_RQCP2:
|
||
CAN->TSR = TSR_RQCP2; /* rc_w1*/
|
||
break;
|
||
case CAN_IT_FF0:
|
||
CAN->RF0R = RF0R_FULL0; /* rc_w1*/
|
||
break;
|
||
case CAN_IT_FOV0:
|
||
CAN->RF0R = RF0R_FOVR0; /* rc_w1*/
|
||
break;
|
||
case CAN_IT_FF1:
|
||
CAN->RF1R = RF1R_FULL1; /* rc_w1*/
|
||
break;
|
||
case CAN_IT_FOV1:
|
||
CAN->RF1R = RF1R_FOVR1; /* rc_w1*/
|
||
break;
|
||
case CAN_IT_EWG:
|
||
CAN->ESR &= ~ ESR_EWGF; /* rw */
|
||
break;
|
||
case CAN_IT_EPV:
|
||
CAN->ESR &= ~ ESR_EPVF; /* rw */
|
||
break;
|
||
case CAN_IT_BOF:
|
||
CAN->ESR &= ~ ESR_BOFF; /* rw */
|
||
break;
|
||
case CAN_IT_WKU:
|
||
CAN->MSR = MSR_WKUI; /* rc_w1*/
|
||
break;
|
||
case CAN_IT_SLK:
|
||
CAN->MSR = MSR_SLAKI; /* rc_w1*/
|
||
break;
|
||
default :
|
||
break;
|
||
}
|
||
}
|
||
|
||
/*******************************************************************************
|
||
* Function Name : CheckITStatus
|
||
* Description : Checks whether the CAN interrupt has occurred or not.
|
||
* Input : CAN_Reg: specifies the CAN interrupt register to check.
|
||
* It_Bit: specifies the interrupt source bit to check.
|
||
* Output : None.
|
||
* Return : The new state of the CAN Interrupt (SET or RESET).
|
||
*******************************************************************************/
|
||
static ITStatus CheckITStatus(u32 CAN_Reg, u32 It_Bit)
|
||
{
|
||
ITStatus pendingbitstatus = RESET;
|
||
|
||
if ((CAN_Reg & It_Bit) != (u32)RESET)
|
||
{
|
||
/* CAN_IT is set */
|
||
pendingbitstatus = SET;
|
||
}
|
||
else
|
||
{
|
||
/* CAN_IT is reset */
|
||
pendingbitstatus = RESET;
|
||
}
|
||
|
||
return pendingbitstatus;
|
||
}
|
||
|
||
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
|