59 lines
2.6 KiB
C
59 lines
2.6 KiB
C
/******************************************************************************************************************************************
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* 文件名称: SWM320_sdram.c
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* 功能说明: SWM320单片机的SDRAM驱动程序
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* 技术支持: http://www.synwit.com.cn/e/tool/gbook/?bid=1
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* 注意事项:
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* 版本日期: V1.1.0 2017年10月25日
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* 升级记录:
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*
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*
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*******************************************************************************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH CODING INFORMATION
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* REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS A RESULT, SYNWIT SHALL NOT BE HELD LIABLE
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* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
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* OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONN-
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* -ECTION WITH THEIR PRODUCTS.
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*
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* COPYRIGHT 2012 Synwit Technology
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*******************************************************************************************************************************************/
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#include "SWM320.h"
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#include "SWM320_sdram.h"
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/******************************************************************************************************************************************
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* 函数名称: SDRAM_Init()
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* 功能说明: SDRAM控制器初始化
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* 输 入: SDRAM_InitStructure * initStruct 包含NOR Flash控制器相关设定值的结构体
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* 输 出: 无
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* 注意事项: 无
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******************************************************************************************************************************************/
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void SDRAM_Init(SDRAM_InitStructure *initStruct)
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{
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SYS->CLKEN |= (1 << SYS_CLKEN_SDRAM_Pos);
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SYS->CLKDIV &= ~SYS_CLKDIV_SDRAM_Msk;
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SYS->CLKDIV |= (1 << SYS_CLKDIV_SDRAM_Pos); //2分频
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SDRAMC->CR0 = (2 << SDRAMC_CR0_BURSTLEN_Pos) | //2 Burst Length为4
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(2 << SDRAMC_CR0_CASDELAY_Pos);
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SDRAMC->CR1 = (initStruct->CellSize << SDRAMC_CR1_CELLSIZE_Pos) |
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((initStruct->CellWidth == 16 ? 0 : 1) << SDRAMC_CR1_CELL32BIT_Pos) |
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(initStruct->CellBank << SDRAMC_CR1_BANK_Pos) |
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((initStruct->DataWidth == 16 ? 0 : 1) << SDRAMC_CR1_32BIT_Pos) |
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(7 << SDRAMC_CR1_TMRD_Pos) |
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(3 << SDRAMC_CR1_TRRD_Pos) |
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(7 << SDRAMC_CR1_TRAS_Pos) |
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(8 << SDRAMC_CR1_TRC_Pos) |
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(3 << SDRAMC_CR1_TRCD_Pos) |
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(3 << SDRAMC_CR1_TRP_Pos);
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SDRAMC->LATCH = 0x02;
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SDRAMC->REFRESH = (1 << SDRAMC_REFRESH_EN_Pos) |
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(0x0FA << SDRAMC_REFRESH_RATE_Pos);
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while (SDRAMC->REFDONE == 0);
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}
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