305 lines
8.8 KiB
C
305 lines
8.8 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-08-23 balanceTWK first version
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*/
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#include "board.h"
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#include "drv_config.h"
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#ifdef RT_USING_PULSE_ENCODER
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//#define DRV_DEBUG
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#define LOG_TAG "drv.pulse_encoder"
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#include <drv_log.h>
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#if !defined(BSP_USING_PULSE_ENCODER1) && !defined(BSP_USING_PULSE_ENCODER2) && !defined(BSP_USING_PULSE_ENCODER3) \
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&& !defined(BSP_USING_PULSE_ENCODER4) && !defined(BSP_USING_PULSE_ENCODER5) && !defined(BSP_USING_PULSE_ENCODER6)
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#error "Please define at least one BSP_USING_PULSE_ENCODERx"
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/* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
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#endif
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#define AUTO_RELOAD_VALUE 0x7FFF
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enum
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{
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#ifdef BSP_USING_PULSE_ENCODER1
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PULSE_ENCODER1_INDEX,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER2
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PULSE_ENCODER2_INDEX,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER3
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PULSE_ENCODER3_INDEX,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER4
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PULSE_ENCODER4_INDEX,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER5
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PULSE_ENCODER5_INDEX,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER6
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PULSE_ENCODER6_INDEX,
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#endif
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};
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struct stm32_pulse_encoder_device
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{
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struct rt_pulse_encoder_device pulse_encoder;
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TIM_HandleTypeDef tim_handler;
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IRQn_Type encoder_irqn;
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rt_int32_t over_under_flowcount;
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char *name;
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};
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static struct stm32_pulse_encoder_device stm32_pulse_encoder_obj[] =
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{
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#ifdef BSP_USING_PULSE_ENCODER1
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PULSE_ENCODER1_CONFIG,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER2
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PULSE_ENCODER2_CONFIG,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER3
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PULSE_ENCODER3_CONFIG,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER4
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PULSE_ENCODER4_CONFIG,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER5
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PULSE_ENCODER5_CONFIG,
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#endif
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#ifdef BSP_USING_PULSE_ENCODER6
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PULSE_ENCODER6_CONFIG,
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#endif
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};
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rt_err_t pulse_encoder_init(struct rt_pulse_encoder_device *pulse_encoder)
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{
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TIM_Encoder_InitTypeDef sConfig;
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TIM_MasterConfigTypeDef sMasterConfig;
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struct stm32_pulse_encoder_device *stm32_device;
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stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
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stm32_device->tim_handler.Init.Prescaler = 0;
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stm32_device->tim_handler.Init.CounterMode = TIM_COUNTERMODE_UP;
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stm32_device->tim_handler.Init.Period = AUTO_RELOAD_VALUE;
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stm32_device->tim_handler.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
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stm32_device->tim_handler.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
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sConfig.EncoderMode = TIM_ENCODERMODE_TI12;
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sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
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sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
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sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
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sConfig.IC1Filter = 3;
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sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
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sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
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sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
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sConfig.IC2Filter = 3;
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if (HAL_TIM_Encoder_Init(&stm32_device->tim_handler, &sConfig) != HAL_OK)
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{
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LOG_E("pulse_encoder init failed");
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return -RT_ERROR;
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}
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sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
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sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
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if (HAL_TIMEx_MasterConfigSynchronization(&stm32_device->tim_handler, &sMasterConfig))
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{
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LOG_E("TIMx master config failed");
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return -RT_ERROR;
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}
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else
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{
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HAL_NVIC_SetPriority(stm32_device->encoder_irqn, 3, 0);
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/* enable the TIMx global Interrupt */
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HAL_NVIC_EnableIRQ(stm32_device->encoder_irqn);
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/* clear update flag */
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__HAL_TIM_CLEAR_FLAG(&stm32_device->tim_handler, TIM_FLAG_UPDATE);
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/* enable update request source */
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__HAL_TIM_URS_ENABLE(&stm32_device->tim_handler);
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}
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return RT_EOK;
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}
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rt_err_t pulse_encoder_clear_count(struct rt_pulse_encoder_device *pulse_encoder)
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{
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struct stm32_pulse_encoder_device *stm32_device;
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stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
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stm32_device->over_under_flowcount = 0;
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__HAL_TIM_SET_COUNTER(&stm32_device->tim_handler, 0);
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return RT_EOK;
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}
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rt_int32_t pulse_encoder_get_count(struct rt_pulse_encoder_device *pulse_encoder)
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{
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struct stm32_pulse_encoder_device *stm32_device;
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stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
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return (rt_int32_t)((rt_int16_t)__HAL_TIM_GET_COUNTER(&stm32_device->tim_handler) + stm32_device->over_under_flowcount * AUTO_RELOAD_VALUE);
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}
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rt_err_t pulse_encoder_control(struct rt_pulse_encoder_device *pulse_encoder, rt_uint32_t cmd, void *args)
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{
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rt_err_t result;
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struct stm32_pulse_encoder_device *stm32_device;
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stm32_device = (struct stm32_pulse_encoder_device*)pulse_encoder;
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result = RT_EOK;
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switch (cmd)
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{
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case PULSE_ENCODER_CMD_ENABLE:
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HAL_TIM_Encoder_Start(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
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HAL_TIM_Encoder_Start_IT(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
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break;
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case PULSE_ENCODER_CMD_DISABLE:
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HAL_TIM_Encoder_Stop(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
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HAL_TIM_Encoder_Stop_IT(&stm32_device->tim_handler, TIM_CHANNEL_ALL);
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break;
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default:
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result = -RT_ENOSYS;
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break;
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}
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return result;
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}
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void pulse_encoder_update_isr(struct stm32_pulse_encoder_device *device)
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{
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/* TIM Update event */
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if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_UPDATE) != RESET)
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{
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__HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_UPDATE);
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if (__HAL_TIM_IS_TIM_COUNTING_DOWN(&device->tim_handler))
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{
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device->over_under_flowcount--;
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}
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else
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{
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device->over_under_flowcount++;
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}
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}
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/* Capture compare 1 event */
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if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC1) != RESET)
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{
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__HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC1);
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}
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/* Capture compare 2 event */
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if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC2) != RESET)
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{
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__HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC2);
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}
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/* Capture compare 3 event */
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if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC3) != RESET)
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{
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__HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC3);
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}
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/* Capture compare 4 event */
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if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_CC4) != RESET)
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{
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__HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_CC4);
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}
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/* TIM Break input event */
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if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_BREAK) != RESET)
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{
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__HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_BREAK);
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}
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/* TIM Trigger detection event */
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if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_TRIGGER) != RESET)
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{
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__HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_IT_TRIGGER);
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}
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/* TIM commutation event */
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if (__HAL_TIM_GET_FLAG(&device->tim_handler, TIM_FLAG_COM) != RESET)
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{
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__HAL_TIM_CLEAR_IT(&device->tim_handler, TIM_FLAG_COM);
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}
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}
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#ifdef BSP_USING_PULSE_ENCODER1
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#if defined(SOC_SERIES_STM32F4)
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void TIM1_UP_TIM10_IRQHandler(void)
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#elif defined(SOC_SERIES_STM32F1)
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void TIM1_UP_IRQHandler(void)
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#else
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#error "Please check TIM1's IRQHandler"
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#endif
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{
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/* enter interrupt */
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rt_interrupt_enter();
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pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER1_INDEX]);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef BSP_USING_PULSE_ENCODER2
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void TIM2_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER2_INDEX]);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef BSP_USING_PULSE_ENCODER3
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void TIM3_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER3_INDEX]);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef BSP_USING_PULSE_ENCODER4
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void TIM4_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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pulse_encoder_update_isr(&stm32_pulse_encoder_obj[PULSE_ENCODER4_INDEX]);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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static const struct rt_pulse_encoder_ops _ops =
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{
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.init = pulse_encoder_init,
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.get_count = pulse_encoder_get_count,
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.clear_count = pulse_encoder_clear_count,
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.control = pulse_encoder_control,
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};
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int hw_pulse_encoder_init(void)
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{
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int i;
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int result;
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result = RT_EOK;
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for (i = 0; i < sizeof(stm32_pulse_encoder_obj) / sizeof(stm32_pulse_encoder_obj[0]); i++)
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{
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stm32_pulse_encoder_obj[i].pulse_encoder.type = AB_PHASE_PULSE_ENCODER;
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stm32_pulse_encoder_obj[i].pulse_encoder.ops = &_ops;
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if (rt_device_pulse_encoder_register(&stm32_pulse_encoder_obj[i].pulse_encoder, stm32_pulse_encoder_obj[i].name, RT_NULL) != RT_EOK)
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{
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LOG_E("%s register failed", stm32_pulse_encoder_obj[i].name);
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result = -RT_ERROR;
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}
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}
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return result;
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}
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INIT_BOARD_EXPORT(hw_pulse_encoder_init);
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#endif
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