466 lines
16 KiB
C
466 lines
16 KiB
C
/**********************************************************************
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* $Id$ lpc_rtc.h 2011-06-02
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*//**
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* @file lpc_rtc.h
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* @brief Contains all macro definitions and function prototypes
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* support for RTC firmware library on LPC
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* @version 1.0
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* @date 02. June. 2011
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* @author NXP MCU SW Application Team
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*
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* Copyright(C) 2011, NXP Semiconductor
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* All rights reserved.
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*
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***********************************************************************
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* products. This software is supplied "AS IS" without any warranties.
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* NXP Semiconductors assumes no responsibility or liability for the
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* use of the software, conveys no license or title under any patent,
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* copyright, or mask work right to the product. NXP Semiconductors
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* reserves the right to make changes in the software without
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* notification. NXP Semiconductors also make no representation or
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* warranty that such application will be suitable for the specified
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* use without further testing or modification.
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors'
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* relevant copyright in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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**********************************************************************/
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/* Peripheral group ----------------------------------------------------------- */
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/** @defgroup RTC RTC (Real Time Clock)
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* @ingroup LPC_CMSIS_FwLib_Drivers
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* @{
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*/
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#ifndef __LPC_RTC_H_
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#define __LPC_RTC_H_
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/* Includes ------------------------------------------------------------------- */
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#include "LPC407x_8x_177x_8x.h"
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#include "lpc_types.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* Private Macros ------------------------------------------------------------- */
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/** @defgroup RTC_Private_Macros RTC Private Macros
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* @{
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*/
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/* ----------------------- BIT DEFINITIONS ----------------------------------- */
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/* Miscellaneous register group --------------------------------------------- */
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/**********************************************************************
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* ILR register definitions
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**********************************************************************/
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/** ILR register mask */
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#define RTC_ILR_BITMASK ((0x00000003))
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/** Bit inform the source interrupt is counter increment*/
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#define RTC_IRL_RTCCIF ((1<<0))
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/** Bit inform the source interrupt is alarm match*/
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#define RTC_IRL_RTCALF ((1<<1))
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/**********************************************************************
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* CCR register definitions
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**********************************************************************/
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/** CCR register mask */
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#define RTC_CCR_BITMASK ((0x00000013))
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/** Clock enable */
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#define RTC_CCR_CLKEN ((1<<0))
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/** Clock reset */
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#define RTC_CCR_CTCRST ((1<<1))
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/** Calibration counter enable */
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#define RTC_CCR_CCALEN ((1<<4))
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/**********************************************************************
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* CIIR register definitions
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**********************************************************************/
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/** Counter Increment Interrupt bit for second */
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#define RTC_CIIR_IMSEC ((1<<0))
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/** Counter Increment Interrupt bit for minute */
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#define RTC_CIIR_IMMIN ((1<<1))
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/** Counter Increment Interrupt bit for hour */
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#define RTC_CIIR_IMHOUR ((1<<2))
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/** Counter Increment Interrupt bit for day of month */
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#define RTC_CIIR_IMDOM ((1<<3))
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/** Counter Increment Interrupt bit for day of week */
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#define RTC_CIIR_IMDOW ((1<<4))
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/** Counter Increment Interrupt bit for day of year */
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#define RTC_CIIR_IMDOY ((1<<5))
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/** Counter Increment Interrupt bit for month */
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#define RTC_CIIR_IMMON ((1<<6))
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/** Counter Increment Interrupt bit for year */
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#define RTC_CIIR_IMYEAR ((1<<7))
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/** CIIR bit mask */
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#define RTC_CIIR_BITMASK ((0xFF))
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/**********************************************************************
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* AMR register definitions
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**********************************************************************/
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/** Counter Increment Select Mask bit for second */
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#define RTC_AMR_AMRSEC ((1<<0))
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/** Counter Increment Select Mask bit for minute */
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#define RTC_AMR_AMRMIN ((1<<1))
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/** Counter Increment Select Mask bit for hour */
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#define RTC_AMR_AMRHOUR ((1<<2))
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/** Counter Increment Select Mask bit for day of month */
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#define RTC_AMR_AMRDOM ((1<<3))
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/** Counter Increment Select Mask bit for day of week */
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#define RTC_AMR_AMRDOW ((1<<4))
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/** Counter Increment Select Mask bit for day of year */
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#define RTC_AMR_AMRDOY ((1<<5))
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/** Counter Increment Select Mask bit for month */
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#define RTC_AMR_AMRMON ((1<<6))
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/** Counter Increment Select Mask bit for year */
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#define RTC_AMR_AMRYEAR ((1<<7))
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/** AMR bit mask */
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#define RTC_AMR_BITMASK ((0xFF))
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/**********************************************************************
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* RTC_AUX register definitions
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**********************************************************************/
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/** RTC Oscillator Fail detect flag */
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#define RTC_AUX_RTC_OSCF ((1<<4))
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/**********************************************************************
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* RTC_AUXEN register definitions
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**********************************************************************/
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/** Oscillator Fail Detect interrupt enable*/
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#define RTC_AUXEN_RTC_OSCFEN ((1<<4))
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/* Consolidated time register group ----------------------------------- */
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/**********************************************************************
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* Consolidated Time Register 0 definitions
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**********************************************************************/
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#define RTC_CTIME0_SECONDS_MASK ((0x3F))
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#define RTC_CTIME0_MINUTES_MASK ((0x3F00))
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#define RTC_CTIME0_HOURS_MASK ((0x1F0000))
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#define RTC_CTIME0_DOW_MASK ((0x7000000))
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/**********************************************************************
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* Consolidated Time Register 1 definitions
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**********************************************************************/
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#define RTC_CTIME1_DOM_MASK ((0x1F))
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#define RTC_CTIME1_MONTH_MASK ((0xF00))
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#define RTC_CTIME1_YEAR_MASK ((0xFFF0000))
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/**********************************************************************
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* Consolidated Time Register 2 definitions
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**********************************************************************/
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#define RTC_CTIME2_DOY_MASK ((0xFFF))
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/**********************************************************************
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* Time Counter Group and Alarm register group
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**********************************************************************/
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/** SEC register mask */
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#define RTC_SEC_MASK (0x0000003F)
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/** MIN register mask */
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#define RTC_MIN_MASK (0x0000003F)
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/** HOUR register mask */
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#define RTC_HOUR_MASK (0x0000001F)
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/** DOM register mask */
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#define RTC_DOM_MASK (0x0000001F)
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/** DOW register mask */
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#define RTC_DOW_MASK (0x00000007)
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/** DOY register mask */
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#define RTC_DOY_MASK (0x000001FF)
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/** MONTH register mask */
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#define RTC_MONTH_MASK (0x0000000F)
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/** YEAR register mask */
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#define RTC_YEAR_MASK (0x00000FFF)
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/** Maximum value of second */
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#define RTC_SECOND_MAX 59
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/** Maximum value of minute*/
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#define RTC_MINUTE_MAX 59
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/** Maximum value of hour*/
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#define RTC_HOUR_MAX 23
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/** Minimum value of month*/
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#define RTC_MONTH_MIN 1
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/** Maximum value of month*/
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#define RTC_MONTH_MAX 12
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/** Minimum value of day of month*/
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#define RTC_DAYOFMONTH_MIN 1
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/** Maximum value of day of month*/
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#define RTC_DAYOFMONTH_MAX 31
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/** Maximum value of day of week*/
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#define RTC_DAYOFWEEK_MAX 6
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/** Minimum value of day of year*/
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#define RTC_DAYOFYEAR_MIN 1
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/** Maximum value of day of year*/
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#define RTC_DAYOFYEAR_MAX 366
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/** Maximum value of year*/
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#define RTC_YEAR_MAX 4095
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/**********************************************************************
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* Calibration register
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**********************************************************************/
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/** Calibration value */
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#define RTC_CALIBRATION_CALVAL_MASK ((0x1FFFF))
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/** Calibration direction */
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#define RTC_CALIBRATION_LIBDIR ((1<<17))
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/** Calibration max value */
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#define RTC_CALIBRATION_MAX ((0x20000))
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/** Calibration definitions */
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#define RTC_CALIB_DIR_FORWARD ((uint8_t)(0))
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#define RTC_CALIB_DIR_BACKWARD ((uint8_t)(1))
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/**********************************************************************
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* Event Monitor/Recorder Control register
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**********************************************************************/
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#define RTC_ERCTRL_EV0_INTWAKE_ENABLE (1<<0)
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#define RTC_ERCTRL_EV0_GPCLEAR_ENABLE (1<<1)
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#define RTC_ERCTRL_EV0_POS_EDGE (1<<2)
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#define RTC_ERCTRL_EV0_NEG_EDGE (0<<2)
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#define RTC_ERCTRL_EV0_INPUT_ENABLE (1<<3)
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#define RTC_ERCTRL_EV1_INTWAKE_ENABLE (1<<10)
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#define RTC_ERCTRL_EV1_GPCLEAR_ENABLE (1<<11)
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#define RTC_ERCTRL_EV1_POS_EDGE (1<<12)
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#define RTC_ERCTRL_EV1_NEG_EDGE (0<<12)
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#define RTC_ERCTRL_EV1_INPUT_ENABLE (1<<13)
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#define RTC_ERCTRL_EV2_INTWAKE_ENABLE (1<<20)
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#define RTC_ERCTRL_EV2_GPCLEAR_ENABLE (1<<21)
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#define RTC_ERCTRL_EV2_POS_EDGE (1<<22)
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#define RTC_ERCTRL_EV2_NEG_EDGE (0<<22)
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#define RTC_ERCTRL_EV2_INPUT_ENABLE (1<<23)
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#define RTC_ERCTRL_MODE_MASK (((uint32_t)3)<<30)
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#define RTC_ERCTRL_MODE_CLK_DISABLE (((uint32_t)0)<<30)
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#define RTC_ERCTRL_MODE_16HZ (((uint32_t)1)<<30)
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#define RTC_ERCTRL_MODE_64HZ (((uint32_t)2)<<30)
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#define RTC_ERCTRL_MODE_1KHZ (((uint32_t)3)<<30)
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#define RTC_ER_INPUT_CHANNEL_NUM (3)
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/**********************************************************************
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* Event Monitor/Recorder Status register
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**********************************************************************/
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#define RTC_ER_STATUS_EV0_BIT (0)
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#define RTC_ER_STATUS_EV1_BIT (1)
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#define RTC_ER_STATUS_EV2_BIT (2)
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#define RTC_ER_STATUS_GPCLEARED_BIT (3)
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#define RTC_ER_STATUS_WAKEUP_BIT (31)
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#define RTC_ER_EVENTS_ON_EV0_FLG (1<<RTC_ER_STATUS_EV0_BIT)
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#define RTC_ER_EVENTS_ON_EV1_FLG (1<<RTC_ER_STATUS_EV1_BIT)
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#define RTC_ER_EVENTS_ON_EV2_FLG (1<<RTC_ER_STATUS_EV2_BIT)
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#define RTC_ER_STATUS_GP_CLEARED_FLG (1<<RTC_ER_STATUS_GPCLEARED_BIT)
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#define RTC_ER_STATUS_WAKEUP_REQ_PENDING (((uint32_t)1)<<RTC_ER_STATUS_WAKEUP_BIT)
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/**********************************************************************
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* Event Monitor/Recorder Counter register
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**********************************************************************/
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#define RTC_ER_EV0_COUNTER(n) (n&0x07)
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#define RTC_ER_EV1_COUNTER(n) ((n>>8)&0x07)
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#define RTC_ER_EV2_COUNTER(n) ((n>>16)&0x07)
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/**********************************************************************
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* Event Monitor/Recorder TimeStamp register
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**********************************************************************/
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#define RTC_ER_TIMESTAMP_SEC(n) (n&0x3F)
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#define RTC_ER_TIMESTAMP_MIN(n) ((n>>6)&0x3F)
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#define RTC_ER_TIMESTAMP_HOUR(n) ((n>>12)&0x1F)
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#define RTC_ER_TIMESTAMP_DOY(n) ((n>>17)&0x1FF)
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/**
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* @}
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*/
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/* Public Types --------------------------------------------------------------- */
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/** @defgroup RTC_Public_Types RTC Public Types
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* @{
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*/
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/** @brief Time structure definitions for easy manipulate the data */
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typedef struct
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{
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/** Seconds Register */
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uint32_t SEC;
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/** Minutes Register */
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uint32_t MIN;
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/** Hours Register */
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uint32_t HOUR;
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/** Day of Month Register */
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uint32_t DOM;
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/** Day of Week Register */
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uint32_t DOW;
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/** Day of Year Register */
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uint32_t DOY;
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/** Months Register */
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uint32_t MONTH;
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/** Years Register */
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uint32_t YEAR;
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} RTC_TIME_Type;
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/** @brief RTC interrupt source */
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typedef enum
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{
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/** Counter Increment Interrupt */
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RTC_INT_COUNTER_INCREASE = RTC_IRL_RTCCIF,
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/** The alarm interrupt */
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RTC_INT_ALARM = RTC_IRL_RTCALF,
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} RTC_INT_OPT;
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/** @brief RTC time type option */
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typedef enum
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{
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/** Second */
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RTC_TIMETYPE_SECOND = 0,
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/** Month */
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RTC_TIMETYPE_MINUTE = 1,
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/** Hour */
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RTC_TIMETYPE_HOUR = 2,
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/** Day of week */
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RTC_TIMETYPE_DAYOFWEEK = 3,
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/** Day of month */
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RTC_TIMETYPE_DAYOFMONTH = 4,
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/** Day of year */
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RTC_TIMETYPE_DAYOFYEAR = 5,
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/** Month */
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RTC_TIMETYPE_MONTH = 6,
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/** Year */
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RTC_TIMETYPE_YEAR = 7,
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} RTC_TIMETYPE_Num;
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/** @brief Event Monitor/Recording Input Channel configuration */
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typedef struct
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{
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Bool EventOnPosEdge; // Event occurs on positive edge on the channel
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Bool IntWake; // Create interrupt and wake-up request if there is an event
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Bool GPClear; // Clear GP registers of RTC if there is an event.
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} RTC_ER_CHANNEL_Init_Type;
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/** @brief Event Monitor/Recording configuration */
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typedef struct
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{
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RTC_ER_CHANNEL_Init_Type InputChannel[RTC_ER_INPUT_CHANNEL_NUM];
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uint32_t Clk; // Sample clock on input channel. (Hz)
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} RTC_ER_CONFIG_Type;
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/** @brief Event Monitor/Recording TimeStamp Type */
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typedef struct
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{
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/** Seconds Register */
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uint32_t SEC;
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/** Minutes Register */
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uint32_t MIN;
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/** Hours Register */
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uint32_t HOUR;
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/** Day of Year Register */
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uint32_t DOY;
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} RTC_ER_TIMESTAMP_Type;
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/**
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* @}
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*/
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/* Public Functions ----------------------------------------------------------- */
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/** @defgroup RTC_Public_Functions RTC Public Functions
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* @{
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*/
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void RTC_Init (LPC_RTC_TypeDef *RTCx);
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void RTC_DeInit(LPC_RTC_TypeDef *RTCx);
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void RTC_ResetClockTickCounter(LPC_RTC_TypeDef *RTCx);
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void RTC_Cmd (LPC_RTC_TypeDef *RTCx, FunctionalState NewState);
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void RTC_CntIncrIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t CntIncrIntType, \
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FunctionalState NewState);
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void RTC_AlarmIntConfig (LPC_RTC_TypeDef *RTCx, uint32_t AlarmTimeType, \
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FunctionalState NewState);
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void RTC_SetTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t TimeValue);
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uint32_t RTC_GetTime(LPC_RTC_TypeDef *RTCx, uint32_t Timetype);
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void RTC_SetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
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void RTC_GetFullTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
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void RTC_SetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype, uint32_t ALValue);
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uint32_t RTC_GetAlarmTime (LPC_RTC_TypeDef *RTCx, uint32_t Timetype);
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void RTC_SetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
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void RTC_GetFullAlarmTime (LPC_RTC_TypeDef *RTCx, RTC_TIME_Type *pFullTime);
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IntStatus RTC_GetIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType);
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void RTC_ClearIntPending (LPC_RTC_TypeDef *RTCx, uint32_t IntType);
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void RTC_CalibCounterCmd(LPC_RTC_TypeDef *RTCx, FunctionalState NewState);
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void RTC_CalibConfig(LPC_RTC_TypeDef *RTCx, uint32_t CalibValue, uint8_t CalibDir);
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void RTC_WriteGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel, uint32_t Value);
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uint32_t RTC_ReadGPREG (LPC_RTC_TypeDef *RTCx, uint8_t Channel);
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void RTC_ER_InitConfigStruct(RTC_ER_CONFIG_Type* pConfig);
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Status RTC_ER_Init(RTC_ER_CONFIG_Type* pConfig);
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Status RTC_ER_Cmd(uint8_t channel, FunctionalState state);
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uint8_t RTC_ER_GetEventCount(uint8_t channel);
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uint32_t RTC_ER_GetStatus(void);
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Bool RTC_ER_WakupReqPending(void);
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Bool RTC_ER_GPCleared(void);
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Status RTC_ER_GetFirstTimeStamp(uint8_t channel, RTC_ER_TIMESTAMP_Type* pTimeStamp);
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Status RTC_ER_GetLastTimeStamp(uint8_t channel, RTC_ER_TIMESTAMP_Type* pTimeStamp);
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void RTC_ER_ClearStatus(uint32_t status);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __LPC_RTC_H_ */
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/**
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* @}
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*/
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/* --------------------------------- End Of File ------------------------------ */
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