216 lines
8.1 KiB
C
216 lines
8.1 KiB
C
/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_IOCON_H_
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#define _FSL_IOCON_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup lpc_iocon
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* @{
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*/
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/*! @file */
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* Component ID definition, used by tools. */
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#ifndef FSL_COMPONENT_ID
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#define FSL_COMPONENT_ID "platform.drivers.lpc_iocon"
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#endif
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/*! @name Driver version */
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/*@{*/
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/*! @brief IOCON driver version. */
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#define FSL_IOCON_DRIVER_VERSION (MAKE_VERSION(2, 2, 0))
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/*@}*/
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/**
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* @brief Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format
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*/
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typedef struct _iocon_group
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{
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uint8_t port; /* Pin port */
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uint8_t pin; /* Pin number */
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uint8_t ionumber; /* IO number */
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uint16_t modefunc; /* Function and mode */
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} iocon_group_t;
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/**
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* @brief IOCON function and mode selection definitions
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* @note See the User Manual for specific modes and functions supported by the various pins.
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*/
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#define IOCON_FUNC0 0x0 /*!< Selects pin function 0 */
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#define IOCON_FUNC1 0x1 /*!< Selects pin function 1 */
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#define IOCON_FUNC2 0x2 /*!< Selects pin function 2 */
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#define IOCON_FUNC3 0x3 /*!< Selects pin function 3 */
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#define IOCON_FUNC4 0x4 /*!< Selects pin function 4 */
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#define IOCON_FUNC5 0x5 /*!< Selects pin function 5 */
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#define IOCON_FUNC6 0x6 /*!< Selects pin function 6 */
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#define IOCON_FUNC7 0x7 /*!< Selects pin function 7 */
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#if defined(FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH) && (FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH == 4)
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#define IOCON_FUNC8 0x8 /*!< Selects pin function 8 */
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#define IOCON_FUNC9 0x9 /*!< Selects pin function 9 */
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#define IOCON_FUNC10 0xA /*!< Selects pin function 10 */
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#define IOCON_FUNC11 0xB /*!< Selects pin function 11 */
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#define IOCON_FUNC12 0xC /*!< Selects pin function 12 */
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#define IOCON_FUNC13 0xD /*!< Selects pin function 13 */
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#define IOCON_FUNC14 0xE /*!< Selects pin function 14 */
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#define IOCON_FUNC15 0xF /*!< Selects pin function 15 */
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#endif /* FSL_FEATURE_IOCON_FUNC_FIELD_WIDTH */
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#if defined(IOCON_PIO_MODE_SHIFT)
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#define IOCON_MODE_INACT (0x0 << IOCON_PIO_MODE_SHIFT) /*!< No addition pin function */
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#define IOCON_MODE_PULLDOWN (0x1 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-down function */
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#define IOCON_MODE_PULLUP (0x2 << IOCON_PIO_MODE_SHIFT) /*!< Selects pull-up function */
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#define IOCON_MODE_REPEATER (0x3 << IOCON_PIO_MODE_SHIFT) /*!< Selects pin repeater function */
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#endif
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#if defined(IOCON_PIO_I2CSLEW_SHIFT)
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#define IOCON_GPIO_MODE (0x1 << IOCON_PIO_I2CSLEW_SHIFT) /*!< GPIO Mode */
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#define IOCON_I2C_MODE (0x0 << IOCON_PIO_I2CSLEW_SHIFT) /*!< I2C Slew Rate Control */
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#define IOCON_I2C_SLEW IOCON_I2C_MODE /*!< Deprecated name for #IOCON_I2C_MODE */
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#endif
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#if defined(IOCON_PIO_EGP_SHIFT)
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#define IOCON_GPIO_MODE (0x1 << IOCON_PIO_EGP_SHIFT) /*!< GPIO Mode */
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#define IOCON_I2C_MODE (0x0 << IOCON_PIO_EGP_SHIFT) /*!< I2C Slew Rate Control */
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#define IOCON_I2C_SLEW IOCON_I2C_MODE /*!< Deprecated name for #IOCON_I2C_MODE */
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#endif
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#if defined(IOCON_PIO_SLEW_SHIFT)
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#define IOCON_SLEW_STANDARD (0x0 << IOCON_PIO_SLEW_SHIFT) /*!< Driver Slew Rate Control */
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#define IOCON_SLEW_FAST (0x1 << IOCON_PIO_SLEW_SHIFT) /*!< Driver Slew Rate Control */
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#endif
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#if defined(IOCON_PIO_INVERT_SHIFT)
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#define IOCON_INV_EN (0x1 << IOCON_PIO_INVERT_SHIFT) /*!< Enables invert function on input */
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#endif
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#if defined(IOCON_PIO_DIGIMODE_SHIFT)
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#define IOCON_ANALOG_EN (0x0 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables analog function by setting 0 to bit 7 */
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#define IOCON_DIGITAL_EN \
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(0x1 << IOCON_PIO_DIGIMODE_SHIFT) /*!< Enables digital function by setting 1 to bit 7(default) */
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#endif
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#if defined(IOCON_PIO_FILTEROFF_SHIFT)
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#define IOCON_INPFILT_OFF (0x1 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter Off for GPIO pins */
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#define IOCON_INPFILT_ON (0x0 << IOCON_PIO_FILTEROFF_SHIFT) /*!< Input filter On for GPIO pins */
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#endif
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#if defined(IOCON_PIO_I2CDRIVE_SHIFT)
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#define IOCON_I2C_LOWDRIVER (0x0 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< Low drive, Output drive sink is 4 mA */
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#define IOCON_I2C_HIGHDRIVER (0x1 << IOCON_PIO_I2CDRIVE_SHIFT) /*!< High drive, Output drive sink is 20 mA */
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#endif
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#if defined(IOCON_PIO_OD_SHIFT)
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#define IOCON_OPENDRAIN_EN (0x1 << IOCON_PIO_OD_SHIFT) /*!< Enables open-drain function */
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#endif
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#if defined(IOCON_PIO_I2CFILTER_SHIFT)
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#define IOCON_I2CFILTER_OFF (0x1 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter enabled */
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#define IOCON_I2CFILTER_ON (0x0 << IOCON_PIO_I2CFILTER_SHIFT) /*!< I2C 50 ns glitch filter not enabled, */
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#endif
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#if defined(IOCON_PIO_ASW_SHIFT)
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#define IOCON_AWS_EN (0x1 << IOCON_PIO_ASW_SHIFT) /*!< Enables analog switch function */
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#endif
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#if defined(IOCON_PIO_SSEL_SHIFT)
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#define IOCON_SSEL_3V3 (0x0 << IOCON_PIO_SSEL_SHIFT) /*!< 3V3 signaling in I2C mode */
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#define IOCON_SSEL_1V8 (0x1 << IOCON_PIO_SSEL_SHIFT) /*!< 1V8 signaling in I2C mode */
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#endif
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#if defined(IOCON_PIO_ECS_SHIFT)
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#define IOCON_ECS_OFF (0x0 << IOCON_PIO_ECS_SHIFT) /*!< IO is an open drain cell */
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#define IOCON_ECS_ON (0x1 << IOCON_PIO_ECS_SHIFT) /*!< Pull-up resistor is connected */
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#endif
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#if defined(IOCON_PIO_S_MODE_SHIFT)
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#define IOCON_S_MODE_0CLK (0x0 << IOCON_PIO_S_MODE_SHIFT) /*!< Bypass input filter */
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#define IOCON_S_MODE_1CLK \
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(0x1 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 1 filter clock are rejected \ \ \ \ \
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*/
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#define IOCON_S_MODE_2CLK \
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(0x2 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 2 filter clock2 are rejected \ \ \ \ \
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*/
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#define IOCON_S_MODE_3CLK \
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(0x3 << IOCON_PIO_S_MODE_SHIFT) /*!< Input pulses shorter than 3 filter clock2 are rejected \ \ \ \ \
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*/
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#define IOCON_S_MODE(clks) ((clks) << IOCON_PIO_S_MODE_SHIFT) /*!< Select clocks for digital input filter mode */
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#endif
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#if defined(IOCON_PIO_CLK_DIV_SHIFT)
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#define IOCON_CLKDIV(div) \
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((div) \
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<< IOCON_PIO_CLK_DIV_SHIFT) /*!< Select peripheral clock divider for input filter sampling clock, 2^n, n=0-6 */
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#endif
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#if defined(__cplusplus)
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extern "C" {
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#endif
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#if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
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/**
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* @brief Sets I/O Control pin mux
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* @param base : The base of IOCON peripheral on the chip
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* @param ionumber : GPIO number to mux
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* @param modefunc : OR'ed values of type IOCON_*
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* @return Nothing
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*/
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__STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t ionumber, uint32_t modefunc)
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{
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base->PIO[ionumber] = modefunc;
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}
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#else
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/**
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* @brief Sets I/O Control pin mux
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* @param base : The base of IOCON peripheral on the chip
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* @param port : GPIO port to mux
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* @param pin : GPIO pin to mux
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* @param modefunc : OR'ed values of type IOCON_*
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* @return Nothing
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*/
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__STATIC_INLINE void IOCON_PinMuxSet(IOCON_Type *base, uint8_t port, uint8_t pin, uint32_t modefunc)
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{
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base->PIO[port][pin] = modefunc;
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}
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#endif
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/**
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* @brief Set all I/O Control pin muxing
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* @param base : The base of IOCON peripheral on the chip
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* @param pinArray : Pointer to array of pin mux selections
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* @param arrayLength : Number of entries in pinArray
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* @return Nothing
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*/
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__STATIC_INLINE void IOCON_SetPinMuxing(IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)
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{
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uint32_t i;
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for (i = 0; i < arrayLength; i++)
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{
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#if (defined(FSL_FEATURE_IOCON_ONE_DIMENSION) && (FSL_FEATURE_IOCON_ONE_DIMENSION == 1))
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IOCON_PinMuxSet(base, pinArray[i].ionumber, pinArray[i].modefunc);
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#else
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IOCON_PinMuxSet(base, pinArray[i].port, pinArray[i].pin, pinArray[i].modefunc);
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#endif /* FSL_FEATURE_IOCON_ONE_DIMENSION */
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}
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}
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/* @} */
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#if defined(__cplusplus)
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}
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#endif
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#endif /* _FSL_IOCON_H_ */
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