357 lines
9.3 KiB
C
357 lines
9.3 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-12-20 BruceOu first implementation
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*/
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#include "drv_spi.h"
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#ifdef RT_USING_SPI
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#if defined(BSP_USING_SPI0) || defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2)
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#define LOG_TAG "drv.spi"
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#include <rtdbg.h>
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#ifdef BSP_USING_SPI0
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static struct rt_spi_bus spi_bus0;
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#endif
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#ifdef BSP_USING_SPI1
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static struct rt_spi_bus spi_bus1;
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#endif
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#ifdef BSP_USING_SPI2
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static struct rt_spi_bus spi_bus2;
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#endif
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static const struct gd32_spi spi_bus_obj[] = {
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#ifdef BSP_USING_SPI0
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{
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SPI0,
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"spi0",
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RCU_SPI0,
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RCU_GPIOA,
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&spi_bus0,
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GPIOA,
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GPIO_PIN_5,
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GPIO_PIN_6,
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GPIO_PIN_7,
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}
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#endif /* BSP_USING_SPI0 */
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#ifdef BSP_USING_SPI1
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{
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SPI1,
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"spi1",
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RCU_SPI1,
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RCU_GPIOB,
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&spi_bus1,
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GPIOB,
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GPIO_PIN_12,
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GPIO_PIN_14,
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GPIO_PIN_15,
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}
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#endif /* BSP_USING_SPI1 */
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#ifdef BSP_USING_SPI2
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{
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SPI2,
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"spi2",
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RCU_SPI2,
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RCU_GPIOB,
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&spi_bus2,
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GPIOB,
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GPIO_PIN_3,
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GPIO_PIN_4,
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GPIO_PIN_5,
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}
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#endif /* BSP_USING_SPI2 */
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};
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/* private rt-thread spi ops function */
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static rt_err_t spi_configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration);
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static rt_uint32_t spixfer(struct rt_spi_device* device, struct rt_spi_message* message);
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static struct rt_spi_ops gd32_spi_ops =
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{
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.configure = spi_configure,
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.xfer = spixfer,
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};
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/**
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* @brief SPI Initialization
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* @param gd32_spi: SPI BUS
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* @retval None
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*/
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static void gd32_spi_init(struct gd32_spi *gd32_spi)
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{
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/* enable SPI clock */
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rcu_periph_clock_enable(gd32_spi->spi_clk);
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rcu_periph_clock_enable(gd32_spi->gpio_clk);
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#if defined SOC_SERIES_GD32F4xx
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/*GPIO pin configuration*/
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gpio_af_set(gd32_spi->spi_port, GPIO_AF_5, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
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gpio_mode_set(gd32_spi->spi_port, GPIO_MODE_AF, GPIO_PUPD_NONE, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
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gpio_output_options_set(gd32_spi->spi_port, GPIO_OTYPE_PP, GPIO_OSPEED_200MHZ, gd32_spi->sck_pin | gd32_spi->mosi_pin | gd32_spi->miso_pin);
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#else
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/* Init SPI SCK MOSI */
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gpio_init(gd32_spi->spi_port, GPIO_MODE_AF_PP, GPIO_OSPEED_50MHZ, gd32_spi->sck_pin | gd32_spi->mosi_pin);
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/* Init SPI MISO */
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gpio_init(gd32_spi->spi_port, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, gd32_spi->miso_pin);
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#endif
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}
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static rt_err_t spi_configure(struct rt_spi_device* device,
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struct rt_spi_configuration* configuration)
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{
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struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;
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struct gd32_spi *spi_device = (struct gd32_spi *)spi_bus->parent.user_data;
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spi_parameter_struct spi_init_struct;
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uint32_t spi_periph = spi_device->spi_periph;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(configuration != RT_NULL);
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//Init SPI
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gd32_spi_init(spi_device);
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/* data_width */
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if(configuration->data_width <= 8)
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{
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spi_init_struct.frame_size = SPI_FRAMESIZE_8BIT;
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}
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else if(configuration->data_width <= 16)
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{
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spi_init_struct.frame_size = SPI_FRAMESIZE_16BIT;
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}
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else
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{
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return RT_EIO;
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}
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/* baudrate */
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{
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rcu_clock_freq_enum spi_src;
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uint32_t spi_apb_clock;
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uint32_t max_hz;
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max_hz = configuration->max_hz;
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LOG_D("sys freq: %d\n", rcu_clock_freq_get(CK_SYS));
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LOG_D("CK_APB2 freq: %d\n", rcu_clock_freq_get(CK_APB2));
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LOG_D("max freq: %d\n", max_hz);
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if (spi_periph == SPI1 || spi_periph == SPI2)
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{
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spi_src = CK_APB1;
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}
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else
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{
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spi_src = CK_APB2;
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}
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spi_apb_clock = rcu_clock_freq_get(spi_src);
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if(max_hz >= spi_apb_clock/2)
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{
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spi_init_struct.prescale = SPI_PSC_2;
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}
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else if (max_hz >= spi_apb_clock/4)
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{
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spi_init_struct.prescale = SPI_PSC_4;
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}
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else if (max_hz >= spi_apb_clock/8)
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{
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spi_init_struct.prescale = SPI_PSC_8;
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}
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else if (max_hz >= spi_apb_clock/16)
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{
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spi_init_struct.prescale = SPI_PSC_16;
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}
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else if (max_hz >= spi_apb_clock/32)
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{
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spi_init_struct.prescale = SPI_PSC_32;
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}
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else if (max_hz >= spi_apb_clock/64)
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{
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spi_init_struct.prescale = SPI_PSC_64;
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}
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else if (max_hz >= spi_apb_clock/128)
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{
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spi_init_struct.prescale = SPI_PSC_128;
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}
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else
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{
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/* min prescaler 256 */
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spi_init_struct.prescale = SPI_PSC_256;
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}
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} /* baudrate */
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switch(configuration->mode & RT_SPI_MODE_3)
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{
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case RT_SPI_MODE_0:
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spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_1EDGE;
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break;
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case RT_SPI_MODE_1:
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spi_init_struct.clock_polarity_phase = SPI_CK_PL_LOW_PH_2EDGE;
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break;
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case RT_SPI_MODE_2:
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spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_1EDGE;
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break;
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case RT_SPI_MODE_3:
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spi_init_struct.clock_polarity_phase = SPI_CK_PL_HIGH_PH_2EDGE;
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break;
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}
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/* MSB or LSB */
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if(configuration->mode & RT_SPI_MSB)
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{
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spi_init_struct.endian = SPI_ENDIAN_MSB;
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}
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else
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{
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spi_init_struct.endian = SPI_ENDIAN_LSB;
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}
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spi_init_struct.trans_mode = SPI_TRANSMODE_FULLDUPLEX;
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spi_init_struct.device_mode = SPI_MASTER;
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spi_init_struct.nss = SPI_NSS_SOFT;
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spi_crc_off(spi_periph);
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/* init SPI */
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spi_init(spi_periph, &spi_init_struct);
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/* Enable SPI_MASTER */
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spi_enable(spi_periph);
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return RT_EOK;
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};
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static rt_uint32_t spixfer(struct rt_spi_device* device, struct rt_spi_message* message)
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{
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struct rt_spi_bus * gd32_spi_bus = (struct rt_spi_bus *)device->bus;
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struct gd32_spi *spi_device = (struct gd32_spi *)gd32_spi_bus->parent.user_data;
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struct rt_spi_configuration * config = &device->config;
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struct gd32_spi_cs * gd32_spi_cs = device->parent.user_data;
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uint32_t spi_periph = spi_device->spi_periph;
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RT_ASSERT(device != NULL);
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RT_ASSERT(message != NULL);
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/* take CS */
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if(message->cs_take)
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{
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gpio_bit_reset(gd32_spi_cs->GPIOx, gd32_spi_cs->GPIO_Pin);
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LOG_D("spi take cs\n");
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}
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{
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if(config->data_width <= 8)
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{
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const rt_uint8_t * send_ptr = message->send_buf;
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rt_uint8_t * recv_ptr = message->recv_buf;
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rt_uint32_t size = message->length;
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LOG_D("spi poll transfer start: %d\n", size);
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while(size--)
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{
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rt_uint8_t data = 0xFF;
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if(send_ptr != RT_NULL)
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{
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data = *send_ptr++;
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}
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// Todo: replace register read/write by gd32f4 lib
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//Wait until the transmit buffer is empty
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while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE));
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// Send the byte
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spi_i2s_data_transmit(spi_periph, data);
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//Wait until a data is received
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while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RBNE));
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// Get the received data
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data = spi_i2s_data_receive(spi_periph);
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if(recv_ptr != RT_NULL)
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{
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*recv_ptr++ = data;
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}
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}
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LOG_D("spi poll transfer finsh\n");
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}
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else if(config->data_width <= 16)
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{
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const rt_uint16_t * send_ptr = message->send_buf;
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rt_uint16_t * recv_ptr = message->recv_buf;
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rt_uint32_t size = message->length;
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while(size--)
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{
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rt_uint16_t data = 0xFF;
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if(send_ptr != RT_NULL)
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{
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data = *send_ptr++;
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}
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//Wait until the transmit buffer is empty
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while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_TBE));
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// Send the byte
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spi_i2s_data_transmit(spi_periph, data);
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//Wait until a data is received
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while(RESET == spi_i2s_flag_get(spi_periph, SPI_FLAG_RBNE));
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// Get the received data
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data = spi_i2s_data_receive(spi_periph);
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if(recv_ptr != RT_NULL)
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{
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*recv_ptr++ = data;
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}
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}
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}
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}
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/* release CS */
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if(message->cs_release)
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{
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gpio_bit_set(gd32_spi_cs->GPIOx, gd32_spi_cs->GPIO_Pin);
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LOG_D("spi release cs\n");
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}
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return message->length;
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};
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int rt_hw_spi_init(void)
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{
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int result = 0;
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int i;
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for (i = 0; i < sizeof(spi_bus_obj) / sizeof(spi_bus_obj[0]); i++)
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{
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spi_bus_obj[i].spi_bus->parent.user_data = (void *)&spi_bus_obj[i];
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result = rt_spi_bus_register(spi_bus_obj[i].spi_bus, spi_bus_obj[i].bus_name, &gd32_spi_ops);
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RT_ASSERT(result == RT_EOK);
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LOG_D("%s bus init done", spi_bus_obj[i].bus_name);
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_spi_init);
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#endif /* BSP_USING_SPI0 || BSP_USING_SPI1 || BSP_USING_SPI2 */
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#endif /* RT_USING_SPI */
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