370 lines
11 KiB
C
370 lines
11 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-10-19 Nations first version
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*/
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#include "drv_spi.h"
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#if defined(RT_USING_SPI) && defined(RT_USING_PIN)
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#include <rtdevice.h>
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#if defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || \
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defined(BSP_USING_SPI3)
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/* #define DEBUG */
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#ifdef DEBUG
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#define DEBUG_PRINTF(...) rt_kprintf(__VA_ARGS__)
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#else
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#define DEBUG_PRINTF(...)
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#endif
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/* private rt-thread spi ops function */
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static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration)
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{
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SPI_InitType SPI_InitStructure;
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RCC_ClocksType RCC_ClockFreq;
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SPI_Module* spi_periph;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(configuration != RT_NULL);
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RCC_GetClocksFreqValue(&RCC_ClockFreq);
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spi_periph = (SPI_Module*)device->bus->parent.user_data;
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#if defined(SOC_N32G45X) || defined(SOC_N32WB452)
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if (spi_periph != SPI1 && spi_periph != SPI2 && spi_periph != SPI3)
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{
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return RT_EIO;
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}
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#elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
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if (spi_periph != SPI1 && spi_periph != SPI2)
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{
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return RT_EIO;
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}
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#endif
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if (configuration->data_width <= 8)
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{
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SPI_InitStructure.DataLen = SPI_DATA_SIZE_8BITS;
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}
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else if (configuration->data_width <= 16)
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{
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SPI_InitStructure.DataLen = SPI_DATA_SIZE_16BITS;
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}
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else
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{
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return RT_EIO;
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}
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{
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rt_uint32_t spi_apb_clock;
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rt_uint32_t max_hz;
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max_hz = configuration->max_hz;
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DEBUG_PRINTF("sys freq: %d\n", RCC_ClockFreq.SysclkFreq);
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DEBUG_PRINTF("CK_APB2 freq: %d\n", RCC_ClockFreq.Pclk2Freq);
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DEBUG_PRINTF("max freq: %d\n", max_hz);
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if (spi_periph == SPI1)
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{
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spi_apb_clock = RCC_ClockFreq.Pclk2Freq;
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}
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else
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{
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spi_apb_clock = RCC_ClockFreq.Pclk1Freq;
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}
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if (max_hz >= spi_apb_clock/2)
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{
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SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_2;
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}
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else if (max_hz >= spi_apb_clock/4)
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{
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SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_4;
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}
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else if (max_hz >= spi_apb_clock/8)
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{
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SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_8;
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}
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else if (max_hz >= spi_apb_clock/16)
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{
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SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_16;
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}
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else if (max_hz >= spi_apb_clock/32)
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{
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SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_32;
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}
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else if (max_hz >= spi_apb_clock/64)
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{
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SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_64;
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}
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else if (max_hz >= spi_apb_clock/128)
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{
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SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_128;
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}
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else
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{
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/* min prescaler 256 */
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SPI_InitStructure.BaudRatePres = SPI_BR_PRESCALER_256;
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}
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} /* baudrate */
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switch (configuration->mode & RT_SPI_MODE_3)
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{
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case RT_SPI_MODE_0:
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SPI_InitStructure.CLKPOL = SPI_CLKPOL_LOW;
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SPI_InitStructure.CLKPHA = SPI_CLKPHA_FIRST_EDGE;
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break;
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case RT_SPI_MODE_1:
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SPI_InitStructure.CLKPOL = SPI_CLKPOL_LOW;
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SPI_InitStructure.CLKPHA = SPI_CLKPHA_SECOND_EDGE;
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break;
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case RT_SPI_MODE_2:
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SPI_InitStructure.CLKPOL = SPI_CLKPOL_HIGH;
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SPI_InitStructure.CLKPHA = SPI_CLKPHA_FIRST_EDGE;
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break;
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case RT_SPI_MODE_3:
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SPI_InitStructure.CLKPOL = SPI_CLKPOL_HIGH;
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SPI_InitStructure.CLKPHA = SPI_CLKPHA_SECOND_EDGE;
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break;
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}
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/* MSB or LSB */
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if (configuration->mode & RT_SPI_MSB)
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{
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SPI_InitStructure.FirstBit = SPI_FB_MSB;
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}
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else
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{
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SPI_InitStructure.FirstBit = SPI_FB_LSB;
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}
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/* SPI configuration */
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SPI_InitStructure.DataDirection = SPI_DIR_DOUBLELINE_FULLDUPLEX;
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SPI_InitStructure.SpiMode = SPI_MODE_MASTER;
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SPI_InitStructure.CLKPHA = SPI_CLKPHA_SECOND_EDGE;
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SPI_InitStructure.NSS = SPI_NSS_SOFT;
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SPI_InitStructure.CRCPoly = 7;
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SPI_Init(spi_periph, &SPI_InitStructure);
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/* Enable the sFLASH_SPI */
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SPI_Enable(spi_periph, ENABLE);
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return RT_EOK;
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}
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static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message)
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{
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struct n32_spi_cs *cs_pin = device->parent.user_data;
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SPI_Module* spi_periph = (SPI_Module*)device->bus->parent.user_data;
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struct rt_spi_configuration * config = &device->config;
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RT_ASSERT(device != NULL);
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RT_ASSERT(message != NULL);
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/* take CS */
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if (message->cs_take)
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{
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rt_pin_write(cs_pin->GPIO_Pin, PIN_LOW);
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DEBUG_PRINTF("spi take cs\n");
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}
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if (config->data_width <= 8)
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{
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const rt_uint8_t * send_ptr = message->send_buf;
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rt_uint8_t * recv_ptr = message->recv_buf;
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rt_uint32_t size = message->length;
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DEBUG_PRINTF("spi poll transfer start: %d\n", size);
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while (size--)
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{
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rt_uint8_t data = 0xA5;
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if (send_ptr != RT_NULL)
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{
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data = *send_ptr++;
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}
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/* Loop while DAT register in not emplty */
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while (SPI_I2S_GetStatus(spi_periph, SPI_I2S_TE_FLAG) == RESET);
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/* Send the byte */
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SPI_I2S_TransmitData(spi_periph, data);
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/* Wait until a data is received */
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while (SPI_I2S_GetStatus(spi_periph, SPI_I2S_RNE_FLAG) == RESET);
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/* Get the received data */
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data = SPI_I2S_ReceiveData(spi_periph);
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if (recv_ptr != RT_NULL)
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{
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*recv_ptr++ = data;
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}
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}
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DEBUG_PRINTF("spi poll transfer finsh\n");
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}
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else if (config->data_width <= 16)
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{
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const rt_uint16_t * send_ptr = message->send_buf;
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rt_uint16_t * recv_ptr = message->recv_buf;
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rt_uint32_t size = message->length;
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while (size--)
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{
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rt_uint16_t data = 0xFF;
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if (send_ptr != RT_NULL)
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{
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data = *send_ptr++;
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}
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/* Loop while DAT register in not emplty */
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while (SPI_I2S_GetStatus(spi_periph, SPI_I2S_TE_FLAG) == RESET);
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/* Send the byte */
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SPI_I2S_TransmitData(spi_periph, data);
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/* Wait until a data is received */
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while (RESET == SPI_I2S_GetStatus(spi_periph, SPI_I2S_RNE_FLAG));
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/* Get the received data */
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data = SPI_I2S_ReceiveData(spi_periph);
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if (recv_ptr != RT_NULL)
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{
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*recv_ptr++ = data;
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}
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}
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}
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/* release CS */
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if (message->cs_release)
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{
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rt_pin_write(cs_pin->GPIO_Pin, PIN_HIGH);
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DEBUG_PRINTF("spi release cs\n");
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}
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return message->length;
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}
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static struct rt_spi_ops spi_ops =
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{
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configure,
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xfer
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};
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int rt_hw_spi_init(void)
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{
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int result = 0;
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GPIO_InitType GPIO_InitStructure;
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#ifdef BSP_USING_SPI1
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static struct rt_spi_bus spi_bus1;
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spi_bus1.parent.user_data = (void *)SPI1;
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result = rt_spi_bus_register(&spi_bus1, "spi1", &spi_ops);
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#if defined(SOC_N32G45X) || defined(SOC_N32WB452)
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA | RCC_APB2_PERIPH_SPI1, ENABLE);
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GPIO_InitStruct(&GPIO_InitStructure);
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/* Confige SPI1_SCLK(PA5) and SPI1_MOSI(PA7) */
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GPIO_InitStructure.Pin = GPIO_PIN_5 | GPIO_PIN_7;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);
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/* Confige SPI1_MISO(PA6) */
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GPIO_InitStructure.Pin = GPIO_PIN_6;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);
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#elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOA, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_SPI1 | RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_InitStruct(&GPIO_InitStructure);
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/* Confige SPI1_SCLK(PA5) and SPI1_MISO(PA6) and SPI1_MOSI(PA7) */
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GPIO_InitStructure.Pin = GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Alternate = GPIO_AF0_SPI1;
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GPIO_InitPeripheral(GPIOA, &GPIO_InitStructure);
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#endif
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#endif
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#ifdef BSP_USING_SPI2
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static struct rt_spi_bus spi_bus2;
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spi_bus2.parent.user_data = (void *)SPI2;
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result = rt_spi_bus_register(&spi_bus2, "spi2", &spi_ops);
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#if defined(SOC_N32G45X) || defined(SOC_N32WB452)
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI2, ENABLE);
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GPIO_InitStruct(&GPIO_InitStructure);
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/* Confige SPI2_SCLK(PB13) and SPI2_MOSI(PB15) */
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GPIO_InitStructure.Pin = GPIO_PIN_13 | GPIO_PIN_15;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
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/* Confige SPI2_MISO(PB14) */
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GPIO_InitStructure.Pin = GPIO_PIN_14;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
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#elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB, ENABLE);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_SPI2 | RCC_APB2_PERIPH_AFIO, ENABLE);
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GPIO_InitStruct(&GPIO_InitStructure);
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/* Confige SPI2_SCLK(PB13) and SPI2_MISO(PB14) and SPI2_MOSI(PB15) */
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GPIO_InitStructure.Pin = GPIO_PIN_13 | GPIO_PIN_14 | GPIO_PIN_15;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitStructure.GPIO_Alternate = GPIO_AF0_SPI2;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
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#endif
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#endif
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#ifdef BSP_USING_SPI3
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static struct rt_spi_bus spi_bus3;
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spi_bus3.parent.user_data = (void *)SPI3;
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result = rt_spi_bus_register(&spi_bus3, "spi3", &spi_ops);
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RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_GPIOB | RCC_APB2_PERIPH_AFIO, ENABLE);
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RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_SPI3, ENABLE);
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GPIO_ConfigPinRemap(GPIO_RMP_SW_JTAG_SW_ENABLE, ENABLE);
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GPIO_InitStruct(&GPIO_InitStructure);
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/* Confige SPI3_SCLK(PB3) and SPI3_MOSI(PB5) */
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GPIO_InitStructure.Pin = GPIO_PIN_3 | GPIO_PIN_5;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
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/* Confige SPI3_MISO(PB4) */
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GPIO_InitStructure.Pin = GPIO_PIN_4;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_InitPeripheral(GPIOB, &GPIO_InitStructure);
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#endif
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_spi_init);
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#endif /* defined(BSP_USING_SPI1) || defined(BSP_USING_SPI2) || defined(BSP_USING_SPI3) */
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#endif
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