314 lines
6.9 KiB
C
314 lines
6.9 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-03-04 stevetong459 first version
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* 2022-07-15 Aligagago add apm32F4 serie MCU support
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* 2022-12-26 luobeihai add apm32F0 serie MCU support
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*/
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#include "board.h"
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#include <sys/time.h>
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#ifdef BSP_USING_ONCHIP_RTC
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#define DBG_TAG "drv.rtc"
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#define DBG_LVL DBG_INFO
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#include <rtdbg.h>
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#ifndef LSI_VALUE
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#define LSI_VALUE ((uint32_t)40000)
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#endif
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#ifndef LSE_VALUE
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#define LSE_VALUE ((uint32_t)32768)
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#endif
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#define DRV_RTC_TIME_OUT 0xFFFFF
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static rt_rtc_dev_t apm32_rtc_dev;
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static rt_uint8_t rtc_init_flag = RESET;
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/**
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* @brief This function will initialize the rtc on chip.
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*
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* @return RT_EOK indicates successful initialize, other value indicates failed;
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*/
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static rt_err_t apm32_rtc_init(void)
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{
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volatile rt_uint32_t counter = 0;
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/* Enable RTC Clock */
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#if defined(SOC_SERIES_APM32F1)
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RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_PMU | RCM_APB1_PERIPH_BAKR);
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#elif defined(SOC_SERIES_APM32F0) || defined(SOC_SERIES_APM32F4)
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RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_PMU);
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#endif
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PMU_EnableBackupAccess();
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/* Config RTC clock */
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#ifdef BSP_RTC_USING_LSI
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RCM_EnableLSI();
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while (!RCM_ReadStatusFlag(RCM_FLAG_LSIRDY))
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{
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if (++counter > DRV_RTC_TIME_OUT)
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{
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return RT_ETIMEOUT;
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}
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}
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RCM_ConfigRTCCLK(RCM_RTCCLK_LSI);
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#else
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RCM_DisableLSI();
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RCM_ConfigLSE(RCM_LSE_OPEN);
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while (!RCM_ReadStatusFlag(RCM_FLAG_LSERDY))
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{
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if (++counter > DRV_RTC_TIME_OUT)
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{
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return RT_ETIMEOUT;
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}
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}
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RCM_ConfigRTCCLK(RCM_RTCCLK_LSE);
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#endif /* BSP_RTC_USING_LSI */
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RCM_EnableRTCCLK();
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RTC_WaitForSynchro();
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#if defined(SOC_SERIES_APM32F1)
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counter = 0;
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while (!RTC_ReadStatusFlag(RTC_FLAG_OC))
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{
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if (++counter > DRV_RTC_TIME_OUT)
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{
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return RT_ETIMEOUT;
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}
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}
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RTC_EnableConfigMode();
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RTC_ClearStatusFlag(RTC_FLAG_OVR | RTC_FLAG_ALR | RTC_FLAG_SEC);
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#ifdef BSP_RTC_USING_LSI
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RTC_ConfigPrescaler(LSI_VALUE - 1);
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#else
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RTC_ConfigPrescaler(LSE_VALUE - 1);
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#endif /* BSP_RTC_USING_LSI */
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#elif defined(SOC_SERIES_APM32F4)
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RTC_EnableInit();
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RTC_Config_T rtcConfig;
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RTC_ConfigStructInit(&rtcConfig);
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RTC_Config(&rtcConfig);
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#elif defined(SOC_SERIES_APM32F0)
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RTC_EnableInit();
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RTC_Config_T rtcConfig;
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RTC_ConfigStructInit(&rtcConfig);
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#ifdef BSP_RTC_USING_LSI
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rtcConfig.AsynchPrediv = 0x63;
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rtcConfig.SynchPrediv = 0x18F;
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#else
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rtcConfig.AsynchPrediv = 0x7F;
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rtcConfig.SynchPrediv = 0x130;
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#endif /* BSP_RTC_USING_LSI */
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RTC_Config(&rtcConfig);
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#endif /* SOC_SERIES_APM32F1 */
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if (!rtc_init_flag)
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{
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rtc_init_flag = SET;
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}
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return RT_EOK;
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}
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#if defined(SOC_SERIES_APM32F1)
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/**
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* @brief This function will initialize the rtc on chip.
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*
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* @return RT_EOK indicates successful initialize, other value indicates failed;
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*/
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static rt_err_t apm32_rtc_get_secs(time_t *sec)
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{
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volatile rt_uint32_t counter = 0;
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while (!RTC_ReadStatusFlag(RTC_FLAG_OC))
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{
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if (++counter > DRV_RTC_TIME_OUT)
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{
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return RT_ETIMEOUT;
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}
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}
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*(timer_t *) sec = RTC_ReadCounter();
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return RT_EOK;
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}
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static rt_err_t apm32_rtc_set_secs(time_t *sec)
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{
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volatile rt_uint32_t counter = 0;
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if (!rtc_init_flag)
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{
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apm32_rtc_init();
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}
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while (!RTC_ReadStatusFlag(RTC_FLAG_OC))
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{
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if (++counter > DRV_RTC_TIME_OUT)
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{
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return RT_ETIMEOUT;
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}
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}
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RTC_ConfigCounter(*(rt_uint32_t *)sec);
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return RT_EOK;
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}
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#elif defined(SOC_SERIES_APM32F0) || defined(SOC_SERIES_APM32F4)
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static rt_err_t apm32_rtc_get_timeval(struct timeval *tv)
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{
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#if defined(SOC_SERIES_APM32F0)
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RTC_TIME_T timeConfig;
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RTC_DATE_T dateConfig;
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#elif defined(SOC_SERIES_APM32F4)
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RTC_TimeConfig_T timeConfig;
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RTC_DateConfig_T dateConfig;
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#endif
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struct tm tm_new = {0};
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RTC_ReadTime(RTC_FORMAT_BIN, &timeConfig);
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RTC_ReadDate(RTC_FORMAT_BIN, &dateConfig);
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tm_new.tm_sec = timeConfig.seconds;
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tm_new.tm_min = timeConfig.minutes;
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tm_new.tm_hour = timeConfig.hours;
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tm_new.tm_mday = dateConfig.date;
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tm_new.tm_mon = dateConfig.month - 1;
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tm_new.tm_year = dateConfig.year + 100;
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tv->tv_sec = timegm(&tm_new);
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return RT_EOK;
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}
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static rt_err_t set_rtc_time_stamp(time_t time_stamp)
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{
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#if defined(SOC_SERIES_APM32F0)
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RTC_TIME_T timeConfig;
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RTC_DATE_T dateConfig;
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#elif defined(SOC_SERIES_APM32F4)
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RTC_TimeConfig_T timeConfig;
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RTC_DateConfig_T dateConfig;
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#endif
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struct tm tm = {0};
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if (!rtc_init_flag)
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{
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apm32_rtc_init();
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}
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gmtime_r(&time_stamp, &tm);
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if (tm.tm_year < 100)
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{
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return -RT_ERROR;
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}
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timeConfig.seconds = tm.tm_sec ;
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timeConfig.minutes = tm.tm_min ;
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timeConfig.hours = tm.tm_hour;
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dateConfig.date = tm.tm_mday;
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#if defined(SOC_SERIES_APM32F4)
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dateConfig.month = (RTC_MONTH_T)(tm.tm_mon + 1);
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dateConfig.weekday = (RTC_WEEKDAY_T)(tm.tm_wday + 1);
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#else
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dateConfig.month = tm.tm_mon + 1 ;
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dateConfig.weekday = tm.tm_wday + 1;
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#endif
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dateConfig.year = tm.tm_year - 100;
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RTC_ConfigTime(RTC_FORMAT_BIN, &timeConfig);
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RTC_ConfigDate(RTC_FORMAT_BIN, &dateConfig);
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/* wait for set time completed */
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for (int i = 0; i < 0xFFFF; i++);
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return RT_EOK;
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}
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/**
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* @brief This function will initialize the rtc on chip.
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*
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* @return RT_EOK indicates successful initialize, other value indicates failed;
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*/
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static rt_err_t apm32_rtc_get_secs(time_t *sec)
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{
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struct timeval tv;
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apm32_rtc_get_timeval(&tv);
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*(time_t *) sec = tv.tv_sec;
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return RT_EOK;
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}
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static rt_err_t apm32_rtc_set_secs(time_t *sec)
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{
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rt_err_t result = RT_EOK;
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if (set_rtc_time_stamp(*sec))
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{
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result = -RT_ERROR;
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}
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return result;
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}
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#endif
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static const struct rt_rtc_ops apm32_rtc_ops =
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{
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apm32_rtc_init,
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apm32_rtc_get_secs,
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apm32_rtc_set_secs,
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RT_NULL,
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RT_NULL,
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#if defined(SOC_SERIES_APM32F0) || defined(SOC_SERIES_APM32F4)
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apm32_rtc_get_timeval,
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#else
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RT_NULL,
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#endif
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RT_NULL,
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};
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/**
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* @brief RTC initialization function.
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*
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* @return RT_EOK indicates successful initialization, other value indicates failed;
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*/
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static int rt_hw_rtc_init(void)
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{
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rt_err_t result = RT_EOK;
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apm32_rtc_dev.ops = &apm32_rtc_ops;
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if (rt_hw_rtc_register(&apm32_rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL) != RT_EOK)
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{
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LOG_E("rtc init failed");
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result = RT_ERROR;
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}
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else
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{
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LOG_D("rtc init success");
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}
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return result;
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}
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INIT_DEVICE_EXPORT(rt_hw_rtc_init);
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#endif /* BSP_USING_ONCHIP_RTC */
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