109 lines
2.7 KiB
C
109 lines
2.7 KiB
C
/*
|
|
* File : board.c
|
|
* This file is part of RT-Thread RTOS
|
|
*
|
|
* The license and distribution terms for this file may be
|
|
* found in the file LICENSE in this distribution or at
|
|
* http://www.rt-thread.org/license/LICENSE
|
|
*
|
|
* Change Logs:
|
|
* Date Author Notes
|
|
* 2017-12-12 Bluebear233 first implementation
|
|
*/
|
|
|
|
#include <rtconfig.h>
|
|
#include <rtthread.h>
|
|
#include <board.h>
|
|
#include <usart.h>
|
|
#include <NUC472_442.h>
|
|
|
|
#ifdef __CC_ARM
|
|
extern int Image$$RW_IRAM1$$ZI$$Limit;
|
|
#elif __ICCARM__
|
|
#pragma section="HEAP"
|
|
#else
|
|
extern int __bss_end;
|
|
#endif
|
|
|
|
/**
|
|
* This function will initial Clock tree.
|
|
*/
|
|
void clock_init(void)
|
|
{
|
|
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Init System Clock */
|
|
/*---------------------------------------------------------------------------------------------------------*/
|
|
/* Unlock protected registers */
|
|
SYS_UnlockReg();
|
|
|
|
/* Enable External XTAL (4~24 MHz) */
|
|
CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
|
|
|
|
/* Waiting for 12MHz clock ready */
|
|
CLK_WaitClockReady( CLK_STATUS_HXTSTB_Msk);
|
|
|
|
/* Switch HCLK clock source to HXT */
|
|
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HXT,CLK_CLKDIV0_HCLK(1));
|
|
|
|
/* Set PLL to power down mode and PLL_STB bit in CLKSTATUS register will be cleared by hardware.*/
|
|
CLK->PLLCTL |= CLK_PLLCTL_PD_Msk;
|
|
|
|
/* Set PLL frequency */
|
|
CLK->PLLCTL = CLK_PLLCTL_84MHz_HXT;
|
|
|
|
/* Waiting for clock ready */
|
|
CLK_WaitClockReady(CLK_STATUS_PLLSTB_Msk);
|
|
|
|
/* Switch HCLK clock source to PLL */
|
|
CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_PLL,CLK_CLKDIV0_HCLK(1));
|
|
|
|
/* Update System Core Clock */
|
|
/* User can use SystemCoreClockUpdate() to calculate SystemCoreClock. */
|
|
SystemCoreClockUpdate();
|
|
|
|
/* Lock protected registers */
|
|
SYS_LockReg();
|
|
}
|
|
|
|
/**
|
|
* This function will initial NUC472 board.
|
|
*/
|
|
void rt_hw_board_init(void)
|
|
{
|
|
clock_init();
|
|
|
|
#ifdef RT_USING_HEAP
|
|
#ifdef __CC_ARM
|
|
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)SRAM_END);
|
|
#elif __ICCARM__
|
|
rt_system_heap_init(__segment_end("HEAP"), (void*)SRAM_END);
|
|
#else
|
|
/* init memory system */
|
|
rt_system_heap_init((void*)&__bss_end, (void*)SRAM_END);
|
|
#endif
|
|
#endif /* RT_USING_HEAP */
|
|
|
|
rt_hw_usart_init();
|
|
|
|
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
|
|
|
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
|
|
}
|
|
|
|
/**
|
|
* This is the timer interrupt service routine.
|
|
*
|
|
*/
|
|
void SysTick_Handler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
rt_tick_increase();
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|