253 lines
6.6 KiB
C
253 lines
6.6 KiB
C
/**************************************************************************//**
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*
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* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-1-16 Wayne First version
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*
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******************************************************************************/
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#include <rtdevice.h>
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#include <drv_gpio.h>
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#if defined(BOARD_USING_STORAGE_SPIFLASH)
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#if defined(RT_USING_SFUD)
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#include "spi_flash.h"
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#include "spi_flash_sfud.h"
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#endif
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#include "drv_qspi.h"
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#define W25X_REG_READSTATUS (0x05)
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#define W25X_REG_READSTATUS2 (0x35)
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#define W25X_REG_WRITEENABLE (0x06)
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#define W25X_REG_WRITESTATUS (0x01)
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#define W25X_REG_QUADENABLE (0x02)
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static rt_uint8_t SpiFlash_ReadStatusReg(struct rt_qspi_device *qspi_device)
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{
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rt_uint8_t u8Val;
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rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS;
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rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
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return u8Val;
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}
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static rt_uint8_t SpiFlash_ReadStatusReg2(struct rt_qspi_device *qspi_device)
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{
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rt_uint8_t u8Val;
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rt_uint8_t w25x_txCMD1 = W25X_REG_READSTATUS2;
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rt_qspi_send_then_recv(qspi_device, &w25x_txCMD1, 1, &u8Val, 1);
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return u8Val;
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}
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static void SpiFlash_WriteStatusReg(struct rt_qspi_device *qspi_device, uint8_t u8Value1, uint8_t u8Value2)
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{
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rt_uint8_t w25x_txCMD1;
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rt_uint8_t u8Val[3];
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w25x_txCMD1 = W25X_REG_WRITEENABLE;
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rt_qspi_send(qspi_device, &w25x_txCMD1, 1);
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u8Val[0] = W25X_REG_WRITESTATUS;
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u8Val[1] = u8Value1;
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u8Val[2] = u8Value2;
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rt_qspi_send(qspi_device, &u8Val, 3);
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}
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static void SpiFlash_WaitReady(struct rt_qspi_device *qspi_device)
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{
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volatile uint8_t u8ReturnValue;
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do
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{
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u8ReturnValue = SpiFlash_ReadStatusReg(qspi_device);
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u8ReturnValue = u8ReturnValue & 1;
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}
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while (u8ReturnValue != 0); // check the BUSY bit
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}
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static void SpiFlash_EnterQspiMode(struct rt_qspi_device *qspi_device)
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{
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uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
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uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
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u8Status2 |= W25X_REG_QUADENABLE;
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SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
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SpiFlash_WaitReady(qspi_device);
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}
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static void SpiFlash_ExitQspiMode(struct rt_qspi_device *qspi_device)
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{
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uint8_t u8Status1 = SpiFlash_ReadStatusReg(qspi_device);
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uint8_t u8Status2 = SpiFlash_ReadStatusReg2(qspi_device);
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u8Status2 &= ~W25X_REG_QUADENABLE;
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SpiFlash_WriteStatusReg(qspi_device, u8Status1, u8Status2);
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SpiFlash_WaitReady(qspi_device);
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}
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static int rt_hw_spiflash_init(void)
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{
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/* Here, we use Dual I/O to drive the SPI flash by default. */
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/* If you want to use Quad I/O, you can modify to 4 from 2 and crossover D2/D3 pin of SPI flash. */
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if (nu_qspi_bus_attach_device("qspi0", "qspi01", 2, SpiFlash_EnterQspiMode, SpiFlash_ExitQspiMode) != RT_EOK)
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return -1;
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#if defined(RT_USING_SFUD)
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if (rt_sfud_flash_probe("flash0", "qspi01") == RT_NULL)
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{
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return -(RT_ERROR);
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}
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#endif
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return 0;
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}
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INIT_COMPONENT_EXPORT(rt_hw_spiflash_init);
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#endif /* BOARD_USING_STORAGE_SPIFLASH */
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#if defined(BOARD_USING_MAX31875)
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#include <sensor_max31875.h>
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int rt_hw_max31875_port(void)
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{
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struct rt_sensor_config cfg;
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cfg.intf.dev_name = "i2c1";
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cfg.intf.user_data = (void *)MAX31875_I2C_SLAVE_ADR_R0;
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cfg.irq_pin.pin = RT_PIN_NONE;
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rt_hw_max31875_init("max31875", &cfg);
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return 0;
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}
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INIT_APP_EXPORT(rt_hw_max31875_port);
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#endif /* BOARD_USING_MAX31875 */
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#if defined(BOARD_USING_BMX055)
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#include <sensor_bmx055.h>
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int rt_hw_bmx055_port(void)
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{
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struct rt_sensor_config cfg;
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cfg.intf.dev_name = "i2c2";
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cfg.intf.user_data = (void *)0;
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cfg.irq_pin.pin = RT_PIN_NONE;
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rt_hw_bmx055_init("bmx055", &cfg);
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return 0;
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}
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INIT_APP_EXPORT(rt_hw_bmx055_port);
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#endif /* BOARD_USING_BMX055 */
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#if defined(BOARD_USING_ESP8266)
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#include <at_device_esp8266.h>
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#define LOG_TAG "at.sample.esp"
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#undef DBG_TAG
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#include <at_log.h>
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static struct at_device_esp8266 esp0 =
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{
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"esp0", /* esp8266 device name */
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"uart1", /* esp8266 serial device name, EX: uart1, uuart1 */
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"NT_ZY_BUFFALO", /* Wi-Fi SSID */
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"12345678", /* Wi-Fi PASSWORD */
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1024 /* Receive buffer length */
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};
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static int rt_hw_esp8266_port(void)
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{
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struct at_device_esp8266 *esp8266 = &esp0;
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rt_base_t esp_rst_pin = NU_GET_PININDEX(NU_PH, 3);
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/* ESP8266 reset pin PH.3 */
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rt_pin_mode(esp_rst_pin, PIN_MODE_OUTPUT);
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rt_pin_write(esp_rst_pin, 1);
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return at_device_register(&(esp8266->device),
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esp8266->device_name,
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esp8266->client_name,
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AT_DEVICE_CLASS_ESP8266,
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(void *) esp8266);
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}
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INIT_APP_EXPORT(rt_hw_esp8266_port);
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static void at_wifi_set(int argc, char **argv)
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{
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struct at_device_ssid_pwd sATDConf;
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struct at_device *at_dev = RT_NULL;
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/* If the number of arguments less than 2 */
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if (argc != 3)
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{
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rt_kprintf("\n");
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rt_kprintf("at_wifi_set <ssid> <password>\n");
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return ;
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}
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sATDConf.ssid = argv[1]; //ssid
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sATDConf.password = argv[2]; //password
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if ((at_dev = at_device_get_first_initialized()) != RT_NULL)
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at_device_control(at_dev, AT_DEVICE_CTRL_SET_WIFI_INFO, &sATDConf);
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else
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{
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rt_kprintf("Can't find any initialized AT device.\n");
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}
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}
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#ifdef FINSH_USING_MSH
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MSH_CMD_EXPORT(at_wifi_set, AT device wifi set ssid / password function);
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#endif
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#endif /* BOARD_USING_ESP8266 */
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#if defined(BOARD_USING_LCD_ILI9341) && defined(NU_PKG_USING_ILI9341_SPI)
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#include <lcd_ili9341.h>
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#if defined(PKG_USING_GUIENGINE)
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#include <rtgui/driver.h>
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#endif
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int rt_hw_ili9341_port(void)
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{
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if (rt_hw_lcd_ili9341_spi_init("spi2") != RT_EOK)
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return -1;
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rt_hw_lcd_ili9341_init();
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#if defined(PKG_USING_GUIENGINE)
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rt_device_t lcd_ili9341;
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lcd_ili9341 = rt_device_find("lcd");
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if (lcd_ili9341)
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{
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rtgui_graphic_set_device(lcd_ili9341);
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}
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#endif
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return 0;
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}
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INIT_COMPONENT_EXPORT(rt_hw_ili9341_port);
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#endif /* BOARD_USING_LCD_ILI9341 */
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#if defined(BOARD_USING_NAU88L25) && defined(NU_PKG_USING_NAU88L25)
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#include <acodec_nau88l25.h>
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S_NU_NAU88L25_CONFIG sCodecConfig =
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{
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.i2c_bus_name = "i2c2",
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.i2s_bus_name = "sound0",
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.pin_phonejack_en = NU_GET_PININDEX(NU_PE, 13),
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.pin_phonejack_det = 0,
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};
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int rt_hw_nau88l25_port(void)
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{
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if (nu_hw_nau88l25_init(&sCodecConfig) != RT_EOK)
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return -1;
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return 0;
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}
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INIT_COMPONENT_EXPORT(rt_hw_nau88l25_port);
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#endif /* BOARD_USING_NAU88L25 */
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