231 lines
5.7 KiB
C
231 lines
5.7 KiB
C
/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-04-05 bigmagic Initial version
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* 2020-10-28 ma Buadrate & Multi-Port support
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*/
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/**
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* @addtogroup ls2k
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*/
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/*@{*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <rthw.h>
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#include "drv_uart.h"
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#define TRUE 1
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#define FALSE 0
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const struct serial_configure config_uart0 = {
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BAUD_RATE_115200, /* 921600 bits/s */
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DATA_BITS_8, /* 8 databits */
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STOP_BITS_1, /* 1 stopbit */
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PARITY_NONE, /* No parity */
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BIT_ORDER_LSB, /* LSB first sent */
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NRZ_NORMAL, /* Normal mode */
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RT_SERIAL_RB_BUFSZ, /* Buffer size */
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0
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};
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struct rt_uart_ls2k
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{
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void *base;
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rt_uint32_t IRQ;
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};
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static rt_err_t ls2k_uart_set_buad(struct rt_serial_device *serial,struct serial_configure *cfg)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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rt_err_t ret=RT_EOK;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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uint64_t brtc = (125000000U) / (16*(cfg->baud_rate));
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UART_LCR(uart_dev->base)=0x80; // Activate buadcfg
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UART_LSB(uart_dev->base)= brtc & 0xff;
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UART_MSB(uart_dev->base)= brtc >> 8;
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if(((((short)UART_MSB(uart_dev->base))<<8) | UART_LSB(uart_dev->base)) != brtc) ret=RT_ERROR;
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UART_LCR(uart_dev->base)= CFCR_8BITS;// Back to normal
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UART_MCR(uart_dev->base)= MCR_IENABLE/* | MCR_DTR | MCR_RTS*/;
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UART_IER(uart_dev->base) = 0;
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}
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static rt_err_t ls2k_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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ls2k_uart_set_buad(serial,cfg);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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HWREG8(0xffffffffbfe10428)=0x1f;// Enable Multi-Port Support, by default it's 0x11 ,which means UART0 & UART4 Controller is in single port mode.
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UART_IER(uart_dev->base) = 0; /* clear interrupt */
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UART_FCR(uart_dev->base) = 0xc1; /* reset UART Rx/Tx */
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/* set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
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UART_LCR(uart_dev->base) = 0x3;
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UART_MCR(uart_dev->base) = 0x3;
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UART_LSR(uart_dev->base) = 0x60;
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UART_MSR(uart_dev->base) = 0xb0;
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return RT_EOK;
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}
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static rt_err_t ls2k_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT: /* Disable RX IRQ */
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rt_hw_interrupt_mask(uart_dev->IRQ);
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break;
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case RT_DEVICE_CTRL_SET_INT: /* Enable RX IRQ */
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rt_hw_interrupt_umask(uart_dev->IRQ);
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UART_IER(uart_dev->base) |= (IER_IRxE|IER_ILE);
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break;
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default:
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break;
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}
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return RT_EOK;
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}
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static rt_bool_t uart_is_transmit_empty(struct rt_uart_ls2k *uart_dev)
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{
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unsigned char status = UART_LSR(uart_dev->base);
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if (status & (UARTLSR_TE | UARTLSR_TFE))
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{
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return TRUE;
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}
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else
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{
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return FALSE;
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}
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}
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static int ls2k_uart_putc(struct rt_serial_device *serial, char c)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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while (FALSE == uart_is_transmit_empty(uart_dev))
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;
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UART_DAT(uart_dev->base) = c;
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return 1;
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}
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static int ls2k_uart_getc(struct rt_serial_device *serial)
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{
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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if (LSR_RXRDY & UART_LSR(uart_dev->base))
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{
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return UART_DAT(uart_dev->base);
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}
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return -1;
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}
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/* UART interrupt handler */
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static void uart_irq_handler(int vector, void *param)
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{
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struct rt_serial_device *serial = (struct rt_serial_device *)param;
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struct rt_uart_ls2k *uart_dev = RT_NULL;
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RT_ASSERT(serial != RT_NULL);
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uart_dev = (struct rt_uart_ls2k *)serial->parent.user_data;
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unsigned char iir = UART_IIR(uart_dev->base);
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/* Find out interrupt reason */
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if ((IIR_RXTOUT & iir) || (IIR_RXRDY & iir))
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{
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rt_interrupt_enter();
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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rt_interrupt_leave();
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}
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}
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static const struct rt_uart_ops ls2k_uart_ops =
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{
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ls2k_uart_configure,
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ls2k_uart_control,
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ls2k_uart_putc,
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ls2k_uart_getc,
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};
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struct rt_uart_ls2k uart_dev0 =
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{
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(void *)UARTx_BASE(0),
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LS2K_UART_0_1_2_3_IRQ,
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};
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struct rt_uart_ls2k uart_dev4 =
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{
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(void *)UARTx_BASE(4),
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LS2K_UART_4_5_6_7_IRQ ,
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};
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struct rt_serial_device serial,serial4;
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void rt_hw_uart_init(void)
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{
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//UART0_1_ENABLE=0xff;
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struct rt_uart_ls2k *uart,*uart4;
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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uart = &uart_dev0;
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uart4=&uart_dev4;
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serial.ops = &ls2k_uart_ops;
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serial.config = config_uart0;
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serial4.ops= &ls2k_uart_ops;
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serial4.config=config;
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rt_hw_interrupt_install(uart->IRQ, uart_irq_handler, &serial, "UART0");
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rt_hw_interrupt_install(uart4->IRQ, uart_irq_handler, &serial4, "UART4");
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/* register UART device */
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rt_hw_serial_register(&serial,
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"uart0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart);
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rt_hw_serial_register(&serial4,
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"uart4",
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RT_DEVICE_FLAG_RDWR| RT_DEVICE_FLAG_INT_RX,
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&uart_dev4);
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}
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/*@}*/
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