268 lines
6.1 KiB
C
268 lines
6.1 KiB
C
/* SPDX-License-Identifier: Apache-2.0 */
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/* Copyright (c) 2006-2018, RT-Thread Development Team
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* Copyright (c) 2020, duhuanpeng<548708880@qq.com>
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*
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* Change Logs:
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* Date Author Notes
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* 2015-01-20 Bernard the first version
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* 2017-10-20 ZYH add mode open drain and input pull down
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* 2020-06-01 Du Huanpeng GPIO driver based on <components/drivers/include/drivers/pin.h>
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*/
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#include <rtthread.h>
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#include <drivers/pin.h>
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#include <ls2k1000.h>
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#include "drv_gpio.h"
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#ifdef RT_USING_PIN
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#define GPIO_IRQ_NUM (64)
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static struct gpio_irq_def _g_gpio_irq_tbl[GPIO_IRQ_NUM];
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static void loongson_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
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{
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struct loongson_gpio *gpio;
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rt_uint64_t m;
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gpio = (void *)device->user_data;
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m = (rt_uint64_t)1 << pin;
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switch (mode)
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{
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case PIN_MODE_OUTPUT:
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gpio->GPIO0_OEN &= ~m;
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break;
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case PIN_MODE_INPUT:
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gpio->GPIO0_OEN |= m;
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break;
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case PIN_MODE_INPUT_PULLUP:
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gpio->GPIO0_OEN |= m;
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break;
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case PIN_MODE_INPUT_PULLDOWN:
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gpio->GPIO0_OEN |= m;
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break;
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case PIN_MODE_OUTPUT_OD:
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gpio->GPIO0_OEN &= ~m;
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break;
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default:
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/* error */
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rt_kprintf("error\n");
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}
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}
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static void loongson_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value)
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{
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struct loongson_gpio *gpio;
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rt_uint64_t m;
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if (pin < 0 || pin >= 60)
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{
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rt_kprintf("error\n");
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return;
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}
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gpio = (void *)device->user_data;
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m = (rt_uint64_t)1 << pin;
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if (value)
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gpio->GPIO0_O |= m;
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else
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gpio->GPIO0_O &= ~m;
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}
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static int loongson_pin_read(struct rt_device *device, rt_base_t pin)
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{
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struct loongson_gpio *gpio;
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int rc;
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gpio = (void *)device->user_data;
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rt_uint64_t m;
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m = gpio->GPIO0_I;
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m &= (rt_uint64_t)1 << pin;
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rc = !!m;
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return rc;
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}
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/* TODO: add GPIO interrupt */
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static rt_err_t loongson_pin_attach_irq(struct rt_device *device, rt_int32_t pin, rt_uint32_t mode, void (*hdr)(void *args), void *args)
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{
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rt_uint8_t index;
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rt_uint64_t m;
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struct loongson_gpio *gpio;
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gpio = (void *)device->user_data;
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if (pin < 4)
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{
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index = pin;
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}
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else if (pin < 32)
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{
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index = 5;
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}
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else
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{
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index = 6;
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}
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_g_gpio_irq_tbl[index].irq_cb[pin] = hdr;
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_g_gpio_irq_tbl[index].irq_arg[pin] = args;
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_g_gpio_irq_tbl[index].irq_type[pin] = mode;
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liointc_set_irq_mode(index, mode);
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m = (rt_uint64_t)1 << pin;
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gpio->GPIO0_INTEN |= m;
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return RT_EOK;
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}
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static rt_err_t loongson_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
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{
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struct loongson_gpio *gpio;
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gpio = (void *)device->user_data;
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rt_uint8_t index;
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if (pin < 4)
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{
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index = pin;
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}
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else if (pin < 32)
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{
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index = 5;
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}
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else
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{
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index = 6;
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}
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_g_gpio_irq_tbl[index].irq_cb[pin] = RT_NULL;
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_g_gpio_irq_tbl[index].irq_arg[pin] = RT_NULL;
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_g_gpio_irq_tbl[index].irq_type[pin] = RT_NULL;
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_g_gpio_irq_tbl[index].state[pin] = RT_NULL;
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return RT_EOK;
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}
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static rt_err_t loongson_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
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{
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struct loongson_gpio *gpio;
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gpio = (void *)device->user_data;
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rt_uint8_t index;
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if (pin < 4)
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{
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index = pin;
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}
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else if (pin < 32)
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{
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index = 5;
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}
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else
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{
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index = 6;
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}
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if (enabled)
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_g_gpio_irq_tbl[index].state[pin] = 1;
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else
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_g_gpio_irq_tbl[index].state[pin] = 0;
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return RT_EOK;
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}
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static void gpio_irq_handler(int irq, void *param)
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{
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struct gpio_irq_def *irq_def = (struct gpio_irq_def *)param;
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rt_uint32_t pin;
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rt_uint32_t value;
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rt_uint32_t tmpvalue;
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if (irq == LS2K_GPIO0_INT_IRQ)
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{
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pin = 0;
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}
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else if (irq == LS2K_GPIO1_INT_IRQ)
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{
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pin = 1;
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}
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else if (irq == LS2K_GPIO2_INT_IRQ)
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{
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pin = 2;
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}
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else if (irq == LS2K_GPIO3_INT_IRQ)
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{
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pin = 3;
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}
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else if (irq == LS2K_GPIO_INTLO_IRQ)
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{
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pin = 4;
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}
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else
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{
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pin = 32;
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}
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while (value)
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{
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if ((value & 0x1) && (irq_def->irq_cb[pin] != RT_NULL))
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{
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if (irq_def->state[pin])
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{
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irq_def->irq_cb[pin](irq_def->irq_arg[pin]);
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}
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}
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pin++;
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value = value >> 1;
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}
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}
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static struct rt_pin_ops loongson_pin_ops =
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{
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.pin_mode = loongson_pin_mode,
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.pin_write = loongson_pin_write,
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.pin_read = loongson_pin_read,
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/* TODO: add GPIO interrupt */
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.pin_attach_irq = loongson_pin_attach_irq,
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.pin_detach_irq = loongson_pin_detach_irq,
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.pin_irq_enable = loongson_pin_irq_enable,
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.pin_get = RT_NULL,
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};
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int loongson_pin_init(void)
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{
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int rc;
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static struct loongson_gpio *loongson_gpio_priv;
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loongson_gpio_priv = (void *)GPIO_BASE;
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rc = rt_device_pin_register("pin", &loongson_pin_ops, loongson_gpio_priv);
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//gpio0
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rt_hw_interrupt_install(LS2K_GPIO0_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[0], "gpio0_irq");
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rt_hw_interrupt_umask(LS2K_GPIO0_INT_IRQ);
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//gpio1
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rt_hw_interrupt_install(LS2K_GPIO1_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[1], "gpio1_irq");
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rt_hw_interrupt_umask(LS2K_GPIO1_INT_IRQ);
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//gpio2
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rt_hw_interrupt_install(LS2K_GPIO2_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[2], "gpio2_irq");
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rt_hw_interrupt_umask(LS2K_GPIO2_INT_IRQ);
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//gpio3
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rt_hw_interrupt_install(LS2K_GPIO3_INT_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[3], "gpio3_irq");
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rt_hw_interrupt_umask(LS2K_GPIO3_INT_IRQ);
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//gpio4~gpio31
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rt_hw_interrupt_install(LS2K_GPIO_INTLO_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[4], "gpio4_irq");
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rt_hw_interrupt_umask(LS2K_GPIO_INTLO_IRQ);
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//gpio32~gpio63
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rt_hw_interrupt_install(LS2K_GPIO_INTHI_IRQ, gpio_irq_handler, &_g_gpio_irq_tbl[5], "gpio5_irq");
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rt_hw_interrupt_umask(LS2K_GPIO_INTHI_IRQ);
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return rc;
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}
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INIT_BOARD_EXPORT(loongson_pin_init);
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#endif /*RT_USING_PIN */
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