163 lines
6.9 KiB
C
163 lines
6.9 KiB
C
/*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*/
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/******************************************************************************/
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/** \file hc32f460_wdt.h
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**
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** A detailed description is available at
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** @link WdtGroup Watchdog Counter description @endlink
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**
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** - 2018-10-18 CDT First version for Device Driver Library of WDT.
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**
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******************************************************************************/
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#ifndef __HC32F460_WDT_H__
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#define __HC32F460_WDT_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_common.h"
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#include "ddl_config.h"
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#if (DDL_WDT_ENABLE == DDL_ON)
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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*******************************************************************************
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** \defgroup WdtGroup WatchDog Counter(WDT)
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**
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******************************************************************************/
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//@{
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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*******************************************************************************
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** \brief WDT count cycle enumeration
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******************************************************************************/
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typedef enum en_wdt_count_cycle
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{
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WdtCountCycle256 = 0u, ///< 256 cycle
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WdtCountCycle4096 = 1u, ///< 4096 cycle
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WdtCountCycle16384 = 2u, ///< 16384 cycle
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WdtCountCycle65536 = 3u, ///< 65536 cycle
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} en_wdt_count_cycle_t;
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/**
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*******************************************************************************
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** \brief WDT count clock division enumeration
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******************************************************************************/
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typedef enum en_wdt_clk_div
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{
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WdtPclk3Div4 = 2u, ///< PCLK3/4
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WdtPclk3Div64 = 6u, ///< PCLK3/64
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WdtPclk3Div128 = 7u, ///< PCLK3/128
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WdtPclk3Div256 = 8u, ///< PCLK3/256
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WdtPclk3Div512 = 9u, ///< PCLK3/512
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WdtPclk3Div1024 = 10u, ///< PCLK3/1024
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WdtPclk3Div2048 = 11u, ///< PCLK3/2048
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WdtPclk3Div8192 = 13u, ///< PCLK3/8192
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} en_wdt_clk_div_t;
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/**
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*******************************************************************************
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** \brief WDT allow refresh percent range enumeration
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******************************************************************************/
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typedef enum en_wdt_refresh_range
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{
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WdtRefresh100Pct = 0u, ///< 100%
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WdtRefresh0To25Pct = 1u, ///< 0%~25%
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WdtRefresh25To50Pct = 2u, ///< 25%~50%
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WdtRefresh0To50Pct = 3u, ///< 0%~50%
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WdtRefresh50To75Pct = 4u, ///< 50%~75%
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WdtRefresh0To25PctAnd50To75Pct = 5u, ///< 0%~25% & 50%~75%
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WdtRefresh25To75Pct = 6u, ///< 25%~75%
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WdtRefresh0To75Pct = 7u, ///< 0%~75%
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WdtRefresh75To100Pct = 8u, ///< 75%~100%
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WdtRefresh0To25PctAnd75To100Pct = 9u, ///< 0%~25% & 75%~100%
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WdtRefresh25To50PctAnd75To100Pct = 10u, ///< 25%~50% & 75%~100%
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WdtRefresh0To50PctAnd75To100Pct = 11u, ///< 0%~50% & 75%~100%
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WdtRefresh50To100Pct = 12u, ///< 50%~100%
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WdtRefresh0To25PctAnd50To100Pct = 13u, ///< 0%~25% & 50%~100%
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WdtRefresh25To100Pct = 14u, ///< 25%~100%
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WdtRefresh0To100Pct = 15u, ///< 0%~100%
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} en_wdt_refresh_range_t;
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/**
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*******************************************************************************
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** \brief WDT refresh error or count underflow trigger event type enumeration
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******************************************************************************/
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typedef enum en_wdt_event_request_type
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{
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WdtTriggerInterruptRequest = 0u, ///< Interrupt request
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WdtTriggerResetRequest = 1u, ///< Reset request
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} en_wdt_event_request_type_t;
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/**
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*******************************************************************************
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** \brief WDT flag type enumeration
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******************************************************************************/
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typedef enum en_wdt_flag_type
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{
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WdtFlagCountUnderflow = 0u, ///< Count underflow flag
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WdtFlagRefreshError = 1u, ///< Refresh error flag
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} en_wdt_flag_type_t;
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/**
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*******************************************************************************
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** \brief WDT init structure definition
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******************************************************************************/
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typedef struct stc_wdt_init
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{
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en_wdt_count_cycle_t enCountCycle; ///< Count cycle
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en_wdt_clk_div_t enClkDiv; ///< Count clock division
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en_wdt_refresh_range_t enRefreshRange; ///< Allow refresh percent range
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en_functional_state_t enSleepModeCountEn; ///< Enable/disable count in the sleep mode
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en_wdt_event_request_type_t enRequestType; ///< Refresh error or count underflow trigger event type
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} stc_wdt_init_t;
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/*******************************************************************************
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* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/*******************************************************************************
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* Global variable definitions ('extern')
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******************************************************************************/
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/*******************************************************************************
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Global function prototypes (definition in C source)
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******************************************************************************/
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/* Base functions */
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en_result_t WDT_Init(const stc_wdt_init_t *pstcWdtInit);
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en_result_t WDT_RefreshCounter(void);
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uint16_t WDT_GetCountValue(void);
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/* Flags functions */
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en_flag_status_t WDT_GetFlag(en_wdt_flag_type_t enFlag);
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en_result_t WDT_ClearFlag(en_wdt_flag_type_t enFlag);
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//@} // WdtGroup
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#ifdef __cplusplus
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}
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#endif
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#endif /* DDL_WDT_ENABLE */
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#endif /* __HC32F460_WDT_H__ */
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/*******************************************************************************
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* EOF (not truncated)
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******************************************************************************/
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