967 lines
35 KiB
C
967 lines
35 KiB
C
/*!
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\file gd32f3x0_rtc.c
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\brief RTC driver
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\version 2017-06-06, V1.0.0, firmware for GD32F3x0
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\version 2019-06-01, V2.0.0, firmware for GD32F3x0
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*/
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/*
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Copyright (c) 2019, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32f3x0_rtc.h"
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/*!
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\brief reset most of the RTC registers
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\param[in] none
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\param[out] none
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\retval ErrStatus: ERROR or SUCCESS
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*/
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ErrStatus rtc_deinit(void)
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{
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ErrStatus error_status = ERROR;
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/* RTC_TAMP register is not under write protection */
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RTC_TAMP = RTC_REGISTER_RESET;
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/* disable the write protection */
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RTC_WPK = RTC_UNLOCK_KEY1;
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RTC_WPK = RTC_UNLOCK_KEY2;
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/* reset RTC_CTL register, this can be done without the init mode */
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RTC_CTL &= RTC_REGISTER_RESET;
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/* enter init mode */
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error_status = rtc_init_mode_enter();
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if(ERROR != error_status){
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/* before reset RTC_TIME and RTC_DATE, BPSHAD bit in RTC_CTL should be reset as the condition.
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in order to read calendar from shadow register, not the real registers being reset */
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RTC_TIME = RTC_REGISTER_RESET;
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RTC_DATE = RTC_DATE_RESET;
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RTC_PSC = RTC_PSC_RESET;
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/* reset RTC_STAT register, also exit init mode.
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at the same time, RTC_STAT_SOPF bit is reset, as the condition to reset RTC_SHIFTCTL register later */
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RTC_STAT = RTC_STAT_RESET;
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/* to write RTC_ALRM0SS register, ALRM0EN bit in RTC_CTL register should be reset as the condition */
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RTC_ALRM0TD = RTC_REGISTER_RESET;
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RTC_ALRM0SS = RTC_REGISTER_RESET;
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/* reset RTC_SHIFTCTL and RTC_HRFC register, this can be done without the init mode */
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RTC_SHIFTCTL = RTC_REGISTER_RESET;
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RTC_HRFC = RTC_REGISTER_RESET;
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error_status = rtc_register_sync_wait();
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}
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/* enable the write protection */
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RTC_WPK = RTC_LOCK_KEY;
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return error_status;
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}
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/*!
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\brief initialize RTC registers
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\param[in] rtc_initpara_struct: pointer to a rtc_parameter_struct structure which contains
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parameters for initialization of the rtc peripheral
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members of the structure and the member values are shown as below:
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rtc_year: 0x0 - 0x99(BCD format)
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rtc_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
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RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
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rtc_date: 0x1 - 0x31(BCD format)
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rtc_day_of_week: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY
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RTC_FRIDAY, RTC_SATURDAY, RTC_SUNDAY
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rtc_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format chose
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rtc_minute: 0x0 - 0x59(BCD format)
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rtc_second: 0x0 - 0x59(BCD format)
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rtc_factor_asyn: 0x0 - 0x7F
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rtc_factor_syn: 0x0 - 0x7FFF
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rtc_am_pm: RTC_AM, RTC_PM
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rtc_display_format: RTC_24HOUR, RTC_12HOUR
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\param[out] none
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\retval ErrStatus: ERROR or SUCCESS
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*/
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ErrStatus rtc_init(rtc_parameter_struct* rtc_initpara_struct)
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{
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ErrStatus error_status = ERROR;
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uint32_t reg_time = 0x00U, reg_date = 0x00U;
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reg_date = (DATE_YR(rtc_initpara_struct->rtc_year) | \
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DATE_DOW(rtc_initpara_struct->rtc_day_of_week) | \
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DATE_MON(rtc_initpara_struct->rtc_month) | \
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DATE_DAY(rtc_initpara_struct->rtc_date));
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reg_time = (rtc_initpara_struct->rtc_am_pm| \
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TIME_HR(rtc_initpara_struct->rtc_hour) | \
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TIME_MN(rtc_initpara_struct->rtc_minute) | \
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TIME_SC(rtc_initpara_struct->rtc_second));
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/* 1st: disable the write protection */
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RTC_WPK = RTC_UNLOCK_KEY1;
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RTC_WPK = RTC_UNLOCK_KEY2;
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/* 2nd: enter init mode */
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error_status = rtc_init_mode_enter();
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if(ERROR != error_status){
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RTC_PSC = (uint32_t)(PSC_FACTOR_A(rtc_initpara_struct->rtc_factor_asyn)| \
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PSC_FACTOR_S(rtc_initpara_struct->rtc_factor_syn));
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RTC_TIME = (uint32_t)reg_time;
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RTC_DATE = (uint32_t)reg_date;
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RTC_CTL &= (uint32_t)(~RTC_CTL_CS);
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RTC_CTL |= rtc_initpara_struct->rtc_display_format;
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/* 3rd: exit init mode */
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rtc_init_mode_exit();
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/* 4th: wait the RSYNF flag to set */
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error_status = rtc_register_sync_wait();
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}
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/* 5th: enable the write protection */
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RTC_WPK = RTC_LOCK_KEY;
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return error_status;
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}
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/*!
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\brief enter RTC init mode
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\param[in] none
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\param[out] none
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\retval ErrStatus: ERROR or SUCCESS
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*/
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ErrStatus rtc_init_mode_enter(void)
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{
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uint32_t time_index = RTC_INITM_TIMEOUT;
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uint32_t flag_status = RESET;
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ErrStatus error_status = ERROR;
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/* check whether it has been in init mode */
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if(RESET == (RTC_STAT & RTC_STAT_INITF)){
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RTC_STAT |= RTC_STAT_INITM;
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/* wait until the INITF flag to be set */
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do{
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flag_status = RTC_STAT & RTC_STAT_INITF;
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}while((--time_index > 0x00U) && (RESET == flag_status));
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if(RESET != flag_status){
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error_status = SUCCESS;
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}
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}else{
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error_status = SUCCESS;
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}
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return error_status;
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}
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/*!
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\brief exit RTC init mode
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\param[in] none
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\param[out] none
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\retval none
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*/
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void rtc_init_mode_exit(void)
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{
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RTC_STAT &= (uint32_t)(~RTC_STAT_INITM);
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}
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/*!
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\brief wait until RTC_TIME and RTC_DATE registers are synchronized with APB clock, and the shadow
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registers are updated
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\param[in] none
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\param[out] none
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\retval ErrStatus: ERROR or SUCCESS
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*/
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ErrStatus rtc_register_sync_wait(void)
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{
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volatile uint32_t time_index = RTC_RSYNF_TIMEOUT;
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uint32_t flag_status = RESET;
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ErrStatus error_status = ERROR;
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if(RESET == (RTC_CTL & RTC_CTL_BPSHAD)){
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/* disable the write protection */
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RTC_WPK = RTC_UNLOCK_KEY1;
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RTC_WPK = RTC_UNLOCK_KEY2;
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/* firstly clear RSYNF flag */
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RTC_STAT &= (uint32_t)(~RTC_STAT_RSYNF);
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/* wait until RSYNF flag to be set */
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do{
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flag_status = RTC_STAT & RTC_STAT_RSYNF;
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}while((--time_index > 0x00U) && (RESET == flag_status));
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if(RESET != flag_status){
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error_status = SUCCESS;
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}
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/* enable the write protection */
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RTC_WPK = RTC_LOCK_KEY;
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}else{
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error_status = SUCCESS;
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}
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return error_status;
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}
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/*!
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\brief get current time and date
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\param[in] none
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\param[out] rtc_initpara_struct: pointer to a rtc_parameter_struct structure which contains
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parameters for initialization of the rtc peripheral
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members of the structure and the member values are shown as below:
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rtc_year: 0x0 - 0x99(BCD format)
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rtc_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
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RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
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rtc_date: 0x1 - 0x31(BCD format)
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rtc_day_of_week: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY
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RTC_FRIDAY, RTC_SATURDAY, RTC_SUNDAY
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rtc_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format chose
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rtc_minute: 0x0 - 0x59(BCD format)
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rtc_second: 0x0 - 0x59(BCD format)
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rtc_factor_asyn: 0x0 - 0x7F
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rtc_factor_syn: 0x0 - 0x7FFF
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rtc_am_pm: RTC_AM, RTC_PM
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rtc_display_format: RTC_24HOUR, RTC_12HOUR
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\retval none
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*/
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void rtc_current_time_get(rtc_parameter_struct* rtc_initpara_struct)
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{
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uint32_t temp_tr = 0x00U, temp_dr = 0x00U, temp_pscr = 0x00U, temp_ctlr = 0x00U;
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temp_tr = (uint32_t)RTC_TIME;
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temp_dr = (uint32_t)RTC_DATE;
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temp_pscr = (uint32_t)RTC_PSC;
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temp_ctlr = (uint32_t)RTC_CTL;
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/* get current time and construct rtc_parameter_struct structure */
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rtc_initpara_struct->rtc_year = (uint8_t)GET_DATE_YR(temp_dr);
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rtc_initpara_struct->rtc_month = (uint8_t)GET_DATE_MON(temp_dr);
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rtc_initpara_struct->rtc_date = (uint8_t)GET_DATE_DAY(temp_dr);
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rtc_initpara_struct->rtc_day_of_week = (uint8_t)GET_DATE_DOW(temp_dr);
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rtc_initpara_struct->rtc_hour = (uint8_t)GET_TIME_HR(temp_tr);
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rtc_initpara_struct->rtc_minute = (uint8_t)GET_TIME_MN(temp_tr);
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rtc_initpara_struct->rtc_second = (uint8_t)GET_TIME_SC(temp_tr);
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rtc_initpara_struct->rtc_factor_asyn = (uint16_t)GET_PSC_FACTOR_A(temp_pscr);
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rtc_initpara_struct->rtc_factor_syn = (uint16_t)GET_PSC_FACTOR_S(temp_pscr);
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rtc_initpara_struct->rtc_am_pm = (uint32_t)(temp_pscr & RTC_TIME_PM);
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rtc_initpara_struct->rtc_display_format = (uint32_t)(temp_ctlr & RTC_CTL_CS);
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}
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/*!
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\brief get current subsecond value
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\param[in] none
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\param[out] none
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\retval current subsecond value
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*/
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uint32_t rtc_subsecond_get(void)
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{
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uint32_t reg = 0x00U;
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/* if BPSHAD bit is reset, reading RTC_SS will lock RTC_TIME and RTC_DATE automatically */
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reg = (uint32_t)RTC_SS;
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/* read RTC_DATE to unlock the 3 shadow registers */
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(void) (RTC_DATE);
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return reg;
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}
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/*!
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\brief configure RTC alarm
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\param[in] rtc_alarm_time: pointer to a rtc_alarm_struct structure which contains
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parameters for RTC alarm configuration
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members of the structure and the member values are shown as below:
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rtc_alarm_mask: RTC_ALARM_NONE_MASK, RTC_ALARM_DATE_MASK, RTC_ALARM_HOUR_MASK
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RTC_ALARM_MINUTE_MASK, RTC_ALARM_SECOND_MASK, RTC_ALARM_ALL_MASK
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rtc_weekday_or_date: RTC_ALARM_DATE_SELECTED, RTC_ALARM_WEEKDAY_SELECTED
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rtc_alarm_day: 1) 0x1 - 0x31(BCD format) if RTC_ALARM_DATE_SELECTED is set
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2) RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
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RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
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rtc_alarm_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
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rtc_alarm_minute: 0x0 - 0x59(BCD format)
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rtc_alarm_second: 0x0 - 0x59(BCD format)
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rtc_am_pm: RTC_AM, RTC_PM
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\param[out] none
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\retval none
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*/
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void rtc_alarm_config(rtc_alarm_struct* rtc_alarm_time)
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{
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uint32_t reg_alrm0td = 0x00U;
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reg_alrm0td = (rtc_alarm_time->rtc_alarm_mask | \
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rtc_alarm_time->rtc_weekday_or_date | \
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rtc_alarm_time->rtc_am_pm | \
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ALRM0TD_DAY(rtc_alarm_time->rtc_alarm_day) | \
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ALRM0TD_HR(rtc_alarm_time->rtc_alarm_hour) | \
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ALRM0TD_MN(rtc_alarm_time->rtc_alarm_minute) | \
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ALRM0TD_SC(rtc_alarm_time->rtc_alarm_second));
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/* disable the write protection */
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RTC_WPK = RTC_UNLOCK_KEY1;
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RTC_WPK = RTC_UNLOCK_KEY2;
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RTC_ALRM0TD = (uint32_t)reg_alrm0td;
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/* enable the write protection */
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RTC_WPK = RTC_LOCK_KEY;
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}
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/*!
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\brief configure subsecond of RTC alarm
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\param[in] mask_subsecond: alarm subsecond mask
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only one parameter can be selected which is shown as below:
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\arg RTC_MASKSSC_0_14: mask alarm subsecond configuration
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\arg RTC_MASKSSC_1_14: mask RTC_ALRM0SS_SSC[14:1], and RTC_ALRM0SS_SSC[0] is to be compared
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\arg RTC_MASKSSC_2_14: mask RTC_ALRM0SS_SSC[14:2], and RTC_ALRM0SS_SSC[1:0] is to be compared
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\arg RTC_MASKSSC_3_14: mask RTC_ALRM0SS_SSC[14:3], and RTC_ALRM0SS_SSC[2:0] is to be compared
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\arg RTC_MASKSSC_4_14: mask RTC_ALRM0SS_SSC[14:4], and RTC_ALRM0SS_SSC[3:0] is to be compared
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\arg RTC_MASKSSC_5_14: mask RTC_ALRM0SS_SSC[14:5], and RTC_ALRM0SS_SSC[4:0] is to be compared
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\arg RTC_MASKSSC_6_14: mask RTC_ALRM0SS_SSC[14:6], and RTC_ALRM0SS_SSC[5:0] is to be compared
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\arg RTC_MASKSSC_7_14: mask RTC_ALRM0SS_SSC[14:7], and RTC_ALRM0SS_SSC[6:0] is to be compared
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\arg RTC_MASKSSC_8_14: mask RTC_ALRM0SS_SSC[14:8], and RTC_ALRM0SS_SSC[7:0] is to be compared
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\arg RTC_MASKSSC_9_14: mask RTC_ALRM0SS_SSC[14:9], and RTC_ALRM0SS_SSC[8:0] is to be compared
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\arg RTC_MASKSSC_10_14: mask RTC_ALRM0SS_SSC[14:10], and RTC_ALRM0SS_SSC[9:0] is to be compared
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\arg RTC_MASKSSC_11_14: mask RTC_ALRM0SS_SSC[14:11], and RTC_ALRM0SS_SSC[10:0] is to be compared
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\arg RTC_MASKSSC_12_14: mask RTC_ALRM0SS_SSC[14:12], and RTC_ALRM0SS_SSC[11:0] is to be compared
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\arg RTC_MASKSSC_13_14: mask RTC_ALRM0SS_SSC[14:13], and RTC_ALRM0SS_SSC[12:0] is to be compared
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\arg RTC_MASKSSC_14: mask RTC_ALRM0SS_SSC[14], and RTC_ALRM0SS_SSC[13:0] is to be compared
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\arg RTC_MASKSSC_NONE: mask none, and RTC_ALRM0SS_SSC[14:0] is to be compared
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\param[in] subsecond: alarm subsecond value(0x000 - 0x7FFF)
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\param[out] none
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\retval none
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*/
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void rtc_alarm_subsecond_config(uint32_t mask_subsecond, uint32_t subsecond)
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{
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/* disable the write protection */
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RTC_WPK = RTC_UNLOCK_KEY1;
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RTC_WPK = RTC_UNLOCK_KEY2;
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RTC_ALRM0SS = mask_subsecond | subsecond;
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/* enable the write protection */
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RTC_WPK = RTC_LOCK_KEY;
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}
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/*!
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\brief get RTC alarm
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\param[in] none
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\param[out] rtc_alarm_time: pointer to a rtc_alarm_struct structure which contains
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parameters for RTC alarm configuration
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members of the structure and the member values are shown as below:
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rtc_alarm_mask: RTC_ALARM_NONE_MASK, RTC_ALARM_DATE_MASK, RTC_ALARM_HOUR_MASK
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RTC_ALARM_MINUTE_MASK, RTC_ALARM_SECOND_MASK, RTC_ALARM_ALL_MASK
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rtc_weekday_or_date: RTC_ALARM_DATE_SELECTED, RTC_ALARM_WEEKDAY_SELECTED
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rtc_alarm_day: 1) 0x1 - 0x31(BCD format) if RTC_ALARM_DATE_SELECTED is set
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2) RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
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RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
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rtc_alarm_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
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rtc_alarm_minute: 0x0 - 0x59(BCD format)
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rtc_alarm_second: 0x0 - 0x59(BCD format)
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rtc_am_pm: RTC_AM, RTC_PM
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\retval none
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*/
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void rtc_alarm_get(rtc_alarm_struct* rtc_alarm_time)
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{
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uint32_t reg_alrm0td = 0x00U;
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/* get the value of RTC_ALRM0TD register */
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reg_alrm0td = RTC_ALRM0TD;
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/* get alarm parameters and construct the rtc_alarm_struct structure */
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rtc_alarm_time->rtc_alarm_mask = reg_alrm0td & RTC_ALARM_ALL_MASK;
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rtc_alarm_time->rtc_am_pm = (uint32_t)(reg_alrm0td & RTC_ALRM0TD_PM);
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rtc_alarm_time->rtc_weekday_or_date = (uint32_t)(reg_alrm0td & RTC_ALRM0TD_DOWS);
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rtc_alarm_time->rtc_alarm_day = (uint8_t)GET_ALRM0TD_DAY(reg_alrm0td);
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rtc_alarm_time->rtc_alarm_hour = (uint8_t)GET_ALRM0TD_HR(reg_alrm0td);
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rtc_alarm_time->rtc_alarm_minute = (uint8_t)GET_ALRM0TD_MN(reg_alrm0td);
|
|
rtc_alarm_time->rtc_alarm_second = (uint8_t)GET_ALRM0TD_SC(reg_alrm0td);
|
|
}
|
|
|
|
/*!
|
|
\brief get RTC alarm subsecond
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval RTC alarm subsecond value
|
|
*/
|
|
uint32_t rtc_alarm_subsecond_get(void)
|
|
{
|
|
return ((uint32_t)(RTC_ALRM0SS & RTC_ALRM0SS_SSC));
|
|
}
|
|
|
|
/*!
|
|
\brief enable RTC alarm
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_alarm_enable(void)
|
|
{
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
RTC_CTL |= RTC_CTL_ALRM0EN;
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
/*!
|
|
\brief disable RTC alarm
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval ErrStatus: ERROR or SUCCESS
|
|
*/
|
|
ErrStatus rtc_alarm_disable(void)
|
|
{
|
|
volatile uint32_t time_index = RTC_ALRM0WF_TIMEOUT;
|
|
ErrStatus error_status = ERROR;
|
|
uint32_t flag_status = RESET;
|
|
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
/* clear the state of alarm */
|
|
RTC_CTL &= (uint32_t)(~RTC_CTL_ALRM0EN);
|
|
|
|
/* wait until ALRM0WF flag to be set after the alarm is disabled */
|
|
do{
|
|
flag_status = RTC_STAT & RTC_STAT_ALRM0WF;
|
|
}while((--time_index > 0x00U) && (RESET == flag_status));
|
|
|
|
if(RESET != flag_status){
|
|
error_status = SUCCESS;
|
|
}
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
|
|
return error_status;
|
|
}
|
|
|
|
/*!
|
|
\brief enable RTC time-stamp
|
|
\param[in] edge: specify which edge to detect of time-stamp
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_TIMESTAMP_RISING_EDGE: rising edge is valid event edge for timestamp event
|
|
\arg RTC_TIMESTAMP_FALLING_EDGE: falling edge is valid event edge for timestamp event
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_timestamp_enable(uint32_t edge)
|
|
{
|
|
uint32_t reg_ctl = 0x00U;
|
|
|
|
/* clear the bits to be configured in RTC_CTL */
|
|
reg_ctl = (uint32_t)(RTC_CTL & (uint32_t)(~(RTC_CTL_TSEG | RTC_CTL_TSEN)));
|
|
|
|
/* new configuration */
|
|
reg_ctl |= (uint32_t)(edge | RTC_CTL_TSEN);
|
|
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
RTC_CTL = (uint32_t)reg_ctl;
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
/*!
|
|
\brief disable RTC time-stamp
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_timestamp_disable(void)
|
|
{
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
/* clear the TSEN bit */
|
|
RTC_CTL &= (uint32_t)(~ RTC_CTL_TSEN);
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
/*!
|
|
\brief get RTC timestamp time and date
|
|
\param[in] none
|
|
\param[out] rtc_timestamp: pointer to a rtc_timestamp_struct structure which contains
|
|
parameters for RTC time-stamp configuration
|
|
members of the structure and the member values are shown as below:
|
|
rtc_timestamp_month: RTC_JAN, RTC_FEB, RTC_MAR, RTC_APR, RTC_MAY, RTC_JUN,
|
|
RTC_JUL, RTC_AUG, RTC_SEP, RTC_OCT, RTC_NOV, RTC_DEC
|
|
rtc_timestamp_date: 0x1 - 0x31(BCD format)
|
|
rtc_timestamp_day: RTC_MONDAY, RTC_TUESDAY, RTC_WEDSDAY, RTC_THURSDAY, RTC_FRIDAY,
|
|
RTC_SATURDAY, RTC_SUNDAY if RTC_ALARM_WEEKDAY_SELECTED is set
|
|
rtc_timestamp_hour: 0x0 - 0x12(BCD format) or 0x0 - 0x23(BCD format) depending on the rtc_display_format
|
|
rtc_timestamp_minute: 0x0 - 0x59(BCD format)
|
|
rtc_timestamp_second: 0x0 - 0x59(BCD format)
|
|
rtc_am_pm: RTC_AM, RTC_PM
|
|
\retval none
|
|
*/
|
|
void rtc_timestamp_get(rtc_timestamp_struct* rtc_timestamp)
|
|
{
|
|
uint32_t temp_tts = 0x00U, temp_dts = 0x00U;
|
|
|
|
/* get the value of time_stamp registers */
|
|
temp_tts = (uint32_t)RTC_TTS;
|
|
temp_dts = (uint32_t)RTC_DTS;
|
|
|
|
/* get timestamp time and construct the rtc_timestamp_struct structure */
|
|
rtc_timestamp->rtc_am_pm = (uint32_t)(temp_tts & RTC_TTS_PM);
|
|
rtc_timestamp->rtc_timestamp_month = (uint8_t)GET_DTS_MON(temp_dts);
|
|
rtc_timestamp->rtc_timestamp_date = (uint8_t)GET_DTS_DAY(temp_dts);
|
|
rtc_timestamp->rtc_timestamp_day = (uint8_t)GET_DTS_DOW(temp_dts);
|
|
rtc_timestamp->rtc_timestamp_hour = (uint8_t)GET_TTS_HR(temp_tts);
|
|
rtc_timestamp->rtc_timestamp_minute = (uint8_t)GET_TTS_MN(temp_tts);
|
|
rtc_timestamp->rtc_timestamp_second = (uint8_t)GET_TTS_SC(temp_tts);
|
|
}
|
|
|
|
/*!
|
|
\brief get RTC time-stamp subsecond
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval RTC time-stamp subsecond value
|
|
*/
|
|
uint32_t rtc_timestamp_subsecond_get(void)
|
|
{
|
|
return ((uint32_t)RTC_SSTS);
|
|
}
|
|
|
|
/*!
|
|
\brief enable RTC tamper
|
|
\param[in] rtc_tamper: pointer to a rtc_tamper_struct structure which contains
|
|
parameters for RTC tamper configuration
|
|
members of the structure and the member values are shown as below:
|
|
rtc_tamper_source: RTC_TAMPER0, RTC_TAMPER1
|
|
rtc_tamper_trigger: RTC_TAMPER_TRIGGER_EDGE_RISING, RTC_TAMPER_TRIGGER_EDGE_FALLING
|
|
RTC_TAMPER_TRIGGER_LEVEL_LOW, RTC_TAMPER_TRIGGER_LEVEL_HIGH
|
|
rtc_tamper_filter: RTC_FLT_EDGE, RTC_FLT_2S, RTC_FLT_4S, RTC_FLT_8S
|
|
rtc_tamper_sample_frequency: RTC_FREQ_DIV32768, RTC_FREQ_DIV16384, RTC_FREQ_DIV8192,
|
|
RTC_FREQ_DIV4096, RTC_FREQ_DIV2048, RTC_FREQ_DIV1024,
|
|
RTC_FREQ_DIV512, RTC_FREQ_DIV256
|
|
rtc_tamper_precharge_enable: DISABLE, ENABLE
|
|
rtc_tamper_precharge_time: RTC_PRCH_1C, RTC_PRCH_2C, RTC_PRCH_4C, RTC_PRCH_8C
|
|
rtc_tamper_with_timestamp: DISABLE, ENABLE
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_tamper_enable(rtc_tamper_struct* rtc_tamper)
|
|
{
|
|
/* disable tamper */
|
|
RTC_TAMP &= (uint32_t)~(rtc_tamper->rtc_tamper_source);
|
|
|
|
/* tamper filter must be used when the tamper source is voltage level detection */
|
|
RTC_TAMP &= (uint32_t)~RTC_TAMP_FLT;
|
|
|
|
/* the tamper source is voltage level detection */
|
|
if(rtc_tamper->rtc_tamper_filter != RTC_FLT_EDGE ){
|
|
RTC_TAMP &= (uint32_t)~(RTC_TAMP_DISPU | RTC_TAMP_PRCH | RTC_TAMP_FREQ | RTC_TAMP_FLT);
|
|
|
|
/* check if the tamper pin need precharge, if need, then configure the precharge time */
|
|
if(DISABLE == rtc_tamper->rtc_tamper_precharge_enable){
|
|
RTC_TAMP |= (uint32_t)RTC_TAMP_DISPU;
|
|
}else{
|
|
RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_precharge_time);
|
|
}
|
|
|
|
RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_sample_frequency);
|
|
RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_filter);
|
|
}
|
|
|
|
RTC_TAMP &= (uint32_t)~RTC_TAMP_TPTS;
|
|
|
|
if(DISABLE != rtc_tamper->rtc_tamper_with_timestamp){
|
|
/* the tamper event also cause a time-stamp event */
|
|
RTC_TAMP |= (uint32_t)RTC_TAMP_TPTS;
|
|
}
|
|
|
|
/* configure the tamper trigger */
|
|
RTC_TAMP &= ((uint32_t)~((rtc_tamper->rtc_tamper_source) << RTC_TAMPER_TRIGGER_POS));
|
|
if(RTC_TAMPER_TRIGGER_EDGE_RISING != rtc_tamper->rtc_tamper_trigger){
|
|
RTC_TAMP |= (uint32_t)((rtc_tamper->rtc_tamper_source)<< RTC_TAMPER_TRIGGER_POS);
|
|
}
|
|
/* enable tamper */
|
|
RTC_TAMP |= (uint32_t)(rtc_tamper->rtc_tamper_source);
|
|
}
|
|
|
|
/*!
|
|
\brief disable RTC tamper
|
|
\param[in] source: specify which tamper source to be disabled
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_TAMPER0
|
|
\arg RTC_TAMPER1
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_tamper_disable(uint32_t source)
|
|
{
|
|
/* disable tamper */
|
|
RTC_TAMP &= (uint32_t)~source;
|
|
|
|
}
|
|
|
|
/*!
|
|
\brief enable specified RTC interrupt
|
|
\param[in] interrupt: specify which interrupt source to be enabled
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_INT_TIMESTAMP: timestamp interrupt
|
|
\arg RTC_INT_ALARM: alarm interrupt
|
|
\arg RTC_INT_TAMP: tamp interrupt
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_interrupt_enable(uint32_t interrupt)
|
|
{
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
/* enable the interrupts in RTC_CTL register */
|
|
RTC_CTL |= (uint32_t)(interrupt & (uint32_t)~RTC_TAMP_TPIE);
|
|
/* enable the interrupts in RTC_TAMP register */
|
|
RTC_TAMP |= (uint32_t)(interrupt & RTC_TAMP_TPIE);
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
/*!
|
|
\brief disble specified RTC interrupt
|
|
\param[in] interrupt: specify which interrupt source to be disabled
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_INT_TIMESTAMP: timestamp interrupt
|
|
\arg RTC_INT_ALARM: alarm interrupt
|
|
\arg RTC_INT_TAMP: tamp interrupt
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_interrupt_disable(uint32_t interrupt)
|
|
{
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
/* disable the interrupts in RTC_CTL register */
|
|
RTC_CTL &= (uint32_t)~(interrupt & (uint32_t)~RTC_TAMP_TPIE);
|
|
/* disable the interrupts in RTC_TAMP register */
|
|
RTC_TAMP &= (uint32_t)~(interrupt & RTC_TAMP_TPIE);
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
/*!
|
|
\brief check specified flag
|
|
\param[in] flag: specify which flag to check
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_FLAG_RECALIBRATION: recalibration pending flag
|
|
\arg RTC_FLAG_TAMP1: tamper 1 event flag
|
|
\arg RTC_FLAG_TAMP0: tamper 0 event flag
|
|
\arg RTC_FLAG_TIMESTAMP_OVERFLOW: time-stamp overflow event flag
|
|
\arg RTC_FLAG_TIMESTAMP: time-stamp event flag
|
|
\arg RTC_FLAG_ALARM0: alarm event flag
|
|
\arg RTC_FLAG_INIT: init mode event flag
|
|
\arg RTC_FLAG_RSYN: time and date registers synchronized event flag
|
|
\arg RTC_FLAG_YCM: year parameter configured event flag
|
|
\arg RTC_FLAG_SHIFT: shift operation pending flag
|
|
\arg RTC_FLAG_ALARM0_WRITTEN: alarm writen available flag
|
|
\param[out] none
|
|
\retval FlagStatus: SET or RESET
|
|
*/
|
|
FlagStatus rtc_flag_get(uint32_t flag)
|
|
{
|
|
FlagStatus flag_state = RESET;
|
|
|
|
if(RESET != (RTC_STAT & flag)){
|
|
flag_state = SET;
|
|
}
|
|
return flag_state;
|
|
}
|
|
|
|
/*!
|
|
\brief clear specified flag
|
|
\param[in] flag: specify which flag to clear
|
|
\arg RTC_FLAG_TAMP1: tamper 1 event flag
|
|
\arg RTC_FLAG_TAMP0: tamper 0 event flag
|
|
\arg RTC_FLAG_TIMESTAMP_OVERFLOW: time-stamp overflow event flag
|
|
\arg RTC_FLAG_TIMESTAMP: time-stamp event flag
|
|
\arg RTC_FLAG_ALARM0: alarm event flag
|
|
\arg RTC_FLAG_RSYN: time and date registers synchronized event flag
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_flag_clear(uint32_t flag)
|
|
{
|
|
RTC_STAT &= (uint32_t)(~flag);
|
|
}
|
|
|
|
/*!
|
|
\brief configure rtc alternate output source
|
|
\param[in] source: specify signal to output
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_CALIBRATION_512HZ: when the LSE freqency is 32768Hz and the RTC_PSC
|
|
is the default value, output 512Hz signal
|
|
\arg RTC_CALIBRATION_1HZ: when the LSE freqency is 32768Hz and the RTC_PSC
|
|
is the default value, output 1Hz signal
|
|
\arg RTC_ALARM_HIGH: when the alarm flag is set, the output pin is high
|
|
\arg RTC_ALARM_LOW: when the Alarm flag is set, the output pin is low
|
|
\param[in] mode: specify the output pin (PC13) mode when output alarm signal
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_ALARM_OUTPUT_OD: open drain mode
|
|
\arg RTC_ALARM_OUTPUT_PP: push pull mode
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_alter_output_config(uint32_t source, uint32_t mode)
|
|
{
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
RTC_CTL &= (uint32_t)~(RTC_CTL_COEN | RTC_CTL_OS | RTC_CTL_OPOL | RTC_CTL_COS);
|
|
|
|
RTC_CTL |= (uint32_t)(source);
|
|
|
|
/* alarm output */
|
|
if(RESET != (source & RTC_OS_ENABLE)){
|
|
RTC_TAMP &= (uint32_t)~(RTC_TAMP_PC13VAL);
|
|
RTC_TAMP |= (uint32_t)(mode);
|
|
}
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
|
|
/*!
|
|
\brief configure RTC calibration register
|
|
\param[in] window: select calibration window
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_CALIBRATION_WINDOW_32S: 2exp20 RTCCLK cycles, 32s if RTCCLK = 32768 Hz
|
|
\arg RTC_CALIBRATION_WINDOW_16S: 2exp19 RTCCLK cycles, 16s if RTCCLK = 32768 Hz
|
|
\arg RTC_CALIBRATION_WINDOW_8S: 2exp18 RTCCLK cycles, 8s if RTCCLK = 32768 Hz
|
|
\param[in] plus: add RTC clock or not
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_CALIBRATION_PLUS_SET: add one RTC clock every 2048 rtc clock
|
|
\arg RTC_CALIBRATION_PLUS_RESET: no effect
|
|
\param[in] minus: the RTC clock to minus during the calibration window(0x0 - 0x1FF)
|
|
\param[out] none
|
|
\retval ErrStatus: ERROR or SUCCESS
|
|
*/
|
|
ErrStatus rtc_calibration_config(uint32_t window, uint32_t plus, uint32_t minus)
|
|
{
|
|
uint32_t time_index = RTC_HRFC_TIMEOUT;
|
|
ErrStatus error_status = ERROR;
|
|
uint32_t flag_status = RESET;
|
|
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
/* check if a calibration operation is ongoing */
|
|
do{
|
|
flag_status = RTC_STAT & RTC_STAT_SCPF;
|
|
}while((--time_index > 0x00U) && (RESET != flag_status));
|
|
|
|
if(RESET == flag_status){
|
|
RTC_HRFC = (uint32_t)(window | plus | HRFC_CMSK(minus));
|
|
error_status = SUCCESS;
|
|
}
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
|
|
return error_status;
|
|
}
|
|
|
|
/*!
|
|
\brief ajust the daylight saving time by adding or substracting one hour from the current time
|
|
\param[in] operation: hour ajustment operation
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_CTL_A1H: add one hour
|
|
\arg RTC_CTL_S1H: substract one hour
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_hour_adjust(uint32_t operation)
|
|
{
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
RTC_CTL |= (uint32_t)(operation);
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
/*!
|
|
\brief ajust RTC second or subsecond value of current time
|
|
\param[in] add: add 1s to current time or not
|
|
only one parameter can be selected which is shown as below:
|
|
\arg RTC_SHIFT_ADD1S_RESET: no effect
|
|
\arg RTC_SHIFT_ADD1S_SET: add 1s to current time
|
|
\param[in] minus: number of subsecond to minus from current time(0x0 - 0x7FFF)
|
|
\param[out] none
|
|
\retval ErrStatus: ERROR or SUCCESS
|
|
*/
|
|
ErrStatus rtc_second_adjust(uint32_t add, uint32_t minus)
|
|
{
|
|
uint32_t time_index = RTC_SHIFTCTL_TIMEOUT;
|
|
ErrStatus error_status = ERROR;
|
|
uint32_t flag_status = RESET;
|
|
uint32_t temp=0U;
|
|
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
/* check if a shift operation is ongoing */
|
|
do{
|
|
flag_status = RTC_STAT & RTC_STAT_SOPF;
|
|
}while((--time_index > 0x00U) && (RESET != flag_status));
|
|
|
|
temp = RTC_CTL & RTC_CTL_REFEN;
|
|
/* check if the function of reference clock detection is disabled */
|
|
if((RESET == flag_status) && (RESET == temp)){
|
|
RTC_SHIFTCTL = (uint32_t)(add | SHIFTCTL_SFS(minus));
|
|
error_status = rtc_register_sync_wait();
|
|
}
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
|
|
return error_status;
|
|
}
|
|
|
|
/*!
|
|
\brief enable RTC bypass shadow registers function
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_bypass_shadow_enable(void)
|
|
{
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
RTC_CTL |= (uint8_t)RTC_CTL_BPSHAD;
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
/*!
|
|
\brief disable RTC bypass shadow registers function
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval none
|
|
*/
|
|
void rtc_bypass_shadow_disable(void)
|
|
{
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
RTC_CTL &= (uint8_t)~RTC_CTL_BPSHAD;
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
}
|
|
|
|
/*!
|
|
\brief enable RTC reference clock detection function
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval ErrStatus: ERROR or SUCCESS
|
|
*/
|
|
ErrStatus rtc_refclock_detection_enable(void)
|
|
{
|
|
ErrStatus error_status = ERROR;
|
|
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
/* enter init mode */
|
|
error_status = rtc_init_mode_enter();
|
|
|
|
if(ERROR != error_status){
|
|
RTC_CTL |= (uint32_t)RTC_CTL_REFEN;
|
|
/* exit init mode */
|
|
rtc_init_mode_exit();
|
|
}
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
|
|
return error_status;
|
|
}
|
|
|
|
/*!
|
|
\brief disable RTC reference clock detection function
|
|
\param[in] none
|
|
\param[out] none
|
|
\retval ErrStatus: ERROR or SUCCESS
|
|
*/
|
|
ErrStatus rtc_refclock_detection_disable(void)
|
|
{
|
|
ErrStatus error_status = ERROR;
|
|
|
|
/* disable the write protection */
|
|
RTC_WPK = RTC_UNLOCK_KEY1;
|
|
RTC_WPK = RTC_UNLOCK_KEY2;
|
|
|
|
/* enter init mode */
|
|
error_status = rtc_init_mode_enter();
|
|
|
|
if(ERROR != error_status){
|
|
RTC_CTL &= (uint32_t)~RTC_CTL_REFEN;
|
|
/* exit init mode */
|
|
rtc_init_mode_exit();
|
|
}
|
|
|
|
/* enable the write protection */
|
|
RTC_WPK = RTC_LOCK_KEY;
|
|
|
|
return error_status;
|
|
}
|
|
|
|
|