417 lines
9.9 KiB
C
417 lines
9.9 KiB
C
/*
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* This file is part of FH8620 BSP for RT-Thread distribution.
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*
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* Copyright (c) 2016 Shanghai Fullhan Microelectronics Co., Ltd.
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* All rights reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* Visit http://www.fullhan.com to get contact with Fullhan.
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*
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* Change Logs:
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* Date Author Notes
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*/
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#include "sadc.h"
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#ifdef RT_USING_SADC
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#include "inc/fh_driverlib.h"
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#include "board_info.h"
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#include <rtdef.h>
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//#define FH_SADC_DEBUG
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//#define FH_TEST_SADC
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#ifdef FH_SADC_DEBUG
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#define PRINT_SADC_DBG(fmt, args...) \
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do \
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{ \
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rt_kprintf("FH_SADC_DEBUG: "); \
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rt_kprintf(fmt, ## args); \
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} \
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while(0)
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#else
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#define PRINT_SADC_DBG(fmt, args...) do { } while (0)
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#endif
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#define __raw_writeb(v,a) ( *(volatile unsigned char *)(a) = (v))
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#define __raw_writew(v,a) ( *(volatile unsigned short *)(a) = (v))
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#define __raw_writel(v,a) ( *(volatile unsigned int *)(a) = (v))
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#define __raw_readb(a) ( *(volatile unsigned char *)(a))
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#define __raw_readw(a) ( *(volatile unsigned short *)(a))
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#define __raw_readl(a) ( *(volatile unsigned int *)(a))
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#define wrap_readl(wrap, name) \
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__raw_readl(&(((struct wrap_sadc_reg *)wrap->regs)->name))
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#define wrap_writel(wrap, name, val) \
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__raw_writel((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
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#define wrap_readw(wrap, name) \
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__raw_readw(&(((struct wrap_sadc_reg *)wrap->regs)->name))
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#define wrap_writew(wrap, name, val) \
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__raw_writew((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
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#define wrap_readb(wrap, name) \
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__raw_readb(&(((struct wrap_sadc_reg *)wrap->regs)->name))
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#define wrap_writeb(wrap, name, val) \
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__raw_writeb((val), &(((struct wrap_sadc_reg *)wrap->regs)->name))
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#define IOCTL_GET_SADC_DATA 1
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#define IOCTL_SADC_POWER_DOWN 0xff
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#define SADC_WRAP_BASE (0xf1200000)
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#define SADC_IRQn (23)
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#define SADC_MAX_CONTROLLER (1)
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#define SADC_STATUS_COLESD (0)
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#define SADC_STATUS_OPEN (1)
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rt_err_t fh_sadc_isr_read_data(struct wrap_sadc_obj *sadc, rt_uint32_t channel,
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rt_uint16_t *buf) {
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rt_uint32_t xainsel = 1 << channel;
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rt_uint32_t xversel = 0;
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rt_uint32_t xpwdb = 1;
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//cnt
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rt_uint32_t sel2sam_pre_cnt = 2;
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rt_uint32_t sam_cnt = 2;
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rt_uint32_t sam2sel_pos_cnt = 2;
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//time out
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rt_uint32_t eoc_tos = 0xff;
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rt_uint32_t eoc_toe = 0xff;
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rt_uint32_t time_out = 0xffff;
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//set isr en..
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rt_uint32_t sadc_isr = 0x01;
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//start
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rt_uint32_t sadc_cmd = 0x01;
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//get data
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rt_uint32_t temp_data = 0;
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rt_err_t ret;
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//control...
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wrap_writel(sadc, sadc_control, xainsel | (xversel << 8) | (xpwdb << 12));
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wrap_writel(sadc, sadc_cnt,
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sel2sam_pre_cnt | (sam_cnt << 8) | (sam2sel_pos_cnt << 16));
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wrap_writel(sadc, sadc_timeout,
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eoc_tos | (eoc_toe << 8) | (time_out << 16));
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wrap_writel(sadc, sadc_ier, sadc_isr);
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wrap_writel(sadc, sadc_cmd, sadc_cmd);
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// ret = rt_completion_wait(&sadc->completion, RT_TICK_PER_SECOND / 2);
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ret = rt_sem_take(&sadc->completion, 5000);
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if(ret != RT_EOK)
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return ret;
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switch (channel) {
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case 0:
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case 1:
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//read channel 0 1
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temp_data = wrap_readl(sadc, sadc_dout0);
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break;
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case 2:
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case 3:
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//read channel 2 3
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temp_data = wrap_readl(sadc, sadc_dout1);
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break;
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case 4:
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case 5:
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//read channel 4 5
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temp_data = wrap_readl(sadc, sadc_dout2);
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break;
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case 6:
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case 7:
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//read channel 6 7
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temp_data = wrap_readl(sadc, sadc_dout3);
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break;
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default:
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break;
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}
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if (channel % 2) {
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//read low 16bit
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*buf = (rt_uint16_t) (temp_data & 0xffff);
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} else {
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//read high 16bit
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*buf = (rt_uint16_t) (temp_data >> 16);
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}
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return RT_EOK;
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}
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static rt_err_t fh_sadc_init(rt_device_t dev)
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{
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// struct fh_pwm_obj *pwm_obj = (struct fh_pwm_obj *)pwm_drv.priv;
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PRINT_SADC_DBG("%s\n",__func__);
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struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data;
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return RT_EOK;
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}
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static rt_err_t fh_sadc_open(rt_device_t dev, rt_uint16_t oflag)
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{
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// struct fh_pwm_obj *pwm_obj = (struct fh_pwm_obj *)pwm_drv.priv;
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PRINT_SADC_DBG("%s\n",__func__);
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struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data;
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return RT_EOK;
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}
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static rt_err_t fh_sadc_close(rt_device_t dev)
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{
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PRINT_SADC_DBG("%s\n",__func__);
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struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data;
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return RT_EOK;
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}
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static rt_err_t fh_sadc_ioctl(rt_device_t dev, int cmd, void *arg)
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{
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rt_uint32_t control_reg;
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struct wrap_sadc_obj *sadc_pri =(struct wrap_sadc_obj *)dev->user_data;
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rt_uint32_t ad_data;
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rt_uint16_t ad_raw_data;
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SADC_INFO *sadc_info = (SADC_INFO *)arg;
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rt_err_t ret;
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switch(cmd){
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case SADC_CMD_READ_RAW_DATA:
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ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
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if(ret != RT_EOK)
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return ret;
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sadc_info->sadc_data = ad_raw_data;
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break;
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case SADC_CMD_READ_VOLT:
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ret = fh_sadc_isr_read_data(sadc_pri, sadc_info->channel, &ad_raw_data);
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if(ret != RT_EOK)
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return ret;
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ad_data = ad_raw_data * SADC_REF;
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ad_data /= SADC_MAX_AD_VALUE;
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sadc_info->sadc_data = ad_data;
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break;
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case SADC_CMD_DISABLE:
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control_reg = wrap_readl(sadc_pri, sadc_control);
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control_reg &= ~(1 << 12);
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wrap_writel(sadc_pri, sadc_control, control_reg);
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break;
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default :
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rt_kprintf("wrong para...\n");
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return RT_EIO;
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}
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return RT_EOK;
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}
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static void fh_sadc_interrupt(int irq, void *param)
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{
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rt_uint32_t isr_status;
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struct wrap_sadc_obj *sadc = (struct wrap_sadc_obj *) param;
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isr_status = wrap_readl(sadc, sadc_int_status);
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if (isr_status & 0x01) {
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//close isr
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rt_uint32_t sadc_isr = 0x00;
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wrap_writel(sadc, sadc_ier, sadc_isr);
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//clear status..
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wrap_writel(sadc, sadc_int_status, isr_status);
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rt_sem_release(&sadc->completion);
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// rt_completion_done(&sadc->completion);
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} else {
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//add error handle process
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rt_kprintf("sadc maybe error!\n");
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}
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}
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int fh_sadc_probe(void *priv_data)
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{
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int ret;
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rt_device_t sadc_dev;
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//check if the hw is init already...
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//caution this is a read only data...if the driver want to use.malloc and copy it..
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struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data;
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if(sadc_obj->init_flag == SADC_INIT_ALREADY)
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return RT_EFULL;
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//malloc a rt device..
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sadc_dev = RT_KERNEL_MALLOC(sizeof(struct rt_device));
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if(!sadc_dev){
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return RT_ENOMEM;
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}
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rt_memset(sadc_dev, 0, sizeof(struct rt_device));
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PRINT_SADC_DBG("id:%d,\treg:%x,\tirq:%d\n",sadc_obj->id,(rt_uint32_t)sadc_obj->regs,sadc_obj->irq_no);
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//bind rtdev to obj data...
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//caution ...this is used to free mem when exit....
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//free step:1:get sadc obj...2:free sadc_obj->rt_dev->user_data..3:free sadc_obj->rt_dev 4:sadc_obj->rt_dev = NULL
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sadc_obj->rt_dev = sadc_dev;
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//malloc a private data sadc use only...copy data from platform...
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struct wrap_sadc_obj *sadc_pri = RT_KERNEL_MALLOC(sizeof(struct wrap_sadc_obj));
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if(!sadc_pri){
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RT_KERNEL_FREE(sadc_dev);
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return RT_ENOMEM;
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}
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//copy platform data to pri data..
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rt_memcpy(sadc_pri,sadc_obj,sizeof(struct wrap_sadc_obj));
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PRINT_SADC_DBG("pri....id:%d,\treg:%x,\tirq:%d\n",sadc_pri->id,(rt_uint32_t)sadc_pri->regs,sadc_pri->irq_no);
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//init sem
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//rt_completion_init(&sadc_obj->completion);
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rt_sem_init(&sadc_pri->completion, "sadc_sem", 0, RT_IPC_FLAG_FIFO);
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//init lock
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rt_mutex_init(&sadc_pri->lock,"sadc_lock", RT_IPC_FLAG_FIFO);
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//bind pri data to rt_sadc_dev...
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sadc_dev->user_data = (void *)sadc_pri;
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sadc_dev->open =fh_sadc_open;
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sadc_dev->close = fh_sadc_close;
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sadc_dev->control = fh_sadc_ioctl;
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sadc_dev->init = fh_sadc_init;
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if(sadc_pri->id ==0){
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rt_hw_interrupt_install(sadc_pri->irq_no, fh_sadc_interrupt,
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(void *)sadc_pri, "sadc_isr_0");
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}
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rt_hw_interrupt_umask(sadc_pri->irq_no);
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rt_device_register(sadc_dev, "sadc", RT_DEVICE_FLAG_RDWR);
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sadc_obj->init_flag = SADC_INIT_ALREADY;
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return RT_EOK;
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}
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int fh_sadc_exit(void *priv_data)
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{
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PRINT_SADC_DBG("%s\n",__func__);
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struct wrap_sadc_obj *sadc_obj = (struct wrap_sadc_obj *)priv_data;
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struct wrap_sadc_obj *sadc_pri = sadc_obj->rt_dev->user_data;
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//release sem;
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rt_sem_detach(&sadc_pri->completion);
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//sadc_pri->completion = RT_NULL;
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//release lock;
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rt_mutex_detach(&sadc_pri->lock);
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RT_KERNEL_FREE(sadc_obj->rt_dev->user_data);
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sadc_obj->rt_dev->user_data = RT_NULL;
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RT_KERNEL_FREE(sadc_obj->rt_dev);
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sadc_obj->rt_dev = RT_NULL;
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return 0;
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}
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struct fh_board_ops sdac_driver_ops =
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{
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.probe = fh_sadc_probe,
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.exit = fh_sadc_exit,
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};
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void rt_hw_sadc_init(void)
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{
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int ret;
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fh_board_driver_register("sadc", &sdac_driver_ops);
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}
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#ifdef FH_TEST_SADC
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int fh_sadc_test(void){
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rt_device_t sadc_dev;
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SADC_INFO info;
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info.channel = 0;
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info.sadc_data = 0;
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sadc_dev = rt_device_find("sadc");
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if(!sadc_dev){
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rt_kprintf("cann't find the sadc dev\n");
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}
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sadc_dev->init(sadc_dev);
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sadc_dev->open(sadc_dev,0);
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while(1)
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{
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sadc_dev->control(sadc_dev,SADC_CMD_READ_VOLT,&info);
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rt_kprintf("channel:%d,volt:%dmv\n",info.channel,info.sadc_data);
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}
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return 0;
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}
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#endif
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#ifdef RT_USING_FINSH
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#include <finsh.h>
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#ifdef FH_TEST_SADC
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FINSH_FUNCTION_EXPORT(fh_sadc_test, fh_sadc_test);
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#endif
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#endif
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#endif
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