172 lines
5.8 KiB
C
172 lines
5.8 KiB
C
/******************************************************************************
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**
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** \file gd_dma.h
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**
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** \brief DEMO test application.
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**
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** (C) Goke Microelectronics China 2002 - 2007
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**
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** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
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** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
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** OMMISSIONS.
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**
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** \version \$Id: gd_timer.h,v 1.8 2007/01/04 15:13:22 mneuma Exp $
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**
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******************************************************************************/
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#ifndef _GD_DMA_H_
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#define _GD_DMA_H_
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#include <gtypes.h>
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#include <gmodids.h>
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//*****************************************************************************
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//*****************************************************************************
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//** Defines and Macros
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//*****************************************************************************
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//*****************************************************************************
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/****************************/
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/* DMA Channel Assignments */
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/****************************/
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#define DMA_CHAN_MAX_NUM 4
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#define DMA_CHAN_MAX_DESC 64 /* max descriptor per channel */
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#define DMA_BUFF_ADDR_ALIGN 8
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/* General DMA instance channel */
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#define DMA_CHAN_NULL 0
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#define DMA_CHAN_I2S_RX 1
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#define DMA_CHAN_I2S_TX 2
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#define DMA_CHAN_AUDIO_RX 1
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#define DMA_CHAN_AUDIO_TX 2
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#define DMA_CHAN_USB 3
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#define DMA_MODE_NORMAL 0
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#define DMA_MODE_DESCRIPTOR 1
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/* DMA_CHAN_CTRL_REG */
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#define DMA_CHAN_CTRL_EN 0x80000000
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#define DMA_CHAN_CTRL_D 0x40000000
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#define DMA_CHAN_CTRL_WM 0x20000000
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#define DMA_CHAN_CTRL_RM 0x10000000
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#define DMA_CHAN_CTRL_NI 0x08000000
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#define DMA_CHAN_CTRL_BLK_1024B 0x07000000
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#define DMA_CHAN_CTRL_BLK_512B 0x06000000
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#define DMA_CHAN_CTRL_BLK_256B 0x05000000
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#define DMA_CHAN_CTRL_BLK_128B 0x04000000
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#define DMA_CHAN_CTRL_BLK_64B 0x03000000
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#define DMA_CHAN_CTRL_BLK_32B 0x02000000
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#define DMA_CHAN_CTRL_BLK_16B 0x01000000
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#define DMA_CHAN_CTRL_BLK_8B 0x00000000
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#define DMA_CHAN_CTRL_TS_8B 0x00C00000
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#define DMA_CHAN_CTRL_TS_4B 0x00800000
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#define DMA_CHAN_CTRL_TS_2B 0x00400000
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#define DMA_CHAN_CTRL_TS_1B 0x00000000
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/* DMA descriptor bit fields */
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#define DMA_DESC_EOC 0x01000000
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#define DMA_DESC_WM 0x00800000
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#define DMA_DESC_RM 0x00400000
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#define DMA_DESC_NI 0x00200000
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#define DMA_DESC_TS_8B 0x00180000
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#define DMA_DESC_TS_4B 0x00100000
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#define DMA_DESC_TS_2B 0x00080000
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#define DMA_DESC_TS_1B 0x00000000
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#define DMA_DESC_BLK_1024B 0x00070000
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#define DMA_DESC_BLK_512B 0x00060000
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#define DMA_DESC_BLK_256B 0x00050000
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#define DMA_DESC_BLK_128B 0x00040000
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#define DMA_DESC_BLK_64B 0x00030000
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#define DMA_DESC_BLK_32B 0x00020000
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#define DMA_DESC_BLK_16B 0x00010000
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#define DMA_DESC_BLK_8B 0x00000000
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#define DMA_DESC_ID 0x00000004
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#define DMA_DESC_IE 0x00000002
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#define DMA_DESC_ST 0x00000001
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/* DMA_CHAN_STATE_REG */
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#define DMA_CHAN_STATE_DM 0x80000000
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#define DMA_CHAN_STATE_OE 0x40000000
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#define DMA_CHAN_STATE_DA 0x20000000
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#define DMA_CHAN_STATE_DD 0x10000000
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#define DMA_CHAN_STATE_OD 0x08000000
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#define DMA_CHAN_STATE_ME 0x04000000
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#define DMA_CHAN_STATE_BE 0x02000000
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#define DMA_CHAN_STATE_RWE 0x01000000
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#define DMA_CHAN_STATE_AE 0x00800000
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#define DMA_CHAN_STATE_DN 0x00400000
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//*****************************************************************************
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//*****************************************************************************
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//** Enumerated types
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//*****************************************************************************
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//*****************************************************************************
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//*****************************************************************************
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//*****************************************************************************
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//** Data Structures
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//*****************************************************************************
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//*****************************************************************************
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typedef void (*GD_DMA_NOTIFIER_F)(void);
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typedef struct dma_descriptor_s
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{
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U32 srcAddr; /* Source address */
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U32 dstAddr; /* Destination address */
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struct dma_descriptor_s *next; /* Pointing to next descriptor */
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U32 reportAddr; /* The physical address to store DMA hardware reporting status */
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U32 dataLength; /* Transfer byte count , max value = 2^22 */
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U32 descAttr; /* Descriptor 's attribute */
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}GD_DMA_DESCRIPTOR_S;
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typedef struct
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{
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U32 channel;
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U32 mode;
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GD_DMA_NOTIFIER_F intNotifier;
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}GD_DMA_OPEN_PARAM_S;
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//*****************************************************************************
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//*****************************************************************************
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//** Global Data
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//*****************************************************************************
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//*****************************************************************************
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//*****************************************************************************
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//*****************************************************************************
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//** API Functions
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//*****************************************************************************
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C" {
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#endif
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GERR GD_DMA_Init(void);
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GERR GD_DMA_Exit(void);
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GERR GD_DMA_Open(GD_DMA_OPEN_PARAM_S *openParam, GD_HANDLE *handle);
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GERR GD_DMA_Close(GD_HANDLE handle);
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GERR GD_DMA_AddDescriptor(GD_HANDLE handle, GD_DMA_DESCRIPTOR_S *descriptor);
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GERR GD_DMA_Start(GD_HANDLE handle, U32 desc);
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GERR GD_DMA_Stop(GD_HANDLE handle);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _GD_DMA_H_ */
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