348 lines
9.4 KiB
C
348 lines
9.4 KiB
C
/*
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* Copyright (c) 2021, WangHuachen
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*
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* SPDX-License-Identifier: MIT
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*
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* Change Logs:
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* Date Author Notes
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* 2021-5-10 WangHuachen the first version
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*/
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#include "board.h"
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#include <netif/ethernetif.h>
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#include "lwipopts.h"
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#include "lwip/opt.h"
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#include "drv_eth.h"
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#include "lwip/netif.h"
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#include "netif/xadapter.h"
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#include "netif/xemacpsif.h"
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#include "xparameters.h"
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#include "xemacps.h"
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#define DBG_TAG "drv.emac"
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#define DBG_LEVEL DBG_INFO
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#include <rtdbg.h>
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#define MAC_BASE_ADDR XPAR_PSU_ETHERNET_3_BASEADDR
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#define MAX_ADDR_LEN 6
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struct rt_zynqmp_eth
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{
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/* inherit from ethernet device */
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struct eth_device parent;
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/* interface address info, hw address */
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rt_uint8_t dev_addr[MAX_ADDR_LEN];
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struct xemac_s *xemac;
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};
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static struct rt_zynqmp_eth zynqmp_eth_device;
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extern XEmacPs_Config *mac_config;
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extern struct netif *NetIf;
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static void rt_hw_eth_isr(int irqno, void *param)
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{
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struct rt_zynqmp_eth *eth_dev = (struct rt_zynqmp_eth *)param;
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xemacpsif_s *xemacpsif = (xemacpsif_s *)eth_dev->xemac->state;
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XEmacPs_IntrHandler(&xemacpsif->emacps);
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}
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extern enum ethernet_link_status eth_link_status;
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extern u32_t phy_link_detect(XEmacPs *xemacp, u32_t phy_addr);
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extern u32_t phy_autoneg_status(XEmacPs *xemacp, u32_t phy_addr);
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extern u32_t phyaddrforemac;
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void rt_zynqmp_eth_link_detect(struct rt_zynqmp_eth *eth_dev)
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{
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u32_t link_speed, phy_link_status;
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struct xemac_s *xemac = eth_dev->xemac;
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xemacpsif_s *xemacs = (xemacpsif_s *)(xemac->state);
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XEmacPs *xemacp = &xemacs->emacps;
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if ((xemacp->IsReady != (u32)XIL_COMPONENT_IS_READY) ||
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(eth_link_status == ETH_LINK_UNDEFINED))
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return;
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phy_link_status = phy_link_detect(xemacp, phyaddrforemac);
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if ((eth_link_status == ETH_LINK_UP) && (!phy_link_status))
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eth_link_status = ETH_LINK_DOWN;
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switch (eth_link_status) {
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case ETH_LINK_UNDEFINED:
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case ETH_LINK_UP:
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return;
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case ETH_LINK_DOWN:
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eth_device_linkchange(&zynqmp_eth_device.parent, RT_FALSE);
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eth_link_status = ETH_LINK_NEGOTIATING;
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LOG_D("Ethernet Link down");
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break;
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case ETH_LINK_NEGOTIATING:
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if (phy_link_status &&
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phy_autoneg_status(xemacp, phyaddrforemac)) {
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/* Initiate Phy setup to get link speed */
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link_speed = phy_setup_emacps(xemacp,
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phyaddrforemac);
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XEmacPs_SetOperatingSpeed(xemacp, link_speed);
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eth_device_linkchange(&zynqmp_eth_device.parent, RT_TRUE);
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eth_link_status = ETH_LINK_UP;
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LOG_D("Ethernet Link up");
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}
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break;
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}
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}
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static void phy_monitor_thread(void *parameter)
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{
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struct rt_zynqmp_eth *eth_dev = (struct rt_zynqmp_eth *)parameter;
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while (1)
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{
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rt_zynqmp_eth_link_detect(eth_dev);
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rt_thread_delay(RT_TICK_PER_SECOND);
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}
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}
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static rt_err_t rt_zynqmp_eth_init(rt_device_t dev)
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{
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struct rt_zynqmp_eth *eth_dev = (struct rt_zynqmp_eth *)dev->user_data;
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struct netif *netif = eth_dev->parent.netif;
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struct xemac_s *xemac;
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xemacpsif_s *xemacpsif;
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u32 dmacrreg;
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s32_t status = XST_SUCCESS;
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struct xtopology_t *xtopologyp;
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if (eth_dev->xemac != RT_NULL)
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{
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LOG_W("rt_zynqmp_eth_init: device has been initialized");
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return -RT_ERROR;
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}
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NetIf = netif;
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xemacpsif = rt_malloc(sizeof *xemacpsif);
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if (xemacpsif == NULL)
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{
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LOG_E("rt_zynqmp_eth_init: out of memory");
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return -RT_ENOMEM;
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}
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xemac = rt_malloc(sizeof *xemac);
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if (xemac == NULL)
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{
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LOG_E("rt_zynqmp_eth_init: out of memory");
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return -RT_ENOMEM;
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}
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xemac->state = (void *)xemacpsif;
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xemac->topology_index = xtopology_find_index(MAC_BASE_ADDR);
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xemac->type = xemac_type_emacps;
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xemac->rt_eth_device = ð_dev->parent;
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xemacpsif->send_q = NULL;
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xemacpsif->recv_q = pq_create_queue();
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if (!xemacpsif->recv_q)
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return -RT_ENOMEM;
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eth_dev->xemac = xemac;
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/* obtain config of this emac */
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mac_config = (XEmacPs_Config *)xemacps_lookup_config(MAC_BASE_ADDR);
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status = XEmacPs_CfgInitialize(&xemacpsif->emacps, mac_config,
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mac_config->BaseAddress);
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if (status != XST_SUCCESS)
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{
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LOG_W("In %s:EmacPs Configuration Failed....", __func__);
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return -RT_ERROR;
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}
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/* initialize the mac */
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init_emacps(xemacpsif, netif);
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dmacrreg = XEmacPs_ReadReg(xemacpsif->emacps.Config.BaseAddress,
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XEMACPS_DMACR_OFFSET);
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dmacrreg = dmacrreg | (0x00000010);
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XEmacPs_WriteReg(xemacpsif->emacps.Config.BaseAddress,
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XEMACPS_DMACR_OFFSET, dmacrreg);
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setup_isr(xemac);
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init_dma(xemac);
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xtopologyp = &xtopology[xemac->topology_index];
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/*
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* Connect the device driver handler that will be called when an
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* interrupt for the device occurs, the handler defined above performs
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* the specific interrupt processing for the device.
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*/
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rt_hw_interrupt_install(xtopologyp->scugic_emac_intr, rt_hw_eth_isr, (void *)eth_dev, "eth");
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/*
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* Enable the interrupt for emacps.
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*/
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rt_hw_interrupt_umask(xtopologyp->scugic_emac_intr);
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start_emacps(xemacpsif);
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if (eth_link_status == ETH_LINK_UP)
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eth_device_linkchange(ð_dev->parent, RT_TRUE);
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rt_thread_t tid;
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tid = rt_thread_create("phylnk",
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phy_monitor_thread,
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eth_dev,
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1024,
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RT_THREAD_PRIORITY_MAX - 2,
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2);
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if (tid != RT_NULL)
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rt_thread_startup(tid);
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else
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return -RT_ERROR;
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return RT_EOK;
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}
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static rt_err_t rt_zynqmp_eth_open(rt_device_t dev, rt_uint16_t oflag)
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{
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LOG_D("emac open");
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return RT_EOK;
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}
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static rt_err_t rt_zynqmp_eth_close(rt_device_t dev)
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{
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LOG_D("emac close");
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return RT_EOK;
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}
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static rt_size_t rt_zynqmp_eth_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
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{
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LOG_D("emac read");
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rt_set_errno(-RT_ENOSYS);
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return 0;
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}
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static rt_size_t rt_zynqmp_eth_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
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{
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LOG_D("emac write");
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rt_set_errno(-RT_ENOSYS);
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return 0;
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}
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static rt_err_t rt_zynqmp_eth_control(rt_device_t dev, int cmd, void *args)
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{
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struct rt_zynqmp_eth *eth_dev = (struct rt_zynqmp_eth *)dev->user_data;
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switch (cmd)
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{
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case NIOCTL_GADDR:
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/* get mac address */
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if (args) rt_memcpy(args, eth_dev->dev_addr, 6);
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else return -RT_ERROR;
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break;
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default :
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break;
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}
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return RT_EOK;
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}
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extern err_t _unbuffered_low_level_output(xemacpsif_s *xemacpsif, struct pbuf *p);
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rt_err_t rt_zynqmp_eth_tx(rt_device_t dev, struct pbuf *p)
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{
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rt_base_t lev;
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rt_err_t err;
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XEmacPs_BdRing *txring;
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struct rt_zynqmp_eth *eth_dev = (struct rt_zynqmp_eth *)dev->user_data;
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struct xemac_s *xemac = eth_dev->xemac;
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xemacpsif_s *xemacpsif = (xemacpsif_s *)(xemac->state);
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lev = rt_hw_interrupt_disable();
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txring = &(XEmacPs_GetTxRing(&xemacpsif->emacps));
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process_sent_bds(xemacpsif, txring);
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if (is_tx_space_available(xemacpsif))
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{
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_unbuffered_low_level_output(xemacpsif, p);
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err = RT_EOK;
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}
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else
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{
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#if LINK_STATS
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lwip_stats.link.drop++;
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#endif
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LOG_D("pack dropped, no space");
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err = -RT_ENOMEM;
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}
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rt_hw_interrupt_enable(lev);
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return err;
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}
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struct pbuf *rt_zynqmp_eth_rx(rt_device_t dev)
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{
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rt_base_t lev;
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struct rt_zynqmp_eth *eth_dev = (struct rt_zynqmp_eth *)dev->user_data;
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struct xemac_s *xemac = eth_dev->xemac;
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xemacpsif_s *xemacpsif = (xemacpsif_s *)(xemac->state);
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struct pbuf *p;
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lev = rt_hw_interrupt_disable();
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/* see if there is data to process */
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if (pq_qlength(xemacpsif->recv_q) == 0)
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return NULL;
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/* return one packet from receive q */
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p = (struct pbuf *)pq_dequeue(xemacpsif->recv_q);
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rt_hw_interrupt_enable(lev);
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return p;
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}
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static int rt_hw_zynqmp_eth_init(void)
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{
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rt_err_t state = RT_EOK;
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zynqmp_eth_device.xemac = RT_NULL;
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zynqmp_eth_device.dev_addr[0] = 0x00;
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zynqmp_eth_device.dev_addr[1] = 0x0A;
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zynqmp_eth_device.dev_addr[2] = 0x35;
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zynqmp_eth_device.dev_addr[3] = 0x00;
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zynqmp_eth_device.dev_addr[4] = 0x01;
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zynqmp_eth_device.dev_addr[5] = 0x02;
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zynqmp_eth_device.parent.parent.init = rt_zynqmp_eth_init;
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zynqmp_eth_device.parent.parent.open = rt_zynqmp_eth_open;
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zynqmp_eth_device.parent.parent.close = rt_zynqmp_eth_close;
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zynqmp_eth_device.parent.parent.read = rt_zynqmp_eth_read;
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zynqmp_eth_device.parent.parent.write = rt_zynqmp_eth_write;
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zynqmp_eth_device.parent.parent.control = rt_zynqmp_eth_control;
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zynqmp_eth_device.parent.parent.user_data = &zynqmp_eth_device;
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zynqmp_eth_device.parent.eth_rx = rt_zynqmp_eth_rx;
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zynqmp_eth_device.parent.eth_tx = rt_zynqmp_eth_tx;
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/* register eth device */
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state = eth_device_init(&(zynqmp_eth_device.parent), "e0");
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if (RT_EOK == state)
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{
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LOG_D("emac device init success");
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}
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else
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{
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LOG_E("emac device init faild: %d", state);
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state = -RT_ERROR;
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return state;
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}
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return state;
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}
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INIT_DEVICE_EXPORT(rt_hw_zynqmp_eth_init);
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