148 lines
4.7 KiB
C
148 lines
4.7 KiB
C
/*
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* Copyright 2019-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef __FLEXSPI_NOR_BOOT_H__
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#define __FLEXSPI_NOR_BOOT_H__
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#include <stdint.h>
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#include "board.h"
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#include "fsl_common.h"
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/*! @name Driver version */
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/*@{*/
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/*! @brief XIP_DEVICE driver version 2.0.4. */
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#define FSL_XIP_DEVICE_DRIVER_VERSION (MAKE_VERSION(2, 0, 4))
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/*@}*/
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/*************************************
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* IVT Data
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*************************************/
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typedef struct _ivt_
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{
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/** @ref hdr with tag #HAB_TAG_IVT, length and HAB version fields
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* (see @ref data)
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*/
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uint32_t hdr;
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/** Absolute address of the first instruction to execute from the
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* image
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*/
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uint32_t entry;
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/** Reserved in this version of HAB: should be NULL. */
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uint32_t reserved1;
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/** Absolute address of the image DCD: may be NULL. */
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uint32_t dcd;
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/** Absolute address of the Boot Data: may be NULL, but not interpreted
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* any further by HAB
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*/
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uint32_t boot_data;
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/** Absolute address of the IVT.*/
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uint32_t self;
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/** Absolute address of the image CSF.*/
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uint32_t csf;
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/** Reserved in this version of HAB: should be zero. */
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uint32_t reserved2;
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} ivt;
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#define IVT_MAJOR_VERSION 0x4
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#define IVT_MAJOR_VERSION_SHIFT 0x4
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#define IVT_MAJOR_VERSION_MASK 0xF
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#define IVT_MINOR_VERSION 0x1
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#define IVT_MINOR_VERSION_SHIFT 0x0
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#define IVT_MINOR_VERSION_MASK 0xF
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#define IVT_VERSION(major, minor) \
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((((major)&IVT_MAJOR_VERSION_MASK) << IVT_MAJOR_VERSION_SHIFT) | \
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(((minor)&IVT_MINOR_VERSION_MASK) << IVT_MINOR_VERSION_SHIFT))
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/* IVT header */
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#define IVT_TAG_HEADER 0xD1 /**< Image Vector Table */
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#define IVT_SIZE 0x2000
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#define IVT_PAR IVT_VERSION(IVT_MAJOR_VERSION, IVT_MINOR_VERSION)
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#define IVT_HEADER (IVT_TAG_HEADER | (IVT_SIZE << 8) | (IVT_PAR << 24))
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/* Set resume entry */
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#if defined(__CC_ARM) || defined(__ARMCC_VERSION)
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extern uint32_t Reset_Handler[];
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#define IMAGE_ENTRY_ADDRESS ((uint32_t)Reset_Handler)
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#define BOOT_IMAGE_BASE ((uint32_t)FLASH_BASE)
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#define BOOT_IMAGE_SIZE ((uint32_t)FLASH_SIZE)
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#define BOOT_DATA_ADDRESS &boot_data
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#define IVT_ADDRESS &image_vector_table
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#define DCD_DATA_ADDRESS dcd_data
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#elif defined(__MCUXPRESSO)
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extern uint32_t ResetISR[];
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extern uint32_t __boot_hdr_start__[];
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extern uint32_t __boot_hdr_ivt_loadaddr__[];
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extern uint32_t __boot_hdr_boot_data_loadaddr__[];
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extern uint32_t __boot_hdr_dcd_loadaddr__[];
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extern uint32_t _boot_loadaddr[];
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extern uint32_t _boot_size[];
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#define IMAGE_ENTRY_ADDRESS ((uint32_t)ResetISR)
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#define BOOT_IMAGE_BASE ((uint32_t)_boot_loadaddr)
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#define BOOT_IMAGE_SIZE ((uint32_t)_boot_size)
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#define BOOT_DATA_ADDRESS ((uint32_t)__boot_hdr_boot_data_loadaddr__)
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#define IVT_ADDRESS ((uint32_t)__boot_hdr_ivt_loadaddr__)
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#define DCD_DATA_ADDRESS ((uint32_t)__boot_hdr_dcd_loadaddr__)
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#elif defined(__ICCARM__)
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extern uint32_t Reset_Handler[];
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#define IMAGE_ENTRY_ADDRESS ((uint32_t)Reset_Handler)
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#define BOOT_IMAGE_BASE ((uint32_t)FLASH_BASE)
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#define BOOT_IMAGE_SIZE ((uint32_t)FLASH_SIZE)
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#define BOOT_DATA_ADDRESS &boot_data
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#define IVT_ADDRESS &image_vector_table
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#define DCD_DATA_ADDRESS dcd_data
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#elif defined(__GNUC__)
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extern uint32_t Reset_Handler[];
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#define IMAGE_ENTRY_ADDRESS ((uint32_t)Reset_Handler)
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#define BOOT_IMAGE_BASE ((uint32_t)FLASH_BASE)
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#define BOOT_IMAGE_SIZE ((uint32_t)FLASH_SIZE)
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#define BOOT_DATA_ADDRESS &boot_data
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#define IVT_ADDRESS &image_vector_table
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#define DCD_DATA_ADDRESS dcd_data
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#endif
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#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
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#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (1 == XIP_BOOT_HEADER_DCD_ENABLE)
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#define DCD_ADDRESS DCD_DATA_ADDRESS
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#else
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#define DCD_ADDRESS 0
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#endif
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#endif
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#define CSF_ADDRESS 0
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#define IVT_RSVD (uint32_t)(0x00000000)
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/*************************************
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* Boot Data
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*************************************/
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typedef struct _boot_data_
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{
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uint32_t start; /* boot start location */
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uint32_t size; /* size */
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uint32_t plugin; /* plugin flag - 1 if downloaded application is plugin */
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uint32_t placeholder; /* placehoder to make even 0x10 size */
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} BOOT_DATA_T;
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#if __CORTEX_M == 7
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#define FLASH_BASE FlexSPI1_AMBA_BASE
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#elif __CORTEX_M == 4
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#define FLASH_BASE FlexSPI1_ALIAS_BASE
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#endif
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#if defined(BOARD_FLASH_SIZE)
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#define FLASH_SIZE BOARD_FLASH_SIZE
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#else
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#error "Please define macro BOARD_FLASH_SIZE"
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#endif
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#define PLUGIN_FLAG (uint32_t)0
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/* External Variables */
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const BOOT_DATA_T boot_data;
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#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (1 == XIP_BOOT_HEADER_DCD_ENABLE)
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extern const uint8_t dcd_data[];
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#endif
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#endif /* __FLEXSPI_NOR_BOOT_H__ */
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