580 lines
15 KiB
C
580 lines
15 KiB
C
/**
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* @file flc.h
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* @brief Flash Controler driver.
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* @details This driver can be used to operate on the embedded flash memory.
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*/
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/* ****************************************************************************
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* Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
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* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Except as contained in this notice, the name of Maxim Integrated
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* Products, Inc. shall not be used except as stated in the Maxim Integrated
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* Products, Inc. Branding Policy.
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*
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* The mere transfer of this software does not imply any licenses
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* of trade secrets, proprietary technology, copyrights, patents,
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* trademarks, maskwork rights, or any other form of intellectual
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* property whatsoever. Maxim Integrated Products, Inc. retains all
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* ownership rights.
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*
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* $Date: 2019-06-05 16:53:29 -0500 (Wed, 05 Jun 2019) $
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* $Revision: 43696 $
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*
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*************************************************************************** */
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/* **** Includes **** */
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#include <string.h>
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#include "mxc_config.h"
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#include "mxc_sys.h"
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#include "flc.h"
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#include "flc_regs.h"
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/* **** Definitions **** */
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/* **** Globals **** */
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/* **** Functions **** */
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// *****************************************************************************
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#if defined (__ICCARM__)
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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static int prepare_flc(void)
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{
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// Set flash clock divider to generate a 1MHz clock from the APB clock
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MXC_FLC->clkdiv = SystemCoreClock / 1000000;
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/* Check if the flash controller is busy */
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if (FLC_Busy()) {
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return E_BUSY;
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}
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/* Clear stale errors */
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if (MXC_FLC->intr & MXC_F_FLC_INTR_AF) {
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MXC_FLC->intr &= ~MXC_F_FLC_INTR_AF;
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}
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/* Unlock flash */
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MXC_FLC->cn = (MXC_FLC->cn & ~MXC_F_FLC_CN_UNLOCK) | MXC_S_FLC_CN_UNLOCK_UNLOCKED;
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return E_NO_ERROR;
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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// IAR memory section declaration for the in-system flash programming functions to be loaded in RAM.
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_Init(const sys_cfg_flc_t *sys_cfg)
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{
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SYS_FLC_Init(sys_cfg);
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return E_NO_ERROR;
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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// IAR memory section declaration for the in-system flash programming functions to be loaded in RAM.
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_Busy(void)
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{
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return (MXC_FLC->cn & (MXC_F_FLC_CN_WR | MXC_F_FLC_CN_ME | MXC_F_FLC_CN_PGE));
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_MassErase(void)
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{
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int err;
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if ((err = prepare_flc()) != E_NO_ERROR)
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return err;
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/* Write mass erase code */
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MXC_FLC->cn = (MXC_FLC->cn & ~MXC_F_FLC_CN_ERASE_CODE) | MXC_S_FLC_CN_ERASE_CODE_ERASEALL;
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/* Issue mass erase command */
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MXC_FLC->cn |= MXC_F_FLC_CN_ME;
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/* Wait until flash operation is complete */
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while (FLC_Busy());
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/* Lock flash */
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MXC_FLC->cn &= ~MXC_F_FLC_CN_UNLOCK;
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/* Check access violations */
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if (MXC_FLC->intr & MXC_F_FLC_INTR_AF) {
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MXC_FLC->intr &= ~MXC_F_FLC_INTR_AF;
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return E_BAD_STATE;
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}
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SYS_Flash_Operation();
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return E_NO_ERROR;
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_PageErase(uint32_t address)
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{
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int err;
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if ((err = prepare_flc()) != E_NO_ERROR)
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return err;
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// Align address on page boundary
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address = address - (address % MXC_FLASH_PAGE_SIZE);
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/* Write page erase code */
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MXC_FLC->cn = (MXC_FLC->cn & ~MXC_F_FLC_CN_ERASE_CODE) | MXC_S_FLC_CN_ERASE_CODE_ERASEPAGE;
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/* Issue page erase command */
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MXC_FLC->addr = address;
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MXC_FLC->cn |= MXC_F_FLC_CN_PGE;
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/* Wait until flash operation is complete */
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while (FLC_Busy());
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/* Lock flash */
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MXC_FLC->cn &= ~MXC_F_FLC_CN_UNLOCK;
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/* Check access violations */
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if (MXC_FLC->intr & MXC_F_FLC_INTR_AF) {
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MXC_FLC->intr &= ~MXC_F_FLC_INTR_AF;
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return E_BAD_STATE;
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}
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SYS_Flash_Operation();
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return E_NO_ERROR;
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_Erase(uint32_t start, uint32_t end)
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{
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int retval;
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uint32_t addr;
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// Align start and end on page boundaries
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start = start - (start % MXC_FLASH_PAGE_SIZE);
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end = end - (end % MXC_FLASH_PAGE_SIZE);
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for (addr = start; addr <= end; addr += MXC_FLASH_PAGE_SIZE) {
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retval = FLC_PageErase(addr);
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if (retval != E_NO_ERROR) {
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return retval;
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}
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}
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return E_NO_ERROR;
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_BufferErase(uint32_t start, uint32_t end, uint8_t *buffer, unsigned length)
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{
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int retval;
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uint32_t start_align, start_len, end_align, end_len;
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// Align start and end on page boundaries, calculate length of data to buffer
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start_align = start - (start % MXC_FLASH_PAGE_SIZE);
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start_len = (start % MXC_FLASH_PAGE_SIZE);
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end_align = end - (end % MXC_FLASH_PAGE_SIZE);
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end_len = ((MXC_FLASH_PAGE_SIZE - (end % MXC_FLASH_PAGE_SIZE)) % MXC_FLASH_PAGE_SIZE);
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// Make sure the length of buffer is sufficient
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if ((length < start_len) || (length < end_len)) {
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return E_BAD_PARAM;
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}
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// Start and end address are in the same page
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if (start_align == end_align) {
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if (length < (start_len + end_len)) {
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return E_BAD_PARAM;
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}
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// Buffer first page data and last page data, erase and write
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memcpy(buffer, (void*)start_align, start_len);
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memcpy(&buffer[start_len], (void*)end, end_len);
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retval = FLC_PageErase(start_align);
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if (retval != E_NO_ERROR) {
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return retval;
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}
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retval = FLC_Write(start_align, start_len, buffer);
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if (retval != E_NO_ERROR) {
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return retval;
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}
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retval = FLC_Write(end, end_len, &buffer[start_len]);
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if (retval != E_NO_ERROR) {
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return retval;
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}
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return E_NO_ERROR;
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}
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// Buffer, erase, and write the data in the first page
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memcpy(buffer, (void*)start_align, start_len);
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retval = FLC_PageErase(start_align);
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if (retval != E_NO_ERROR) {
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return retval;
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}
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retval = FLC_Write(start_align, start_len, buffer);
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if (retval != E_NO_ERROR) {
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return retval;
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}
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// Buffer, erase, and write the data in the last page
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memcpy(buffer, (void*)end, end_len);
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retval = FLC_PageErase(end_align);
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if (retval != E_NO_ERROR) {
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return retval;
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}
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retval = FLC_Write(end, end_len, buffer);
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if (retval != E_NO_ERROR) {
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return retval;
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}
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// Erase the remaining pages
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if (start_align != end_align) {
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return FLC_Erase((start_align + MXC_FLASH_PAGE_SIZE), (end_align - MXC_FLASH_PAGE_SIZE));
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}
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return E_NO_ERROR;
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_Write32(uint32_t address, uint32_t data)
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{
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int err;
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// Address checked if it is byte addressable
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if (address & 0x3) {
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return E_BAD_PARAM;
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}
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if ((err = prepare_flc()) != E_NO_ERROR)
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return err;
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// write in 32-bit units
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MXC_FLC->cn |= MXC_F_FLC_CN_WDTH;
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MXC_FLC->cn &= ~MXC_F_FLC_CN_BRST;
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// write the data
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MXC_FLC->addr = address;
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MXC_FLC->data[0] = data;
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait until flash operation is complete */
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while (FLC_Busy()) {}
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/* Lock flash */
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MXC_FLC->cn &= ~MXC_F_FLC_CN_UNLOCK;
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/* Check access violations */
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if (MXC_FLC->intr & MXC_F_FLC_INTR_AF) {
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MXC_FLC->intr &= ~MXC_F_FLC_INTR_AF;
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return E_BAD_STATE;
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}
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SYS_Flash_Operation();
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return E_NO_ERROR;
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_Write128(uint32_t address, uint32_t *data)
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{
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int err;
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// Address checked if it is word addressable
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if (address & 0xF) {
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return E_BAD_PARAM;
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}
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if ((err = prepare_flc()) != E_NO_ERROR)
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return err;
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// write 128-bits
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MXC_FLC->cn &= ~MXC_F_FLC_CN_WDTH;
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// write the data
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MXC_FLC->addr = address;
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memcpy((void*)&MXC_FLC->data[0], data, 16);
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait until flash operation is complete */
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while (FLC_Busy());
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/* Lock flash */
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MXC_FLC->cn &= ~MXC_F_FLC_CN_UNLOCK;
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/* Check access violations */
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if (MXC_FLC->intr & MXC_F_FLC_INTR_AF) {
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MXC_FLC->intr &= ~MXC_F_FLC_INTR_AF;
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return E_BAD_STATE;
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}
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SYS_Flash_Operation();
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return E_NO_ERROR;
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}
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// *****************************************************************************
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#if defined (__ICCARM__)
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#pragma section=".flashprog"
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#endif
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#if defined ( __GNUC__ )
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__attribute__ ((section(".flashprog")))
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#endif
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int FLC_Write(uint32_t address, uint32_t length, uint8_t *buffer)
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{
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int err;
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uint32_t bytes_written;
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uint8_t current_data[4];
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if ((err = prepare_flc()) != E_NO_ERROR)
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return err;
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// write in 32-bit units until we are 128-bit aligned
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MXC_FLC->cn &= ~MXC_F_FLC_CN_BRST;
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MXC_FLC->cn |= MXC_F_FLC_CN_WDTH;
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// Align the address and read/write if we have to
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if (address & 0x3) {
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// Figure out how many bytes we have to write to round up the address
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bytes_written = 4 - (address & 0x3);
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// Save the data currently in the flash
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memcpy(current_data, (void*)(address & (~0x3)), 4);
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// Modify current_data to insert the data from buffer
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memcpy(¤t_data[4-bytes_written], buffer, bytes_written);
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// Write the modified data
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MXC_FLC->addr = address - (address % 4);
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memcpy((void*)&MXC_FLC->data[0], ¤t_data, 4);
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait until flash operation is complete */
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while (FLC_Busy());
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address += bytes_written;
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length -= bytes_written;
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buffer += bytes_written;
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}
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while ( (length >= 4) && ((address & 0xF) != 0) ) {
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MXC_FLC->addr = address;
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memcpy((void*)&MXC_FLC->data[0], buffer, 4);
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait until flash operation is complete */
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while (FLC_Busy());
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address += 4;
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length -= 4;
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buffer += 4;
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}
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if (length >= 16) {
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// write in 128-bit bursts while we can
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MXC_FLC->cn &= ~MXC_F_FLC_CN_WDTH;
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while (length >= 16) {
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MXC_FLC->addr = address;
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memcpy((void*)&MXC_FLC->data[0], buffer, 16);
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait until flash operation is complete */
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while (FLC_Busy());
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address += 16;
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length -= 16;
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buffer += 16;
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}
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// Return to 32-bit writes.
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MXC_FLC->cn |= MXC_F_FLC_CN_WDTH;
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}
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while (length >= 4) {
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MXC_FLC->addr = address;
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memcpy((void*)&MXC_FLC->data[0], buffer, 4);
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait until flash operation is complete */
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while (FLC_Busy());
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address += 4;
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length -= 4;
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buffer += 4;
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}
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if (length > 0) {
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// Save the data currently in the flash
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memcpy(current_data, (void*)(address), 4);
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// Modify current_data to insert the data from buffer
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memcpy(current_data, buffer, length);
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MXC_FLC->addr = address;
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memcpy((void*)&MXC_FLC->data[0], current_data, 4);
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MXC_FLC->cn |= MXC_F_FLC_CN_WR;
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/* Wait until flash operation is complete */
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while (FLC_Busy());
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}
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/* Lock flash */
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MXC_FLC->cn &= ~MXC_F_FLC_CN_UNLOCK;
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/* Check access violations */
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if (MXC_FLC->intr & MXC_F_FLC_INTR_AF) {
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MXC_FLC->intr &= ~MXC_F_FLC_INTR_AF;
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return E_BAD_STATE;
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}
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SYS_Flash_Operation();
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return E_NO_ERROR;
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}
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int FLC_EnableInt(uint32_t mask)
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{
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uint32_t tmp;
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mask &= (MXC_F_FLC_INTR_DONEIE | MXC_F_FLC_INTR_AFIE);
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if (!mask) {
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/* No bits set? Wasn't something we can enable. */
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return E_BAD_PARAM;
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}
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/* Careful with access_fail bit, as it is W0C */
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tmp = MXC_FLC->intr | MXC_F_FLC_INTR_AF;
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/* Don't lose done flag */
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tmp &= ~(MXC_F_FLC_INTR_DONE);
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/* Apply enables and write back */
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MXC_FLC->intr = (tmp | mask);
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return E_NO_ERROR;
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}
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int FLC_DisableInt(uint32_t mask)
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{
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uint32_t tmp;
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mask &= (MXC_F_FLC_INTR_DONEIE | MXC_F_FLC_INTR_AFIE);
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if (!mask) {
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/* No bits set? Wasn't something we can disable. */
|
|
return E_BAD_PARAM;
|
|
}
|
|
|
|
/* Careful with access_fail bit, as it is W0C */
|
|
tmp = MXC_FLC->intr | MXC_F_FLC_INTR_AF;
|
|
/* Don't lose done flag */
|
|
tmp &= ~(MXC_F_FLC_INTR_DONE);
|
|
/* Apply disables and write back */
|
|
MXC_FLC->intr = (tmp & ~mask);
|
|
|
|
return E_NO_ERROR;
|
|
}
|
|
|
|
int FLC_GetFlags(void)
|
|
{
|
|
return (MXC_FLC->intr & (MXC_F_FLC_INTR_DONE | MXC_F_FLC_INTR_AF));
|
|
}
|
|
|
|
int FLC_ClearFlags(uint32_t mask)
|
|
{
|
|
mask &= (MXC_F_FLC_INTR_DONE | MXC_F_FLC_INTR_AF);
|
|
if (!mask) {
|
|
/* No bits set? Wasn't something we can clear. */
|
|
return E_BAD_PARAM;
|
|
}
|
|
|
|
// Both bits are write zero clear
|
|
MXC_FLC->intr ^= mask;
|
|
|
|
return E_NO_ERROR;
|
|
}
|
|
|
|
int FLC_UnlockInfoBlock()
|
|
{
|
|
MXC_FLC->acntl = 0x3a7f5ca3;
|
|
MXC_FLC->acntl = 0xa1e34f20;
|
|
MXC_FLC->acntl = 0x9608b2c1;
|
|
return E_NO_ERROR;
|
|
}
|
|
|
|
int FLC_LockInfoBlock()
|
|
{
|
|
MXC_FLC->acntl = 0xDEADBEEF;
|
|
return E_NO_ERROR;
|
|
}
|