532 lines
16 KiB
C
532 lines
16 KiB
C
/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-07-02 thread-liu first version
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*/
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#include "board.h"
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#if defined(BSP_USING_AUDIO)
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#include <drv_cs42l51.h>
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#define DRV_DEBUG
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#define LOG_TAG "drv.audio"
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#include <drv_log.h>
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/* CS42L51 address */
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#define CHIP_ADDRESS 0x4A
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/* reset pin, active low */
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#define CS42L51_RESET_PIN GET_PIN(G, 9)
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static uint16_t CS42L51_Device = OUT_HEADPHONE;
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static struct rt_i2c_bus_device *audio_dev = RT_NULL;
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/* i2c read reg */
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static rt_err_t read_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t len, rt_uint8_t *buf)
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{
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struct rt_i2c_msg msg[2] = {0, 0};
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RT_ASSERT(bus != RT_NULL);
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msg[0].addr = CHIP_ADDRESS; /* Slave address */
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msg[0].flags = RT_I2C_WR; /* Write flag */
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msg[0].buf = ® /* Slave register address */
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msg[0].len = 1; /* Number of bytes sent */
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msg[1].addr = CHIP_ADDRESS;
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msg[1].flags = RT_I2C_RD;
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msg[1].len = len;
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msg[1].buf = buf;
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if (rt_i2c_transfer(bus, msg, 2) == 2)
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{
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return RT_EOK;
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}
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return RT_ERROR;
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}
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/* i2c write reg */
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static rt_err_t write_reg(struct rt_i2c_bus_device *bus, rt_uint8_t reg, rt_uint8_t data)
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{
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rt_uint8_t buf[2];
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struct rt_i2c_msg msgs;
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RT_ASSERT(bus != RT_NULL);
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buf[0] = reg;
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buf[1] = data;
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msgs.addr = CHIP_ADDRESS;
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msgs.flags = RT_I2C_WR;
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msgs.buf = buf;
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msgs.len = 2;
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if (rt_i2c_transfer(bus, &msgs, 1) == 1)
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{
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return RT_EOK;
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}
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return RT_ERROR;
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}
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/**
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* @brief deinitializes cs42l51 low level.
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* @retval none
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*/
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static void cs42l51_lowlevel_deinit(void)
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{
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rt_uint8_t temp = 0;
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/* Mute DAC and ADC */
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read_reg(audio_dev, CS42L51_DAC_OUT_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_DAC_OUT_CTL, (temp | 0x03));
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read_reg(audio_dev, CS42L51_ADC_INPUT, 1, &temp);
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write_reg(audio_dev, CS42L51_ADC_INPUT, (temp | 0x03));
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/* Disable soft ramp and zero cross */
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read_reg(audio_dev, CS42L51_ADC_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_ADC_CTL, (temp & 0xF0));
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/* Set PDN to 1 */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp | 0x01));
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/* Set all power down bits to 1 */
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write_reg(audio_dev, CS42L51_POWER_CTL1, 0x7F);
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read_reg(audio_dev, CS42L51_MIC_POWER_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_MIC_POWER_CTL, (temp | 0x0E));
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/* Power off the codec */
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rt_pin_write(CS42L51_RESET_PIN, PIN_LOW);
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}
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/**
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* @brief initializes cs42l51 low level.
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* @retval none
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*/
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static void cs42l51_lowlevel_init(void)
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{
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rt_uint8_t temp = 0;
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/* Initialized RESET IO */
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rt_pin_mode(CS42L51_RESET_PIN, PIN_MODE_OUTPUT);
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/* Power off the cs42l51 */
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rt_pin_write(CS42L51_RESET_PIN, PIN_LOW);
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/* wait until power supplies are stable */
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rt_thread_mdelay(10);
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/* Power on the cs42l51 */
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rt_pin_write(CS42L51_RESET_PIN, PIN_HIGH);
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/* Wait at least 500ns after reset */
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rt_thread_mdelay(1);
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/* Set the device in standby mode */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp | 0x01));
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/* Set all power down bits to 1 */
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write_reg(audio_dev, CS42L51_POWER_CTL1, 0x7F);
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read_reg(audio_dev, CS42L51_MIC_POWER_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_MIC_POWER_CTL, (temp | 0x0E));
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}
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/**
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* @brief Initializes CS42L51.
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* @param Device: Audio type.
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* @param bus_name I2C device name.
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* @param volume: Initial output volume level (from 0 (-100dB) to 100 (0dB)).
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* @retval 0 if correct communication, else wrong communication
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*/
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static rt_err_t cs42l51_init(uint16_t device, const char *bus_name, uint8_t volume)
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{
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static uint8_t init_flag = 0;
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rt_uint8_t temp = 0;
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rt_uint8_t value = 0;
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/* check if codec is already initialized */
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if (init_flag == 0)
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{
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audio_dev = rt_i2c_bus_device_find(bus_name);
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if (audio_dev == RT_NULL)
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{
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LOG_E("%s bus not found\n", bus_name);
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return -RT_ERROR;
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}
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/* hard reset cs42l51 */
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cs42l51_drv.reset();
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/* Wait at least 500ns after reset */
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rt_thread_mdelay(1);
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/* Set the device in standby mode */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp | 0x01));
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/* Set all power down bits to 1 */
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write_reg(audio_dev, CS42L51_POWER_CTL1, 0x7F);
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read_reg(audio_dev, CS42L51_MIC_POWER_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_MIC_POWER_CTL, (temp | 0x0E));
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init_flag = 1;
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}
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else
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{
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/* Set all power down bits to 1 exept PDN to mute ADCs and DACs*/
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write_reg(audio_dev, CS42L51_POWER_CTL1, 0x7E);
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read_reg(audio_dev, CS42L51_MIC_POWER_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_MIC_POWER_CTL, (temp | 0x0E));
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/* Disable zero cross and soft ramp */
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read_reg(audio_dev, CS42L51_DAC_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_DAC_CTL, (temp & 0xFC));
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/* Power control : Enter standby (PDN = 1) */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp | 0x01));
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}
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/* Mic Power and Speed Control : Auto detect on, Speed mode SSM, tri state off, MCLK divide by 2 off */
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read_reg(audio_dev, CS42L51_MIC_POWER_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_MIC_POWER_CTL, ((temp & 0x0E) | 0xA0));
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/* Interface control : Loopback off, Slave, I2S (SDIN and SOUT), Digital mix off, Mic mix off */
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write_reg(audio_dev, CS42L51_INTF_CTL, 0x0C);
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/* Mic control : ADC single volume off, ADCB boost off, ADCA boost off, MicBias on AIN3B/MICIN2 pin, MicBias level 0.8xVA, MICB boost 16db, MICA boost 16dB */
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write_reg(audio_dev, CS42L51_MIC_CTL, 0x00);
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/* ADC control : ADCB HPF off, ADCB HPF freeze off, ADCA HPF off, ADCA HPF freeze off, Soft ramp B off, Zero cross B off, Soft ramp A off, Zero cross A off */
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write_reg(audio_dev, CS42L51_ADC_CTL, 0x00);
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/* ADC Input Select, Invert and Mute : AIN1B to PGAB, AIN3A to PreAmp to PGAA, ADCB invert off, ADCA invert off, ADCB mute on, ADCA mute off */
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write_reg(audio_dev, CS42L51_ADC_INPUT, 0x32);
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/* DAC output control : HP Gain to 1, Single volume control off, PCM invert signals polarity off, DAC channels mute on */
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write_reg(audio_dev, CS42L51_DAC_OUT_CTL, 0xC3);
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/* DAC control : Signal processing to DAC, Freeze off, De-emphasis off, Analog output auto mute off, DAC soft ramp */
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write_reg(audio_dev, CS42L51_DAC_CTL, 0x42);
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/* ALCA and PGAA Control : ALCA soft ramp disable on, ALCA zero cross disable on, PGA A Gain 0dB */
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write_reg(audio_dev, CS42L51_ALC_PGA_CTL, 0xC0);
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/* ALCB and PGAB Control : ALCB soft ramp disable on, ALCB zero cross disable on, PGA B Gain 0dB */
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write_reg(audio_dev, CS42L51_ALC_PGB_CTL, 0xC0);
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/* ADCA Attenuator : 0dB */
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write_reg(audio_dev, CS42L51_ADCA_ATT, 0x00);
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/* ADCB Attenuator : 0dB */
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write_reg(audio_dev, CS42L51_ADCB_ATT, 0x00);
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/* ADCA mixer volume control : ADCA mixer channel mute on, ADCA mixer volume 0dB */
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write_reg(audio_dev, CS42L51_ADCA_VOL, 0x80);
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/* ADCB mixer volume control : ADCB mixer channel mute on, ADCB mixer volume 0dB */
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write_reg(audio_dev, CS42L51_ADCB_VOL, 0x80);
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/* PCMA mixer volume control : PCMA mixer channel mute off, PCMA mixer volume 0dB */
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write_reg(audio_dev, CS42L51_PCMA_VOL, 0x00);
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/* PCMB mixer volume control : PCMB mixer channel mute off, PCMB mixer volume 0dB */
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write_reg(audio_dev, CS42L51_PCMB_VOL, 0x00);
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/* PCM channel mixer : AOUTA Left, AOUTB Right */
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write_reg(audio_dev, CS42L51_PCM_MIXER, 0x00);
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if(device & OUT_HEADPHONE)
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{
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value = VOLUME_CONVERT(volume);
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/* AOUTA volume control : AOUTA volume */
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write_reg(audio_dev, CS42L51_AOUTA_VOL, value);
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/* AOUTB volume control : AOUTB volume */
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write_reg(audio_dev, CS42L51_AOUTB_VOL, value);
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}
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CS42L51_Device = device;
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return RT_EOK;
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}
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/**
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* @brief Deinitialize the audio codec.
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* @param None
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* @retval None
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*/
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static void cs42l51_deinit(void)
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{
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/* Deinitialize Audio Codec interface */
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rt_uint8_t temp = 0;
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/* Mute DAC and ADC */
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read_reg(audio_dev, CS42L51_DAC_OUT_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_DAC_OUT_CTL, (temp | 0x03));
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read_reg(audio_dev, CS42L51_ADC_INPUT, 1, &temp);
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write_reg(audio_dev, CS42L51_ADC_INPUT, (temp | 0x03));
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/* Disable soft ramp and zero cross */
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read_reg(audio_dev, CS42L51_ADC_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_ADC_CTL, (temp & 0xF0));
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/* Set PDN to 1 */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp | 0x01));
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/* Set all power down bits to 1 */
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write_reg(audio_dev, CS42L51_POWER_CTL1, 0x7F);
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read_reg(audio_dev, CS42L51_MIC_POWER_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_MIC_POWER_CTL, (temp | 0x0E));
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/* Power off CS42L51*/
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rt_pin_write(CS42L51_RESET_PIN, PIN_LOW);
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}
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/**
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* @brief Verify that we have a CS42L51.
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* @retval 0 if correct communication, else wrong communication
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*/
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static uint32_t cs42l51_read_id(void)
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{
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uint8_t temp;
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/* read cs42l51 id */
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read_reg(audio_dev, CS42L51_CHIP_REV_ID, 1, &temp);
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if ((temp != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_A)) &&
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(temp != CS42L51_MK_CHIP_REV(CS42L51_CHIP_ID, CS42L51_CHIP_REV_B)))
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{
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LOG_E("device id : 0x%02x", temp);
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return RT_ERROR;
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}
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LOG_D("device id : 0x%02x", temp);
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return RT_EOK;
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}
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/**
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* @brief Start the audio Codec play feature.
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* @note For this codec no Play options are required.
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* @retval 0 if correct communication, else wrong communication
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*/
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static uint32_t cs42l51_play(void)
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{
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rt_uint8_t temp = 0;
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switch (CS42L51_Device)
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{
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case OUT_HEADPHONE:
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{
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/* Unmute the output first */
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cs42l51_drv.set_mute(AUDIO_MUTE_OFF);
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/* DAC control : Signal processing to DAC, Freeze off, De-emphasis off, Analog output auto mute off, DAC soft ramp */
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write_reg(audio_dev, CS42L51_DAC_CTL, 0x42);
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/* Power control 1 : PDN_DACA, PDN_DACB disable. */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp & 0x9F));
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break;
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}
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case IN_LINE1:
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{
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/* ADC Input Select, Invert and Mute : AIN1B to PGAB, AIN1A to PGAA, ADCB invert off, ADCA invert off, ADCB mute off, ADCA mute off */
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write_reg(audio_dev, CS42L51_ADC_INPUT, 0x00);
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/* Power control 1 : PDN_PGAA, PDN_PGAA, PDN_ADCB, PDN_ADCA disable. */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp & 0x9F));
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break;
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}
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case IN_MIC1:
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{
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/* ADC Input Select, Invert and Mute : AIN1B to PGAB, AIN3A to PreAmp to PGAA, ADCB invert off, ADCA invert off, ADCB mute on, ADCA mute off */
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write_reg(audio_dev, CS42L51_ADC_INPUT, 0x32);
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/* Power control 1 : PDN_PGAA, PDN_ADCA disable. */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp & 0xF5));
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/* Mic Power and Speed Control : PDN_MICA, PDN_MIC_BIAS disable. */
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read_reg(audio_dev, CS42L51_MIC_POWER_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_MIC_POWER_CTL,(temp & 0xF9));
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break;
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}
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case IN_MIC2:
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{
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/* Power control 1 : PDN_PGAB, PDN_ADCB disable. */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp & 0xEB));
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/* Mic Power and Speed Control : PDN_MICB, PDN_MIC_BIAS disable. */
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read_reg(audio_dev, CS42L51_MIC_POWER_CTL, 1, &temp);
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write_reg(audio_dev, CS42L51_MIC_POWER_CTL,(temp & 0xF5));
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break;
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}
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default:
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LOG_D("error audio play mode!");
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break;
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}
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/* Power control : Exit standby (PDN = 0) */
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read_reg(audio_dev, CS42L51_POWER_CTL1, 1, &temp);
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write_reg(audio_dev, CS42L51_POWER_CTL1, (temp & 0xFE));
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return RT_EOK;
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}
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/**
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* @brief Pause playing on the audio codec.
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* @param audio_dev: Device address on communication Bus.
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* @retval 0 if correct communication, else wrong communication
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*/
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static uint32_t cs42l51_pause(void)
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{
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/* Pause the audio file playing */
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/* Mute the output first */
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return cs42l51_drv.set_mute(AUDIO_MUTE_ON);
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}
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/**
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* @brief Resume playing on the audio codec.
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* @param audio_dev: Device address on communication Bus.
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* @retval 0 if correct communication, else wrong communication
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*/
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static uint32_t cs42l51_resume(void)
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{
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/* Unmute the output */
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return cs42l51_drv.set_mute(AUDIO_MUTE_OFF);
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}
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/**
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* @brief Stop audio Codec playing. It powers down the codec.
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* @retval 0 if correct communication, else wrong communication
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*/
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static uint32_t cs42l51_stop(void)
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{
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rt_uint8_t temp = 0;
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/* Set all power down bits to 1 exept PDN to mute ADCs and DACs*/
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write_reg(audio_dev, 0x02, 0x7E);
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read_reg(audio_dev, 0x03, 1, &temp);
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write_reg(audio_dev, 0x03, (temp | 0x0E));
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/* Disable zero cross and soft ramp */
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read_reg(audio_dev, 0x09, 1, &temp);
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write_reg(audio_dev, 0x09, (temp & 0xFC));
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/* Power control : Enter standby (PDN = 1) */
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read_reg(audio_dev, 0x02, 1, &temp);
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write_reg(audio_dev, 0x02, (temp | 0x01));
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return RT_EOK;
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}
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/**
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* @brief Set new frequency.
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* @param AudioFreq: Audio frequency used to play the audio stream.
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* @retval 0 if correct communication, else wrong communication
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*/
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static uint32_t cs42l51_set_frequency(uint32_t AudioFreq)
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{
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return RT_EOK;
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}
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/**
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* @brief Set higher or lower the codec volume level.
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* @param Volume: output volume level (from 0 (-100dB) to 100 (0dB)).
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* @retval 0 if correct communication, else wrong communication
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*/
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static uint32_t cs42l51_set_volume(uint8_t Volume)
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{
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uint8_t convertedvol = VOLUME_CONVERT(Volume);
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/* AOUTA volume control : AOUTA volume */
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write_reg(audio_dev, CS42L51_AOUTA_VOL, convertedvol);
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|
/* AOUTB volume control : AOUTB volume */
|
|
write_reg(audio_dev, CS42L51_AOUTB_VOL, convertedvol);
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
/**
|
|
* @brief get higher or lower the codec volume level.
|
|
* @retval value if correct communication
|
|
*/
|
|
static uint32_t cs42l51_get_volume(void)
|
|
{
|
|
rt_uint8_t temp = 0;
|
|
|
|
/* AOUTA volume control : AOUTA volume */
|
|
read_reg(audio_dev, CS42L51_AOUTA_VOL, 1, &temp);
|
|
|
|
temp = VOLUME_INVERT(temp);
|
|
|
|
return temp;
|
|
}
|
|
|
|
/**
|
|
* @brief Enable or disable the mute feature on the audio codec.
|
|
* @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
|
|
* mute mode.
|
|
* @retval 0 if correct communication, else wrong communication
|
|
*/
|
|
static uint32_t cs42l51_set_mute(uint32_t cmd)
|
|
{
|
|
rt_uint8_t temp = 0;
|
|
|
|
/* Read DAC output control register */
|
|
read_reg(audio_dev, 0x08, 1, &temp);
|
|
|
|
/* Set the Mute mode */
|
|
if(cmd == AUDIO_MUTE_ON)
|
|
{
|
|
/* Mute DAC channels */
|
|
write_reg(audio_dev, CS42L51_DAC_OUT_CTL, (temp | 0x03));
|
|
}
|
|
else /* AUDIO_MUTE_OFF Disable the Mute */
|
|
{
|
|
/* Unmute DAC channels */
|
|
write_reg(audio_dev, CS42L51_DAC_OUT_CTL, (temp & 0xFC));
|
|
}
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
/**
|
|
* @brief Switch dynamically (while audio file is played) the output target
|
|
* (speaker, headphone, etc).
|
|
* @note This function is currently not used (only headphone output device).
|
|
* @param Output: specifies the audio output device target.
|
|
* @retval 0 if correct communication, else wrong communication
|
|
*/
|
|
static uint32_t cs42l51_set_output_mode(uint8_t Output)
|
|
{
|
|
return RT_EOK;
|
|
}
|
|
|
|
/**
|
|
* @brief Reset CS42L51 registers.
|
|
* @retval 0 if correct communication, else wrong communication
|
|
*/
|
|
static uint32_t cs42l51_reset(void)
|
|
{
|
|
cs42l51_lowlevel_deinit();
|
|
|
|
cs42l51_lowlevel_init();
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
/* Audio codec driver structure initialization */
|
|
AUDIO_DrvTypeDef cs42l51_drv =
|
|
{
|
|
cs42l51_init,
|
|
cs42l51_deinit,
|
|
cs42l51_read_id,
|
|
|
|
cs42l51_play,
|
|
cs42l51_pause,
|
|
cs42l51_resume,
|
|
cs42l51_stop,
|
|
|
|
cs42l51_set_frequency,
|
|
cs42l51_set_volume,
|
|
cs42l51_get_volume,
|
|
cs42l51_set_mute,
|
|
cs42l51_set_output_mode,
|
|
cs42l51_reset,
|
|
};
|
|
|
|
#endif
|