555 lines
18 KiB
C
555 lines
18 KiB
C
/**
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******************************************************************************
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* @brief SPI functions of the firmware library.
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "gd32f10x_spi.h"
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#include "gd32f10x_rcc.h"
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/** @addtogroup GD32F10x_Firmware
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* @{
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*/
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/** @defgroup SPI
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* @brief SPI driver modules
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* @{
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*/
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/** @defgroup SPI_Private_Defines
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* @{
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*/
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/* SPI registers Masks */
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#define CTLR1_CLEAR_MASK ((uint16_t)0x3040)
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#define I2SCTLR_CLEAR_MASK ((uint16_t)0xF040)
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/* I2S clock source selection Masks */
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#define I2S2_CLOCK_SRC ((uint32_t)(0x00020000))
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#define I2S3_CLOCK_SRC ((uint32_t)(0x00040000))
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#define I2S_MUL_MASK ((uint32_t)(0x0000F000))
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#define I2S_DIV_MASK ((uint32_t)(0x000000F0))
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/**
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* @}
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*/
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/** @defgroup SPI_Private_Functions
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* @{
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*/
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/**
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* @brief Reset the SPIx and the I2Sx peripheral.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @retval None
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*/
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void SPI_I2S_DeInit(SPI_TypeDef *SPIx)
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{
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if (SPIx == SPI1) {
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/* Reset SPI1 */
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RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_SPI1RST, ENABLE);
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RCC_APB2PeriphReset_Enable(RCC_APB2PERIPH_SPI1RST, DISABLE);
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} else if (SPIx == SPI2) {
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/* Reset SPI2 and I2S2 peripheral */
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_SPI2RST, ENABLE);
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_SPI2RST, DISABLE);
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} else if (SPIx == SPI3) {
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/* Reset SPI3 and I2S3 peripheral */
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_SPI3RST, ENABLE);
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_SPI3RST, DISABLE);
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}
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}
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/**
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* @brief Initialize the SPIx peripheral.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param SPI_InitParameter: The structuer contains configuration information.
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* @retval None
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*/
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void SPI_Init(SPI_TypeDef *SPIx, SPI_InitPara *SPI_InitParameter)
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{
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uint16_t temp_ctrl1 = 0;
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/* Configure SPIx CTRL1 according to the SPI_InitParameter */
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temp_ctrl1 = SPIx->CTLR1;
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temp_ctrl1 &= CTLR1_CLEAR_MASK;
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temp_ctrl1 |= (uint16_t)((uint32_t)SPI_InitParameter->SPI_TransType | SPI_InitParameter->SPI_Mode |
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SPI_InitParameter->SPI_FrameFormat | SPI_InitParameter->SPI_SCKPL |
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SPI_InitParameter->SPI_SCKPH | SPI_InitParameter->SPI_SWNSSEN |
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SPI_InitParameter->SPI_PSC | SPI_InitParameter->SPI_FirstBit);
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SPIx->CTLR1 = temp_ctrl1;
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/* Configure SPIx CRC Polynomial */
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SPIx->CPR = SPI_InitParameter->SPI_CRCPOL;
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/* Configure the I2SSEL bit in I2SCTLR register as SPI mode */
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SPIx->I2SCTLR &= ~SPI_I2SCTLR_I2SSEL;
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}
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/**
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* @brief Initialize the I2Sx peripheral.
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* @param SPIx: the SPI/I2S peripheral where x can be 2 or 3.
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* @param I2S_InitParameter: The structuer contains configuration information.
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* @retval None
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*/
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void I2S_Init(SPI_TypeDef *SPIx, I2S_InitPara *I2S_InitParameter)
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{
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uint16_t temp_i2sctrl = 0, div = 2, of = 0;
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uint32_t temp = 0;
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RCC_ClocksPara RCC_Clocks;
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uint32_t sourceclock = 0;
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/* SPIx I2SCTLR & I2SCKP Configuration */
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/* Deinit I2SCTLR I2SCKP register */
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SPIx->I2SCTLR &= I2SCTLR_CLEAR_MASK;
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SPIx->I2SCKP = 0x0002;
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/* Default config of the prescaler*/
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if (I2S_InitParameter->I2S_AudioFreq == I2S_AUDIOFREQ_DEFAULT) {
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of = (uint16_t)0;
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div = (uint16_t)2;
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} else {
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/* Get the I2S clock source */
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if (((uint32_t)SPIx) == SPI2_BASE) {
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temp = I2S2_CLOCK_SRC;
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} else {
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temp = I2S3_CLOCK_SRC;
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}
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/* I2S clock source configuration depend on different device */
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#ifdef GD32F10X_CL
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if ((RCC->GCFGR2 & temp) != 0) {
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/* Get RCC PLL3 multiplier */
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temp = (uint32_t)((RCC->GCFGR2 & I2S_MUL_MASK) >> 12);
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if ((temp > 5) && (temp < 15)) {
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/* Multiplier is between 8 and 14 (value 15 is forbidden) */
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temp += 2;
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} else {
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if (temp == 15) {
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/* Multiplier is 20 */
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temp = 20;
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}
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}
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/* Get the PREDV2 value */
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sourceclock = (uint32_t)(((RCC->GCFGR2 & I2S_DIV_MASK) >> 4) + 1);
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/* Calculate sourceclock based on PLL3 and PREDV2 */
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sourceclock = (uint32_t)((HSE_VALUE / sourceclock) * temp * 2);
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} else {
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/* Get system clock */
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RCC_GetClocksFreq(&RCC_Clocks);
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sourceclock = RCC_Clocks.CK_SYS_Frequency;
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}
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#else
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/* Get system clock */
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RCC_GetClocksFreq(&RCC_Clocks);
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sourceclock = RCC_Clocks.CK_SYS_Frequency;
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#endif /* GD32F10X_CL */
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/* Calculate the prescaler depending on the MCLK output state and the data format with a flaoting point. */
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if (I2S_InitParameter->I2S_MCKOE == I2S_MCK_ENABLE) {
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temp = (uint16_t)(((((sourceclock / 256) * 10) / I2S_InitParameter->I2S_AudioFreq)) + 5);
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} else {
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if (I2S_InitParameter->I2S_FrameFormat == I2S_FRAMEFORMAT_DL16b_CL16b) {
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temp = (uint16_t)(((((sourceclock / 32) * 10) / I2S_InitParameter->I2S_AudioFreq)) + 5);
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} else {
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temp = (uint16_t)(((((sourceclock / 64) * 10) / I2S_InitParameter->I2S_AudioFreq)) + 5);
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}
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}
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/* Remove the flaoting point */
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temp = temp / 10;
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of = (uint16_t)(temp & (uint16_t)0x0001);
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div = (uint16_t)((temp - of) / 2);
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of = (uint16_t)(of << 8);
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}
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/* Inappropriate prescaler, Set the default values */
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if ((div < 1) || (div > 0xFF)) {
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div = 2;
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of = 0;
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}
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/* Configure SPIx I2SCKP */
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SPIx->I2SCKP = (uint16_t)(div | (uint16_t)(of | (uint16_t)I2S_InitParameter->I2S_MCKOE));
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/* Configure SPIx I2SCTLR according to the I2S_InitParameter */
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temp_i2sctrl = SPIx->I2SCTLR;
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temp_i2sctrl |= (uint16_t)(SPI_I2SCTLR_I2SSEL | (uint16_t)(I2S_InitParameter->I2S_Mode | \
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(uint16_t)(I2S_InitParameter->I2S_STD | (uint16_t)(I2S_InitParameter->I2S_FrameFormat | \
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(uint16_t)I2S_InitParameter->I2S_CKPL))));
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SPIx->I2SCTLR = temp_i2sctrl;
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}
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/**
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* @brief Initial SPI_InitParameter members.
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* @param SPI_InitParameter : pointer to a SPI_InitPara structure.
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* @retval None
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*/
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void SPI_ParaInit(SPI_InitPara *SPI_InitParameter)
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{
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/* Reset SPI init structure parameters values */
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SPI_InitParameter->SPI_TransType = SPI_TRANSTYPE_FULLDUPLEX;
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SPI_InitParameter->SPI_Mode = SPI_MODE_SLAVE;
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SPI_InitParameter->SPI_FrameFormat = SPI_FRAMEFORMAT_8BIT;
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SPI_InitParameter->SPI_SCKPL = SPI_SCKPL_LOW;
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SPI_InitParameter->SPI_SCKPH = SPI_SCKPH_1EDGE;
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SPI_InitParameter->SPI_SWNSSEN = SPI_SWNSS_HARD;
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SPI_InitParameter->SPI_PSC = SPI_PSC_2;
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SPI_InitParameter->SPI_FirstBit = SPI_FIRSTBIT_MSB;
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SPI_InitParameter->SPI_CRCPOL = 7;
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}
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/**
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* @brief Initial I2S_InitParameter members.
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* @param I2S_InitParameter : pointer to a I2S_InitPara structure.
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* @retval None
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*/
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void I2S_ParaInit(I2S_InitPara *I2S_InitParameter)
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{
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/* Reset I2S init structure parameters values */
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I2S_InitParameter->I2S_Mode = I2S_MODE_SLAVETX;
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I2S_InitParameter->I2S_STD = I2S_STD_PHILLIPS;
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I2S_InitParameter->I2S_FrameFormat = I2S_FRAMEFORMAT_DL16b_CL16b;
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I2S_InitParameter->I2S_MCKOE = I2S_MCK_DISABLE;
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I2S_InitParameter->I2S_AudioFreq = I2S_AUDIOFREQ_DEFAULT;
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I2S_InitParameter->I2S_CKPL = I2S_CKPL_LOW;
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}
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/**
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* @brief Enable or disable the SPI peripheral.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param NewValue: ENABLE or DISABLE.
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* @retval None
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*/
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void SPI_Enable(SPI_TypeDef *SPIx, TypeState NewValue)
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{
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if (NewValue != DISABLE) {
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SPIx->CTLR1 |= SPI_CTLR1_SPIEN;
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} else {
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SPIx->CTLR1 &= ~SPI_CTLR1_SPIEN;
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}
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}
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/**
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* @brief Enable or disable the I2S peripheral.
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* @param SPIx: the SPI/I2S peripheral where x can be 2 or 3.
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* @param NewValue: ENABLE or DISABLE.
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* @retval None
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*/
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void I2S_Enable(SPI_TypeDef *SPIx, TypeState NewValue)
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{
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if (NewValue != DISABLE) {
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SPIx->I2SCTLR |= SPI_I2SCTLR_I2SEN;
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} else {
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SPIx->I2SCTLR &= ~SPI_I2SCTLR_I2SEN;
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}
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}
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/**
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* @brief Enable or disable the SPI or I2S interrupts.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param SPI_I2S_INT: specifies the SPI or I2S interrupt source. Select one of the follwing values :
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* @arg SPI_I2S_INT_TBE: Tx buffer empty interrupt mask
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* @arg SPI_I2S_INT_RBNE: Rx buffer not empty interrupt mask
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* @arg SPI_I2S_INT_ERR: Error interrupt mask
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* @param NewValue: ENABLE or DISABLE.
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* @retval None
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*/
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void SPI_I2S_INTConfig(SPI_TypeDef *SPIx, uint8_t SPI_I2S_INT, TypeState NewValue)
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{
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uint16_t intmask = 0 ;
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/* Get the interrupt enable bit in CTRL2 */
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intmask = (uint16_t)1 << (uint16_t)(SPI_I2S_INT >> 4);
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/* Enable or disable the selected interrupt */
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if (NewValue != DISABLE) {
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SPIx->CTLR2 |= intmask;
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} else {
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SPIx->CTLR2 &= (uint16_t)~intmask;
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}
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}
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/**
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* @brief Enable or disable the SPIx or I2Sx DMA transfer request.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param SPI_I2S_DMAReq: Select the SPI or I2S DMA transfer request. Select one of the follwing values :
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* @arg SPI_I2S_DMA_TX: Tx buffer DMA transfer request
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* @arg SPI_I2S_DMA_RX: Rx buffer DMA transfer request
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* @param NewValue: ENABLE or DISABLE.
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* @retval None
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*/
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void SPI_I2S_DMA_Enable(SPI_TypeDef *SPIx, uint16_t SPI_I2S_DMAReq, TypeState NewValue)
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{
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if (NewValue != DISABLE) {
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SPIx->CTLR2 |= SPI_I2S_DMAReq;
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} else {
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SPIx->CTLR2 &= (uint16_t)~SPI_I2S_DMAReq;
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}
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}
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/**
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* @brief Send a Data by the SPIx or I2Sx peripheral.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param Data : Data to be Send.
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* @retval None
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*/
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void SPI_I2S_SendData(SPI_TypeDef *SPIx, uint16_t Data)
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{
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SPIx->DTR = Data;
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}
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/**
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* @brief Return the received data by the SPIx or I2Sx peripheral.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @retval The value of the received data.
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*/
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uint16_t SPI_I2S_ReceiveData(SPI_TypeDef *SPIx)
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{
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return SPIx->DTR;
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}
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/**
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* @brief NSS pin internal software management.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param SPI_SWNSS: specifies the SPI NSS internal state. Select one of the follwing values :
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* @arg SPI_SWNSS_SET: Set NSS pin internally
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* @arg SPI_SWNSS_RESET: Reset NSS pin internally
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* @retval None
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*/
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void SPI_SWNSSConfig(SPI_TypeDef *SPIx, uint16_t SPI_SWNSS)
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{
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if (SPI_SWNSS != SPI_SWNSS_RESET) {
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/* Set NSS pin */
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SPIx->CTLR1 |= SPI_CTLR1_SWNSS;
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} else {
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/* Reset NSS pin */
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SPIx->CTLR1 &= ~SPI_CTLR1_SWNSS;
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}
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}
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/**
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* @brief Enable or disable the NSS output.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param NewValue: ENABLE or DISABLE.
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* @retval None
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*/
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void SPI_NSSDRV(SPI_TypeDef *SPIx, TypeState NewValue)
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{
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if (NewValue != DISABLE) {
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SPIx->CTLR2 |= SPI_CTLR2_NSSDRV;
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} else {
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SPIx->CTLR2 &= ~SPI_CTLR2_NSSDRV;
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}
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}
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/**
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* @brief Configure the data frame format.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param SPI_FrameFormat: Select the data frame format. Select one of the follwing values :
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* @arg SPI_FRAMEFORMAT_16BIT: Set data frame format to 16bit
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* @arg SPI_FRAMEFORMAT_8BIT: Set data frame format to 8bit
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* @retval None
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*/
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void SPI_FrameFormatConfig(SPI_TypeDef *SPIx, uint16_t SPI_FrameFormat)
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{
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/* Clear FF16 bit */
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SPIx->CTLR1 &= (uint16_t)~SPI_FRAMEFORMAT_16BIT;
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/* Set new FF16 bit value */
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SPIx->CTLR1 |= SPI_FrameFormat;
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}
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/**
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* @brief Send the SPIx CRC value.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @retval None
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*/
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void SPI_SendCRCNext(SPI_TypeDef *SPIx)
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{
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/* Enable the CRC transmission */
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SPIx->CTLR1 |= SPI_CTLR1_CRCNT;
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}
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/**
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* @brief Enable or disable the CRC calculation.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param NewValue: ENABLE or DISABLE.
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* @retval None
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*/
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void SPI_CRC_Enable(SPI_TypeDef *SPIx, TypeState NewValue)
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{
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if (NewValue != DISABLE) {
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/* Enable the CRC calculation */
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SPIx->CTLR1 |= SPI_CTLR1_CRCEN;
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} else {
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/* Disable the CRC calculation */
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SPIx->CTLR1 &= ~SPI_CTLR1_CRCEN;
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}
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}
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/**
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* @brief Get the transmit or the receive CRC register value.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param SPI_CRC: Select the transmit or the receive CRC register. Select one of the follwing values :
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* @arg SPI_CRC_TX: Selects Tx CRC register
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* @arg SPI_CRC_RX: Selects Rx CRC register
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* @retval The selected CRC register value.
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*/
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uint16_t SPI_GetCRC(SPI_TypeDef *SPIx, uint8_t SPI_CRC)
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{
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if (SPI_CRC != SPI_CRC_RX) {
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/* Transmit CRC value */
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return SPIx->TCR;
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} else {
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/* Receive CRC value */
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return SPIx->RCR;
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}
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}
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/**
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* @brief Get the CRC Polynomial value.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @retval The CRC Polynomial value.
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*/
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uint16_t SPI_GetCRCPolynomial(SPI_TypeDef *SPIx)
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{
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return SPIx->CPR;
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}
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/**
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* @brief Select the transfer direction in bidirectional mode.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param SPI_BDOE: The transfer direction in bi-directional mode. Select one of the follwing values :
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* @arg SPI_BDOE_TX: Selects Tx transmission direction
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* @arg SPI_BDOE_RX: Selects Rx receive direction
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* @retval None
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*/
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void SPI_BDOEConfig(SPI_TypeDef *SPIx, uint16_t SPI_BDOE)
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{
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if (SPI_BDOE == SPI_BDOE_TX) {
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/* Transmit only mode*/
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SPIx->CTLR1 |= SPI_BDOE_TX;
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} else {
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/* Receive only mode */
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SPIx->CTLR1 &= SPI_BDOE_RX;
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}
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}
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/**
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* @brief Check whether the flag is set or not.
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* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
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* @param SPI_I2S_FLAG: Select the flag. Select one of the follwing values :
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* @arg SPI_FLAG_TBE: Transmit buffer empty flag.
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* @arg SPI_FLAG_RBNE: Receive buffer not empty flag.
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* @arg SPI_FLAG_BSY: Busy flag.
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* @arg SPI_FLAG_OVR: Overrun flag.
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* @arg SPI_FLAG_MODF: Mode Fault flag.
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* @arg SPI_FLAG_CRCERR: CRC Error flag.
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* @arg I2S_FLAG_TBE: Transmit buffer empty flag.
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* @arg I2S_FLAG_RBNE: Receive buffer not empty flag.
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* @arg I2S_FLAG_BSY: Busy flag.
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|
* @arg I2S_FLAG_OVR: Overrun flag.
|
|
* @arg I2S_FLAG_UDR: Underrun Error flag.
|
|
* @arg I2S_FLAG_CHSIDE: Channel Side flag.
|
|
* @retval The new state of SPI_I2S_FLAG.
|
|
*/
|
|
TypeState SPI_I2S_GetBitState(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
|
|
{
|
|
/* Check the status of the selected flag */
|
|
if ((SPIx->STR & SPI_I2S_FLAG) != (uint16_t)RESET) {
|
|
return SET;
|
|
} else {
|
|
return RESET;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the flag, only used for clear CRCERR flag.
|
|
* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
|
|
* @param SPI_I2S_FLAG: Select the flag. This parametric only can be SPI_FLAG_CRCERR.
|
|
* @note
|
|
* The other flags are cleared by software sequences:
|
|
* - OVR (OverRun error) flag is cleared by software sequence: a read
|
|
* operation to SPI_DTR register (SPI_I2S_ReceiveData()) followed by a read
|
|
* operation to SPI_STR register (SPI_I2S_GetBitState()).
|
|
* - UDR (UnderRun error) flag is cleared by a read operation to
|
|
* SPI_STR register (SPI_I2S_GetBitState()).
|
|
* - MODF (Mode Fault) flag is cleared by software sequence: a read/write
|
|
* operation to SPI_STR register (SPI_I2S_GetBitState()) followed by a
|
|
* write operation to SPI_CTLR1 register (SPI_Enable() to enable the SPI).
|
|
* @retval None
|
|
*/
|
|
void SPI_I2S_ClearBitState(SPI_TypeDef *SPIx, uint16_t SPI_I2S_FLAG)
|
|
{
|
|
SPIx->STR = (uint16_t)~SPI_I2S_FLAG;
|
|
}
|
|
|
|
/**
|
|
* @brief Check whether interrupt has occurred.
|
|
* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
|
|
* @param SPI_I2S_INT: Select the SPI/I2S interrupt. Select one of the follwing values :
|
|
* @arg SPI_I2S_INT_TBE: Transmit buffer empty interrupt.
|
|
* @arg SPI_I2S_INT_RBNE: Receive buffer not empty interrupt.
|
|
* @arg SPI_I2S_INT_OVR: Overrun interrupt.
|
|
* @arg SPI_INT_MODF: Mode Fault interrupt.
|
|
* @arg SPI_INT_CRCERR: CRC Error interrupt.
|
|
* @arg I2S_INT_UDR: Underrun Error interrupt.
|
|
* @retval The new state of SPI_I2S_INT.
|
|
*/
|
|
TypeState SPI_I2S_GetIntBitState(SPI_TypeDef *SPIx, uint8_t SPI_I2S_INT)
|
|
{
|
|
uint16_t intposition = 0, intmask = 0;
|
|
/* Get the interrupt pending bit and enable bit */
|
|
intposition = 0x01 << (SPI_I2S_INT & 0x0F);
|
|
intmask = 0x01 << (SPI_I2S_INT >> 4);
|
|
|
|
/* Check the status of the interrupt */
|
|
if (((SPIx->STR & intposition) != (uint16_t)RESET) && (SPIx->CTLR2 & intmask)) {
|
|
return SET;
|
|
} else {
|
|
return RESET;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the SPIx or I2S interrupt pending bit, only uesd for clear CRCERR interrupt.
|
|
* @param SPIx: the SPI/I2S peripheral where x can be 1..3.
|
|
* @param SPI_I2S_INT: Select the SPI or I2S interrupt. This parametric only can be SPI_INT_CRCERR.
|
|
* @note
|
|
* The other flags are cleared by software sequences:
|
|
* - OVR (OverRun error) flag is cleared by software sequence: a read
|
|
* operation to SPI_DTR register (SPI_I2S_ReceiveData()) followed by a read
|
|
* operation to SPI_STR register (SPI_I2S_GetBitState()).
|
|
* - UDR (UnderRun error) flag is cleared by a read operation to
|
|
* SPI_STR register (SPI_I2S_GetBitState()).
|
|
* - MODF (Mode Fault) flag is cleared by software sequence: a read/write
|
|
* operation to SPI_STR register (SPI_I2S_GetBitState()) followed by a
|
|
* write operation to SPI_CTLR1 register (SPI_Enable() to enable the SPI).
|
|
* @retval None
|
|
*/
|
|
void SPI_I2S_ClearIntBitState(SPI_TypeDef *SPIx, uint8_t SPI_I2S_INT)
|
|
{
|
|
uint16_t itpos = 0;
|
|
|
|
/* Clear the select interrupt pending bit. */
|
|
itpos = 0x01 << (SPI_I2S_INT & 0x0F);
|
|
SPIx->STR = (uint16_t)~itpos;
|
|
}
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|