1121 lines
36 KiB
C
1121 lines
36 KiB
C
/**
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******************************************************************************
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* @brief CAN functions of the firmware library.
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "gd32f10x_can.h"
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#include "gd32f10x_rcc.h"
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/** @addtogroup GD32F10x_Firmware
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* @{
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*/
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/** @defgroup CAN
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* @brief CAN driver modules
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* @{
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*/
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/** @defgroup CAN_Private_Defines
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* @{
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*/
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/* CAN Mailbox Transmit Request */
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#define CAN_TMIR_TE ((uint32_t)0x00000001)
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/* CAN Filter Master Register bits */
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#define FMR_FINIT ((uint32_t)0x00000001)
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/* Time out for IWS bit */
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#define IWS_TIMEOUT ((uint32_t)0x0000FFFF)
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/* Time out for SWS bit */
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#define SWS_TIMEOUT ((uint32_t)0x0000FFFF)
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/* CAN TMIR_StdId masks */
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#define CAN_TMIR_StdId_Mask ((uint32_t)0x000007FF)
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/* CAN TMIR_ExtId masks */
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#define CAN_TMIR_ExtId_Mask ((uint32_t)0x1FFFFFFF)
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/* CAN TMIR_ExtId masks */
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#define CAN_FLAG_Mask ((uint32_t)0x000FFFFF)
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/* Flags in TSTR register */
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#define CAN_FLAGS_TSTR ((uint32_t)0x08000000)
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/* Flags in RFR1 register */
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#define CAN_FLAGS_RFR1 ((uint32_t)0x04000000)
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/* Flags in RFR0register */
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#define CAN_FLAGS_RFR0 ((uint32_t)0x02000000)
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/* Flags in STR register */
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#define CAN_FLAGS_STR ((uint32_t)0x01000000)
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/* Flags in ER register */
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#define CAN_FLAGS_ER ((uint32_t)0x00F00000)
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/* Mailboxes definition */
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#define CAN_TXMAILBOX_0 ((uint8_t)0x00)
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#define CAN_TXMAILBOX_1 ((uint8_t)0x01)
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#define CAN_TXMAILBOX_2 ((uint8_t)0x02)
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/* CAN Master Control Register bit */
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#define MCR_DBF ((uint32_t)0x00010000)
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#define CAN_MODE_MASK ((uint32_t)0x00000003)
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/**
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* @}
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*/
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/** @defgroup CAN_Private_Functions
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* @{
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*/
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/**
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* @brief Deinitialize the CAN peripheral registers.
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* @param CANx: where x:[1,2] to select the CAN peripheral.
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* @retval None.
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*/
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void CAN_DeInit(CAN_TypeDef *CANx)
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{
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if (CANx == CAN1) {
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/* Force CAN1 reset state */
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_CAN1, ENABLE);
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/* Release CAN1 from reset state */
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_CAN1, DISABLE);
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} else {
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/* Force CAN2 reset state */
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_CAN2, ENABLE);
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/* Release CAN2 from reset state */
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RCC_APB1PeriphReset_Enable(RCC_APB1PERIPH_CAN2, DISABLE);
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}
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}
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/**
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* @brief Initialize the CAN peripheral according to the CAN_InitParaStruct.
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* @param CANx:where x:[1,2]
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* @param CAN_InitParaStruct: contain the configuration information for the CAN peripheral.
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* @retval It will be returned the status of CAN_INITSTATE_FAILED or CAN_INITSTATE_SUCCESS.
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*/
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uint8_t CAN_Init(CAN_TypeDef *CANx, CAN_InitPara *CAN_InitParaStruct)
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{
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uint32_t wait_ack = 0x00000000;
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/* Out of sleep mode */
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CANx->CTLR &= (~(uint32_t)CAN_CTLR_SWM);
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/* Enable initial working */
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CANx->CTLR |= CAN_CTLR_IWM ;
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/* Wait the acknowledge */
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while (((CANx->STR & CAN_STR_IWS) != CAN_STR_IWS) && (wait_ack != IWS_TIMEOUT)) {
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wait_ack++;
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}
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/* Check whether initial working is success */
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if ((CANx->STR & CAN_STR_IWS) != CAN_STR_IWS) {
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return CAN_INITSTATE_FAILED;
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} else {
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/* Set the time triggered communication mode */
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if (CAN_InitParaStruct->CAN_TTC == ENABLE) {
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CANx->CTLR |= CAN_CTLR_TTC;
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} else {
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CANx->CTLR &= ~(uint32_t)CAN_CTLR_TTC;
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}
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/* Set the automatic bus-off management */
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if (CAN_InitParaStruct->CAN_ABOR == ENABLE) {
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CANx->CTLR |= CAN_CTLR_ABOR;
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} else {
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CANx->CTLR &= ~(uint32_t)CAN_CTLR_ABOR;
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}
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/* Set the automatic wake-up mode */
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if (CAN_InitParaStruct->CAN_AWK == ENABLE) {
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CANx->CTLR |= CAN_CTLR_AWK;
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} else {
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CANx->CTLR &= ~(uint32_t)CAN_CTLR_AWK;
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}
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/* Set the automatic retransmission mode */
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if (CAN_InitParaStruct->CAN_ARD == ENABLE) {
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CANx->CTLR |= CAN_CTLR_ARD;
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} else {
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CANx->CTLR &= ~(uint32_t)CAN_CTLR_ARD;
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}
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/* Set receive FIFO overwrite mode */
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if (CAN_InitParaStruct->CAN_RFOD == ENABLE) {
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CANx->CTLR |= CAN_CTLR_RFOD;
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} else {
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CANx->CTLR &= ~(uint32_t)CAN_CTLR_RFOD;
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}
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/* Set the Transmit FIFO order */
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if (CAN_InitParaStruct->CAN_TFO == ENABLE) {
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CANx->CTLR |= CAN_CTLR_TFO;
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} else {
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CANx->CTLR &= ~(uint32_t)CAN_CTLR_TFO;
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}
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/* Set the bit timing register */
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CANx->BTR = (uint32_t)((uint32_t)CAN_InitParaStruct->CAN_Mode << 30) | \
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((uint32_t)CAN_InitParaStruct->CAN_SJW << 24) | \
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((uint32_t)CAN_InitParaStruct->CAN_BS1 << 16) | \
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((uint32_t)CAN_InitParaStruct->CAN_BS2 << 20) | \
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((uint32_t)CAN_InitParaStruct->CAN_Prescaler - 1);
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/* leave initialisation */
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CANx->CTLR &= ~(uint32_t)CAN_CTLR_IWM;
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/* Wait the acknowledge */
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wait_ack = 0;
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while (((CANx->STR & CAN_STR_IWS) == CAN_STR_IWS) && (wait_ack != IWS_TIMEOUT)) {
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wait_ack++;
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}
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/* Check whether qiut initial working mode */
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if ((CANx->STR & CAN_STR_IWS) == CAN_STR_IWS) {
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return CAN_INITSTATE_FAILED;
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} else {
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return CAN_INITSTATE_SUCCESS;
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}
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}
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}
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/**
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* @brief Initialize the CAN peripheral according to the CAN_FilterInitStruct.
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* @param CAN_FilterInitParaStruct:contain the information for the CAN peripheral.
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* @retval None.
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*/
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void CAN_FilterInit(CAN_FilterInitPara *CAN_FilterInitParaStruct)
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{
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uint32_t filter_number = 0;
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filter_number = ((uint32_t)1) << CAN_FilterInitParaStruct->CAN_FilterNumber;
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/* Set filter lock disable */
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CAN1->FCTLR |= CAN_FCTLR_FLD;
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/* Disable Filter */
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CAN1->FWR &= ~(uint32_t)filter_number;
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/* Filter Scale */
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if (CAN_FilterInitParaStruct->CAN_FilterScale == CAN_FILTERSCALE_16BIT) {
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/* Set the filter 16-bit scale*/
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CAN1->FSR &= ~(uint32_t)filter_number;
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/* First 16-bit list and First 16-bit mask */
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/* Or First 16-bit list and Second 16-bit list */
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CAN1->FilterRegister[CAN_FilterInitParaStruct->CAN_FilterNumber].FD0R =
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((0x0000FFFF & (uint32_t)CAN_FilterInitParaStruct->CAN_FilterMaskListLow) << 16) |
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(0x0000FFFF & (uint32_t)CAN_FilterInitParaStruct->CAN_FilterListLow);
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/* Second 16-bit identifier and Second 16-bit mask */
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/* Or Third 16-bit identifier and Fourth 16-bit identifier */
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CAN1->FilterRegister[CAN_FilterInitParaStruct->CAN_FilterNumber].FD1R =
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((0x0000FFFF & (uint32_t)CAN_FilterInitParaStruct->CAN_FilterMaskListHigh) << 16) |
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(0x0000FFFF & (uint32_t)CAN_FilterInitParaStruct->CAN_FilterListHigh);
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}
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if (CAN_FilterInitParaStruct->CAN_FilterScale == CAN_FILTERSCALE_32BIT) {
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/* 32-bit scale for the filter */
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CAN1->FSR |= filter_number;
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/* 32-bit identifier or First 32-bit identifier */
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CAN1->FilterRegister[CAN_FilterInitParaStruct->CAN_FilterNumber].FD0R =
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((0x0000FFFF & (uint32_t)CAN_FilterInitParaStruct->CAN_FilterListHigh) << 16) |
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(0x0000FFFF & (uint32_t)CAN_FilterInitParaStruct->CAN_FilterListLow);
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/* 32-bit mask or Second 32-bit identifier */
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CAN1->FilterRegister[CAN_FilterInitParaStruct->CAN_FilterNumber].FD1R =
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((0x0000FFFF & (uint32_t)CAN_FilterInitParaStruct->CAN_FilterMaskListHigh) << 16) |
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(0x0000FFFF & (uint32_t)CAN_FilterInitParaStruct->CAN_FilterMaskListLow);
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}
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/* Filter Mode */
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if (CAN_FilterInitParaStruct->CAN_FilterMode == CAN_FILTERMODE_MASK) {
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/*Filter with Mask mode*/
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CAN1->FMR &= ~(uint32_t)filter_number;
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} else { /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FILTERMODE_LIST */
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/*Filter with List mode*/
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CAN1->FMR |= (uint32_t)filter_number;
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}
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/* Filter associated with FIFO */
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if (CAN_FilterInitParaStruct->CAN_FilterFIFOAssociation == CAN_FILTER_FIFO0) {
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/* Filter associated with FIFO 0 */
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CAN1->FAFR &= ~(uint32_t)filter_number;
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}
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if (CAN_FilterInitParaStruct->CAN_FilterFIFOAssociation == CAN_FILTER_FIFO1) {
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/* Filter associated with FIFO 1 */
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CAN1->FAFR |= (uint32_t)filter_number;
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}
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/* Filter working */
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if (CAN_FilterInitParaStruct->CAN_FilterWork == ENABLE) {
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CAN1->FWR |= filter_number;
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}
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/* Exit the initialisation mode for the filter */
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CAN1->FCTLR &= ~CAN_FCTLR_FLD;
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}
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/**
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* @brief Configure each CAN_InitParaStruct member with default value.
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* @param CAN_InitParaStruct: pointer to a CAN_InitPara structure to initialize.
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* @retval None.
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*/
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void CAN_StructInit(CAN_InitPara *CAN_InitParaStruct)
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{
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/* Set the time triggered communication mode */
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CAN_InitParaStruct->CAN_TTC = DISABLE;
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/* Set the automatic bus-off recovery */
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CAN_InitParaStruct->CAN_ABOR = DISABLE;
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/* Set the automatic wake up mode */
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CAN_InitParaStruct->CAN_AWK = DISABLE;
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/* Set the automatic retransmission disable */
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CAN_InitParaStruct->CAN_ARD = DISABLE;
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/* Set the receive FIFO overwrite mode */
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CAN_InitParaStruct->CAN_RFOD = DISABLE;
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/* Set the transmit FIFO order */
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CAN_InitParaStruct->CAN_TFO = DISABLE;
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/* Set the CAN_Mode member */
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CAN_InitParaStruct->CAN_Mode = CAN_MODE_NORMAL;
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/* Set the CAN_SJW member */
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CAN_InitParaStruct->CAN_SJW = CAN_SJW_1TQ;
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/* Set the CAN_BS1 member */
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CAN_InitParaStruct->CAN_BS1 = CAN_BS1_4TQ;
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/* Set the CAN_BS2 member */
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CAN_InitParaStruct->CAN_BS2 = CAN_BS2_3TQ;
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/* Set the CAN_Prescaler member */
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CAN_InitParaStruct->CAN_Prescaler = 1;
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}
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/**
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* @brief Set header bank of CAN2 filter.
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* @param CAN2_HeaderBankNumber: Select header bank of CAN2 filter.It can be 1 to 27.
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* @retval None.
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*/
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void CAN_HeaderBank(uint8_t CAN_HeaderBankNumber)
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{
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/* Set filter lock disable */
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CAN1->FCTLR |= CAN_FCTLR_FLD;
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/* Select filter start number for slave CAN */
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CAN1->FCTLR &= (uint32_t)0xFFFFC0F1 ;
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CAN1->FCTLR |= (uint32_t)(CAN_HeaderBankNumber) << 8;
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/* Filter out the initialization mode */
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CAN1->FCTLR |= ~CAN_FCTLR_FLD;
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}
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/**
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* @brief Enable or disable the Debug Freeze for CAN.
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* @param CANx: where x :[1,2] for selecting the CAN peripheral.
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* @param NewValue: new state of the CAN peripheral.
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* This parameter can be: ENABLE or DISABLE.
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* @retval None.
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*/
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void CAN_DebugFreeze(CAN_TypeDef *CANx, TypeState NewValue)
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{
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if (NewValue != DISABLE) {
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CANx->CTLR |= CAN_CTLR_DFZ;
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} else {
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CANx->CTLR &= ~CAN_CTLR_DFZ;
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}
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}
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/**
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* @brief Enable or disabe the CAN Time Triggered communication mode.
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* @param CANx:where x :[1,2] for selecting the CAN peripheral.
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* @param NewValue : Mode new state , This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void CAN_TimeTrigComMode_Enable(CAN_TypeDef *CANx, TypeState NewValue)
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{
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if (NewValue != DISABLE) {
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/* Enable the TTC mode */
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CANx->CTLR |= CAN_CTLR_TTC;
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/* Set TSEbits */
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CANx->TxMailBox[0].TMPR |= ((uint32_t)CAN_TMPR0_TSE);
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CANx->TxMailBox[1].TMPR |= ((uint32_t)CAN_TMPR1_TSE);
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CANx->TxMailBox[2].TMPR |= ((uint32_t)CAN_TMPR2_TSE);
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} else {
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/* Disable the TTC mode */
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CANx->CTLR &= (uint32_t)(~(uint32_t)CAN_CTLR_TTC);
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/* Reset TSE bits */
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CANx->TxMailBox[0].TMPR &= ((uint32_t)~CAN_TMPR0_TSE);
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CANx->TxMailBox[1].TMPR &= ((uint32_t)~CAN_TMPR1_TSE);
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CANx->TxMailBox[2].TMPR &= ((uint32_t)~CAN_TMPR2_TSE);
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}
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}
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/**
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* @brief Initiate to transmit a message.
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* @param CANx: where x:[1,2]to to select the CAN peripheral.
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* @param TxMessage: contain CAN Id, CAN DLC and CAN data for the structure.
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* @retval The number of the mailbox that is used for transmission
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* or CAN_TxState_NoMailBox if there is no empty mailbox.
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*/
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uint8_t CAN_Transmit(CAN_TypeDef *CANx, CanTxMessage *TxMessage)
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{
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uint8_t transmit_mailbox_number = 0;
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/* Select one empty transmit mailbox */
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if ((CANx->TSTR & CAN_TSTR_TME0) == CAN_TSTR_TME0) {
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transmit_mailbox_number = 0;
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} else if ((CANx->TSTR & CAN_TSTR_TME1) == CAN_TSTR_TME1) {
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transmit_mailbox_number = 1;
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} else if ((CANx->TSTR & CAN_TSTR_TME2) == CAN_TSTR_TME2) {
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transmit_mailbox_number = 2;
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} else {
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transmit_mailbox_number = CAN_TXSTATE_NOMAILBOX;
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}
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if (transmit_mailbox_number != CAN_TXSTATE_NOMAILBOX) {
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/* Set up the Id */
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CANx->TxMailBox[transmit_mailbox_number].TMIR &= CAN_TMIR_TE;
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if (TxMessage->FF == CAN_FF_STANDARD) {
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CANx->TxMailBox[transmit_mailbox_number].TMIR |= ((TxMessage->StdId << 21) | \
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TxMessage->FT);
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} else {
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CANx->TxMailBox[transmit_mailbox_number].TMIR |= ((TxMessage->ExtId << 3) | \
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TxMessage->FF | \
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TxMessage->FT);
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}
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/* Set up the DLC */
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TxMessage->DLC &= ((uint8_t)CAN_TMPR0_DLC);
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CANx->TxMailBox[transmit_mailbox_number].TMPR &= ((uint32_t)~CAN_TMPR0_DLC);
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CANx->TxMailBox[transmit_mailbox_number].TMPR |= TxMessage->DLC;
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/* Set up the data field */
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CANx->TxMailBox[transmit_mailbox_number].TMD0R = (((uint32_t)TxMessage->Data[3] << 24) |
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((uint32_t)TxMessage->Data[2] << 16) |
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((uint32_t)TxMessage->Data[1] << 8) |
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((uint32_t)TxMessage->Data[0]));
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CANx->TxMailBox[transmit_mailbox_number].TMD1R = (((uint32_t)TxMessage->Data[7] << 24) |
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((uint32_t)TxMessage->Data[6] << 16) |
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((uint32_t)TxMessage->Data[5] << 8) |
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((uint32_t)TxMessage->Data[4]));
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/* Request transmission */
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CANx->TxMailBox[transmit_mailbox_number].TMIR |= CAN_TMIR0_TE;
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}
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return transmit_mailbox_number;
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}
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/**
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* @brief Check the state of message transmission.
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* @param CANx: where x:[1,2] to to select the CAN peripheral.
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* @param TransmitMailbox: the number of the used transmission mailbox.
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* @retval Return CAN_TXSTATE_OK or CAN_TXSTATE_FAILED.
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*/
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uint8_t CAN_TransmitState(CAN_TypeDef *CANx, uint8_t TransmitMailbox)
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{
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uint32_t state = 0;
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switch (TransmitMailbox) {
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case (CAN_TXMAILBOX_0):
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state = CANx->TSTR & (CAN_TSTR_MTF0 | CAN_TSTR_MTFNE0 | CAN_TSTR_TME0);
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break;
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case (CAN_TXMAILBOX_1):
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state = CANx->TSTR & (CAN_TSTR_MTF1 | CAN_TSTR_MTFNE1 | CAN_TSTR_TME1);
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break;
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case (CAN_TXMAILBOX_2):
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state = CANx->TSTR & (CAN_TSTR_MTF2 | CAN_TSTR_MTFNE2 | CAN_TSTR_TME2);
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break;
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default:
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state = CAN_TXSTATE_FAILED;
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break;
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}
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switch (state) {
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/* transmit pending */
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case (0x0):
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state = CAN_TXSTATE_PENDING;
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break;
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/* transmit failed */
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case (CAN_TSTR_MTF0 | CAN_TSTR_TME0):
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state = CAN_TXSTATE_FAILED;
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break;
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case (CAN_TSTR_MTF1 | CAN_TSTR_TME1):
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state = CAN_TXSTATE_FAILED;
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break;
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case (CAN_TSTR_MTF2 | CAN_TSTR_TME2):
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state = CAN_TXSTATE_FAILED;
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break;
|
|
/* transmit succeeded */
|
|
case (CAN_TSTR_MTF0 | CAN_TSTR_MTFNE0 | CAN_TSTR_TME0):
|
|
state = CAN_TXSTATE_OK;
|
|
break;
|
|
case (CAN_TSTR_MTF1 | CAN_TSTR_MTFNE1 | CAN_TSTR_TME1):
|
|
state = CAN_TXSTATE_OK;
|
|
break;
|
|
case (CAN_TSTR_MTF2 | CAN_TSTR_MTFNE2 | CAN_TSTR_TME2):
|
|
state = CAN_TXSTATE_OK;
|
|
break;
|
|
default:
|
|
state = CAN_TXSTATE_FAILED;
|
|
break;
|
|
}
|
|
return (uint8_t) state;
|
|
}
|
|
|
|
/**
|
|
* @brief Stop a transmit mission.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param Mailbox: Mailbox number.
|
|
* @retval None.
|
|
*/
|
|
void CAN_StopTransmit(CAN_TypeDef *CANx, uint8_t Mailbox)
|
|
{
|
|
/* Stop transmission */
|
|
switch (Mailbox) {
|
|
case (CAN_TXMAILBOX_0):
|
|
CANx->TSTR |= CAN_TSTR_MST0;
|
|
break;
|
|
case (CAN_TXMAILBOX_1):
|
|
CANx->TSTR |= CAN_TSTR_MST1;
|
|
break;
|
|
case (CAN_TXMAILBOX_2):
|
|
CANx->TSTR |= CAN_TSTR_MST2;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Receive a message.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
|
|
* @param RxMessage: a structure receive message which contains
|
|
* CAN Id, CAN DLC, CAN datas and FI number.
|
|
* @retval None.
|
|
*/
|
|
void CAN_Receive(CAN_TypeDef *CANx, uint8_t FIFONumber, CanRxMessage *RxMessage)
|
|
{
|
|
/* Get the frame identifier */
|
|
RxMessage->FF = (uint8_t)0x04 & CANx->FIFOMailBox[FIFONumber].RFMIR;
|
|
if (RxMessage->FF == CAN_FF_STANDARD) {
|
|
RxMessage->StdId = CAN_TMIR_StdId_Mask & (CANx->FIFOMailBox[FIFONumber].RFMIR >> 21);
|
|
} else {
|
|
RxMessage->ExtId = CAN_TMIR_ExtId_Mask & (CANx->FIFOMailBox[FIFONumber].RFMIR >> 3);
|
|
}
|
|
|
|
RxMessage->FT = (uint8_t)0x02 & CANx->FIFOMailBox[FIFONumber].RFMIR;
|
|
/* Get the data length code */
|
|
RxMessage->DLC = (uint8_t)0x0F & CANx->FIFOMailBox[FIFONumber].RFMPR;
|
|
/* Get the filtering index */
|
|
RxMessage->FI = (uint8_t)0xFF & (CANx->FIFOMailBox[FIFONumber].RFMPR >> 8);
|
|
/* Get FIFO mailbox data */
|
|
RxMessage->Data[0] = (uint8_t)0xFF & CANx->FIFOMailBox[FIFONumber].RFMD0R;
|
|
RxMessage->Data[1] = (uint8_t)0xFF & (CANx->FIFOMailBox[FIFONumber].RFMD0R >> 8);
|
|
RxMessage->Data[2] = (uint8_t)0xFF & (CANx->FIFOMailBox[FIFONumber].RFMD0R >> 16);
|
|
RxMessage->Data[3] = (uint8_t)0xFF & (CANx->FIFOMailBox[FIFONumber].RFMD0R >> 24);
|
|
RxMessage->Data[4] = (uint8_t)0xFF & CANx->FIFOMailBox[FIFONumber].RFMD1R;
|
|
RxMessage->Data[5] = (uint8_t)0xFF & (CANx->FIFOMailBox[FIFONumber].RFMD1R >> 8);
|
|
RxMessage->Data[6] = (uint8_t)0xFF & (CANx->FIFOMailBox[FIFONumber].RFMD1R >> 16);
|
|
RxMessage->Data[7] = (uint8_t)0xFF & (CANx->FIFOMailBox[FIFONumber].RFMD1R >> 24);
|
|
/* Release the FIFO */
|
|
if (FIFONumber == CAN_FIFO0) {
|
|
CANx->RFR0 |= CAN_RFR0_RFD0;
|
|
}
|
|
|
|
/* FIFONumber == CAN_FIFO1 */
|
|
else {
|
|
CANx->RFR1 |= CAN_RFR1_RFD1;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Dequeue the FIFO.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param FIFONumber: FIFO to dequeue, it can be CAN_FIFO0 or CAN_FIFO1.
|
|
* @retval None.
|
|
*/
|
|
void CAN_FIFODequeue(CAN_TypeDef *CANx, uint8_t FIFONumber)
|
|
{
|
|
|
|
if (FIFONumber == CAN_FIFO0) {
|
|
/* Release FIFO 0 */
|
|
CANx->RFR0 |= CAN_RFR0_RFD0;
|
|
} else { /* FIFONumber == CAN_FIFO1 */
|
|
/* Release FIFO1 */
|
|
CANx->RFR1 |= CAN_RFR1_RFD1;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Return the length of receiving messages.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param FIFONumber: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
|
|
* @retval message_length : which is the Length of pending message.
|
|
*/
|
|
uint8_t CAN_MessageLength(CAN_TypeDef *CANx, uint8_t FIFONumber)
|
|
{
|
|
uint8_t message_length = 0;
|
|
if (FIFONumber == CAN_FIFO0) {
|
|
message_length = (uint8_t)(CANx->RFR0 & (uint32_t)0x03);
|
|
} else if (FIFONumber == CAN_FIFO1) {
|
|
message_length = (uint8_t)(CANx->RFR1 & (uint32_t)0x03);
|
|
} else {
|
|
message_length = 0;
|
|
}
|
|
return message_length;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Select the CAN Working mode.
|
|
* @param CAN_WorkingMode : CAN Working Mode.It can be the following one.
|
|
* @arg CAN_WORKINGMODE_INITIAL
|
|
* @arg CAN_WORKINGMODE_NORMAL
|
|
* @arg CAN_WORKINGMODE_SLEEP
|
|
* @retval state of the requested mode which can be
|
|
* @arg CAN_MODESTATE_FAILED
|
|
* @arg CAN_MODESTATE_SUCCESS
|
|
*/
|
|
uint8_t CAN_WorkingMode(CAN_TypeDef *CANx, uint8_t CAN_WorkingMode)
|
|
{
|
|
uint8_t state = CAN_MODESTATE_FAILED;
|
|
|
|
/* Timeout for IWS or also for SWS bits*/
|
|
uint32_t timeout = IWS_TIMEOUT;
|
|
|
|
if (CAN_WorkingMode == CAN_WORKINGMODE_INITIAL) {
|
|
/* Set initialisation */
|
|
CANx->CTLR = (uint32_t)((CANx->CTLR & (uint32_t)(~(uint32_t)CAN_CTLR_SWM)) | CAN_CTLR_IWM);
|
|
|
|
/* Wait the acknowledge */
|
|
while (((CANx->STR & CAN_MODE_MASK) != CAN_STR_IWS) && (timeout != 0)) {
|
|
timeout--;
|
|
}
|
|
if ((CANx->STR & CAN_MODE_MASK) != CAN_STR_IWS) {
|
|
state = CAN_MODESTATE_FAILED;
|
|
} else {
|
|
state = CAN_MODESTATE_SUCCESS;
|
|
}
|
|
} else if (CAN_WorkingMode == CAN_WORKINGMODE_NORMAL) {
|
|
/* Enter Normal mode */
|
|
CANx->CTLR &= (uint32_t)(~(CAN_CTLR_SWM | CAN_CTLR_IWM));
|
|
|
|
/* Wait the acknowledge */
|
|
while (((CANx->STR & CAN_MODE_MASK) != 0) && (timeout != 0)) {
|
|
timeout--;
|
|
}
|
|
if ((CANx->STR & CAN_MODE_MASK) != 0) {
|
|
state = CAN_MODESTATE_FAILED;
|
|
} else {
|
|
state = CAN_MODESTATE_SUCCESS;
|
|
}
|
|
} else if (CAN_WorkingMode == CAN_WORKINGMODE_SLEEP) {
|
|
/* Set Sleep mode */
|
|
CANx->CTLR = (uint32_t)((CANx->CTLR & (uint32_t)(~(uint32_t)CAN_CTLR_IWM)) | CAN_CTLR_SWM);
|
|
|
|
/* Wait the acknowledge */
|
|
while (((CANx->STR & CAN_MODE_MASK) != CAN_STR_SWS) && (timeout != 0)) {
|
|
timeout--;
|
|
}
|
|
if ((CANx->STR & CAN_MODE_MASK) != CAN_STR_SWS) {
|
|
state = CAN_MODESTATE_FAILED;
|
|
} else {
|
|
state = CAN_MODESTATE_SUCCESS;
|
|
}
|
|
} else {
|
|
state = CAN_MODESTATE_FAILED;
|
|
}
|
|
|
|
return (uint8_t) state;
|
|
}
|
|
|
|
/**
|
|
* @brief Enter the Sleep mode.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @retval state: CAN_SLEEP_OK or CAN_SLEEP_FAILED.
|
|
*/
|
|
uint8_t CAN_EnterSleep(CAN_TypeDef *CANx)
|
|
{
|
|
/* Set Sleep mode */
|
|
CANx->CTLR = (((CANx->CTLR) & (uint32_t)(~(uint32_t)CAN_CTLR_IWM)) | CAN_CTLR_SWM);
|
|
|
|
if ((CANx->STR & (CAN_STR_SWS | CAN_STR_IWS)) == CAN_STR_SWS) {
|
|
/* Sleep mode entered success*/
|
|
return (uint8_t)CAN_SLEEP_OK;
|
|
} else {
|
|
/* Sleep mode entered failure */
|
|
return (uint8_t)CAN_SLEEP_FAILED;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Wake up CAN.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @retval status: CAN_WAKEUP_OK or CAN_WAKEUP_FAILED.
|
|
*/
|
|
uint8_t CAN_WakeUp(CAN_TypeDef *CANx)
|
|
{
|
|
uint32_t wait_sws = SWS_TIMEOUT;
|
|
|
|
/*set wake up */
|
|
CANx->CTLR &= ~(uint32_t)CAN_CTLR_SWM;
|
|
|
|
/* Sleep mode state */
|
|
while (((CANx->CTLR & CAN_CTLR_SWM) == CAN_CTLR_SWM) && (wait_sws != 0x00)) {
|
|
wait_sws--;
|
|
}
|
|
if ((CANx->CTLR & CAN_CTLR_SWM) != CAN_CTLR_SWM) {
|
|
/*Sleep mode exited */
|
|
return (uint8_t)CAN_WAKEUP_OK;
|
|
} else {
|
|
/*Sleep mode exited failure */
|
|
return (uint8_t)CAN_WAKEUP_FAILED;
|
|
}
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Return the CANx's last error type (LEC).
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @retval CAN_ErrorType: specify the Error type:
|
|
* @arg CAN_ERRORTYPE_NOERR
|
|
* @arg CAN_ERRORTYPE_STUFFERR
|
|
* @arg CAN_ERRORTYPE_FORMERR
|
|
* @arg CAN_ERRORTYPE_ACKERR
|
|
* @arg CAN_ERRORTYPE_BITRECESSIVEERR
|
|
* @arg CAN_ERRORTYPE_BITDOMINANTERR
|
|
* @arg CAN_ERRORTYPE_CRCERR
|
|
* @arg CAN_ERRORTYPE_SOFTWARESETERR
|
|
*/
|
|
|
|
uint8_t CAN_GetErrorType(CAN_TypeDef *CANx)
|
|
{
|
|
uint8_t error_type = 0;
|
|
|
|
/* Get the error type*/
|
|
error_type = (((uint8_t)CANx->ER) & (uint8_t)CAN_ER_ET);
|
|
|
|
/* Return the error type*/
|
|
return error_type;
|
|
}
|
|
|
|
/**
|
|
* @brief Get the Counter of CANx Receive Error(REC).
|
|
* @note According to the error condition as defined by the CAN standard,
|
|
* the counter of CANx Receive Error is increased by 1 or by 8.
|
|
* When CAN received success everytime, the counter is decreased by 1
|
|
* or reset to 120 if its value was over than 128.
|
|
* When the counter value is over 127, the CAN controller enters the
|
|
* error passive state.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @retval CAN Receive Error Counter.
|
|
*/
|
|
uint8_t CAN_GetReceiveErrorCounter(CAN_TypeDef *CANx)
|
|
{
|
|
uint8_t receive_counter = 0;
|
|
|
|
/* Get the counter of CANx Receive Error*/
|
|
receive_counter = (uint8_t)((CANx->ER & CAN_ER_REC) >> 24);
|
|
|
|
/* Return the Receive Error Counter*/
|
|
return receive_counter;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Get the Counter of CANx Transmit Error (TEC).
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @retval CAN Transmit Error Counter.
|
|
*/
|
|
uint8_t CAN_GetTransmitErrorCounter(CAN_TypeDef *CANx)
|
|
{
|
|
uint8_t transmit_counter = 0;
|
|
|
|
/* Get the Counter of CANx Transmit Error(TEC) */
|
|
transmit_counter = (uint8_t)((CANx->ER & CAN_ER_TEC) >> 16);
|
|
|
|
/* Return the Transmit Error Counter*/
|
|
return transmit_counter;
|
|
}
|
|
|
|
|
|
/**
|
|
* @brief Enable or disable the specified CANx interrupts.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param CAN_INT: specify the CAN interrupt sources to be enabled or disabled.
|
|
* This parameter can be:
|
|
* @arg CAN_INT_TME
|
|
* @arg CAN_INT_RFNE0
|
|
* @arg CAN_INT_RFF0
|
|
* @arg CAN_INT_RFO0
|
|
* @arg CAN_INT_RFNE1
|
|
* @arg CAN_INT_RFF1
|
|
* @arg CAN_INT_RFO1
|
|
* @arg CAN_INT_WE
|
|
* @arg CAN_INT_PE
|
|
* @arg CAN_INT_BOE
|
|
* @arg CAN_INT_ET
|
|
* @arg CAN_INT_ERR
|
|
* @arg CAN_INT_WU
|
|
* @arg CAN_INT_SLP
|
|
* @param NewValue: new state of the CAN interrupts.
|
|
* This parameter can be: ENABLE or DISABLE.
|
|
* @retval None.
|
|
*/
|
|
void CAN_INTConfig(CAN_TypeDef *CANx, uint32_t CAN_INT, TypeState NewValue)
|
|
{
|
|
if (NewValue != DISABLE) {
|
|
/* Enable interrupt */
|
|
CANx->IER |= CAN_INT;
|
|
} else {
|
|
/* Disable interrupt */
|
|
CANx->IER &= ~CAN_INT;
|
|
}
|
|
}
|
|
/**
|
|
* @brief Check whether the specified CAN flag is set or not.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param CAN_FLAG: specify the flag to check.
|
|
* This parameter can be one of the following flags:
|
|
* @arg CAN_FLAG_WE: Warning error Flag
|
|
* @arg CAN_FLAG_PE: Passive error Flag
|
|
* @arg CAN_FLAG_BOE: Bus-off error Flag
|
|
* @arg CAN_FLAG_MTF0: Mailbox 0 transmit finished Flag
|
|
* @arg CAN_FLAG_MTF1: Mailbox 1 transmit finished Flag
|
|
* @arg CAN_FLAG_MTF2: Mailbox 2 transmit finished Flag
|
|
* @arg CAN_FLAG_RFL0: the length of the receive FIFO0 Flag
|
|
* @arg CAN_FLAG_RFF0: Receive FIFO 0 full Flag
|
|
* @arg CAN_FLAG_RFO0: Receive FIFO 0 overfull Flag
|
|
* @arg CAN_FLAG_RFL1: the length of the receive FIFO1 Flag
|
|
* @arg CAN_FLAG_RFF1: Receive FIFO 1 full Flag
|
|
* @arg CAN_FLAG_RFO1: Receive FIFO 0 overfull Flag
|
|
* @arg CAN_FLAG_WU: Wake up Flag
|
|
* @arg CAN_FLAG_SLP: Sleep working state Flag
|
|
* @arg CAN_FLAG_ET: Error type Flag
|
|
* @retval The new state of CAN_FLAG (SET or RESET).
|
|
*/
|
|
TypeState CAN_GetBitState(CAN_TypeDef *CANx, uint32_t CAN_FLAG)
|
|
{
|
|
if ((CAN_FLAG & CAN_FLAGS_ER) != (uint32_t)RESET) {
|
|
/* Check the state of the specified CAN flag */
|
|
if ((CANx->ER & (CAN_FLAG & CAN_FLAG_Mask)) != (uint32_t)RESET) {
|
|
/* CAN_FLAG is set */
|
|
return SET;
|
|
} else {
|
|
/* CAN_FLAG is reset */
|
|
return RESET;
|
|
}
|
|
} else if ((CAN_FLAG & CAN_FLAGS_STR) != (uint32_t)RESET) {
|
|
/* Check the state of the specified CAN flag */
|
|
if ((CANx->STR & (CAN_FLAG & CAN_FLAG_Mask)) != (uint32_t)RESET) {
|
|
/* CAN_FLAG is set */
|
|
return SET;
|
|
} else {
|
|
/* CAN_FLAG is reset */
|
|
return RESET;
|
|
}
|
|
} else if ((CAN_FLAG & CAN_FLAGS_TSTR) != (uint32_t)RESET) {
|
|
/* Check the state of the specified CAN flag */
|
|
if ((CANx->TSTR & (CAN_FLAG & CAN_FLAG_Mask)) != (uint32_t)RESET) {
|
|
/* CAN_FLAG is set */
|
|
return SET;
|
|
} else {
|
|
/* CAN_FLAG is reset */
|
|
return RESET;
|
|
}
|
|
} else if ((CAN_FLAG & CAN_FLAGS_RFR0) != (uint32_t)RESET) {
|
|
/* Check the state of the specified CAN flag */
|
|
if ((CANx->RFR0 & (CAN_FLAG & CAN_FLAG_Mask)) != (uint32_t)RESET) {
|
|
/* CAN_FLAG is set */
|
|
return SET;
|
|
} else {
|
|
/* CAN_FLAG is reset */
|
|
return RESET;
|
|
}
|
|
}
|
|
/* If(CAN_FLAG & CAN_FLAGS_RFR1 != (uint32_t)RESET) */
|
|
else {
|
|
/* Check the state of the specified CAN flag */
|
|
if ((uint32_t)(CANx->RFR1 & (CAN_FLAG & CAN_FLAG_Mask)) != (uint32_t)RESET) {
|
|
/* CAN_FLAG is set */
|
|
return SET;
|
|
} else {
|
|
/* CAN_FLAG is reset */
|
|
return RESET;
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the CAN's flags.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param CAN_FLAG: specify the flag to clear.
|
|
* This parameter can be one of the following flags:
|
|
* @arg CAN_FLAG_MTF0: Mailbox 0 transmit finished Flag
|
|
* @arg CAN_FLAG_MTF1: Mailbox 1 transmit finished Flag
|
|
* @arg CAN_FLAG_MTF2: Mailbox 2 transmit finished Flag
|
|
* @arg CAN_FLAG_RFF0: Receive FIFO 0 full Flag
|
|
* @arg CAN_FLAG_RFO0: Receive FIFO 0 overfull Flag
|
|
* @arg CAN_FLAG_RFF1: Receive FIFO 1 full Flag
|
|
* @arg CAN_FLAG_RFO1: Receive FIFO 0 overfull Flag
|
|
* @arg CAN_FLAG_WU: Wake up Flag
|
|
* @arg CAN_FLAG_SLP: Sleep working state Flag
|
|
* @arg CAN_FLAG_ET: Error type Flag
|
|
* @retval None.
|
|
*/
|
|
void CAN_ClearBitState(CAN_TypeDef *CANx, uint32_t CAN_FLAG)
|
|
{
|
|
uint32_t temp = 0;
|
|
|
|
/* ER register */
|
|
if (CAN_FLAG == CAN_FLAG_ET) {
|
|
/* Clear the selected CAN flags */
|
|
CANx->ER = (uint32_t)RESET;
|
|
}
|
|
/* STR or TSTR or RFR0 or RFR1 */
|
|
else {
|
|
temp = CAN_FLAG & CAN_FLAG_Mask;
|
|
|
|
if ((CAN_FLAG & CAN_FLAGS_RFR0) != (uint32_t)RESET) {
|
|
/* Receive Flags */
|
|
CANx->RFR0 = (uint32_t)(temp);
|
|
} else if ((CAN_FLAG & CAN_FLAGS_RFR1) != (uint32_t)RESET) {
|
|
/* Receive Flags */
|
|
CANx->RFR1 = (uint32_t)(temp);
|
|
} else if ((CAN_FLAG & CAN_FLAGS_TSTR) != (uint32_t)RESET) {
|
|
/* Transmit Flags */
|
|
CANx->TSTR = (uint32_t)(temp);
|
|
}
|
|
/* If((CAN_FLAG & CAN_FLAGS_STR)!=(uint32_t)RESET) */
|
|
else {
|
|
CANx->STR = (uint32_t)(temp);
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Check whether the specified CANx interrupt has occurred or not.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param CAN_INT: specify the CAN interrupt source to check.
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* This parameter can be:
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|
* @arg CAN_INT_TME
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|
* @arg CAN_INT_RFNE0
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* @arg CAN_INT_RFF0
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* @arg CAN_INT_RFO0
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* @arg CAN_INT_RFNE1
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* @arg CAN_INT_RFF1
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* @arg CAN_INT_RFO1
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* @arg CAN_INT_WE
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* @arg CAN_INT_PE
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* @arg CAN_INT_BOE
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* @arg CAN_INT_ET
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* @arg CAN_INT_ERR
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* @arg CAN_INT_WU
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* @arg CAN_INT_SLP
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* @retval The current state of CAN_INT (SET or RESET).
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|
*/
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|
TypeState CAN_GetIntBitState(CAN_TypeDef *CANx, uint32_t CAN_INT)
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|
{
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|
TypeState intstate = RESET;
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|
|
|
/* Get the enable interrupt bit */
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if ((CANx->IER & CAN_INT) != RESET) {
|
|
switch (CAN_INT) {
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case CAN_INT_TME:
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|
/* Check CAN_TSTR_MTFx bits */
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|
intstate = CheckINTState(CANx->TSTR, CAN_TSTR_MTF0 | CAN_TSTR_MTF1 | CAN_TSTR_MTF2);
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break;
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|
case CAN_INT_RFNE0:
|
|
/* Check CAN_RFR0_RFL0 bit */
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|
intstate = CheckINTState(CANx->RFR0, CAN_RFR0_RFL0);
|
|
break;
|
|
case CAN_INT_RFF0:
|
|
/* Check CAN_RFR0_RFF0 bit */
|
|
intstate = CheckINTState(CANx->RFR0, CAN_RFR0_RFF0);
|
|
break;
|
|
case CAN_INT_RFO0:
|
|
/* Check CAN_RFR0_RFO0 bit */
|
|
intstate = CheckINTState(CANx->RFR0, CAN_RFR0_RFO0);
|
|
break;
|
|
case CAN_INT_RFNE1:
|
|
/* Check CAN_RFR1_RFL1 bit */
|
|
intstate = CheckINTState(CANx->RFR1, CAN_RFR1_RFL1);
|
|
break;
|
|
case CAN_INT_RFF1:
|
|
/* Check CAN_RFR1_RFF1 bit */
|
|
intstate = CheckINTState(CANx->RFR1, CAN_RFR1_RFF1);
|
|
break;
|
|
case CAN_INT_RFO1:
|
|
/* Check CAN_RFR1_RFO1 bit */
|
|
intstate = CheckINTState(CANx->RFR1, CAN_RFR1_RFO1);
|
|
break;
|
|
case CAN_INT_WU:
|
|
/* Check CAN_STR_WIF bit */
|
|
intstate = CheckINTState(CANx->STR, CAN_STR_WIF);
|
|
break;
|
|
case CAN_INT_SLP:
|
|
/* Check CAN_STR_SEIF bit */
|
|
intstate = CheckINTState(CANx->STR, CAN_STR_SEIF);
|
|
break;
|
|
case CAN_INT_WE:
|
|
/* Check CAN_INT_WE bit */
|
|
intstate = CheckINTState(CANx->ER, CAN_ER_WE);
|
|
break;
|
|
case CAN_INT_PE:
|
|
/* Check CAN_INT_EP bit */
|
|
intstate = CheckINTState(CANx->ER, CAN_ER_PE);
|
|
break;
|
|
case CAN_INT_BOE:
|
|
/* Check CAN_ER_BOE bit */
|
|
intstate = CheckINTState(CANx->ER, CAN_ER_BOE);
|
|
break;
|
|
case CAN_INT_ET:
|
|
/* Check CAN_ER_ET bit */
|
|
intstate = CheckINTState(CANx->ER, CAN_ER_ET);
|
|
break;
|
|
case CAN_INT_ERR:
|
|
/* Check CAN_STR_EIF bit */
|
|
intstate = CheckINTState(CANx->STR, CAN_STR_EIF);
|
|
break;
|
|
default :
|
|
/* in case of error, return RESET */
|
|
intstate = RESET;
|
|
break;
|
|
}
|
|
} else {
|
|
/* in case the Interrupt is not enabled, return RESET */
|
|
intstate = RESET;
|
|
}
|
|
|
|
/* Return the CAN_INT status */
|
|
return intstate;
|
|
}
|
|
|
|
/**
|
|
* @brief Clear the CANx's interrupt pending bits.
|
|
* @param CANx: where x:[1,2] to to select the CAN peripheral.
|
|
* @param CAN_INT: specify the interrupt pending bit to clear.
|
|
* This parameter can be:
|
|
* @arg CAN_INT_TME
|
|
* @arg CAN_INT_RFF0
|
|
* @arg CAN_INT_RFO0
|
|
* @arg CAN_INT_RFF1
|
|
* @arg CAN_INT_RFO1
|
|
* @arg CAN_INT_WE
|
|
* @arg CAN_INT_PE
|
|
* @arg CAN_INT_BOE
|
|
* @arg CAN_INT_ET
|
|
* @arg CAN_INT_ERR
|
|
* @arg CAN_INT_WU
|
|
* @arg CAN_INT_SLP
|
|
* @retval None.
|
|
*/
|
|
void CAN_ClearIntBitState(CAN_TypeDef *CANx, uint32_t CAN_INT)
|
|
{
|
|
switch (CAN_INT) {
|
|
case CAN_INT_TME:
|
|
/* Clear CAN_TSTR_MTFx (rc_w1)*/
|
|
CANx->TSTR = CAN_TSTR_MTF0 | CAN_TSTR_MTF1 | CAN_TSTR_MTF2;
|
|
break;
|
|
case CAN_INT_RFF0:
|
|
/* Clear CAN_RFR0_RFF0 (rc_w1)*/
|
|
CANx->RFR0 = CAN_RFR0_RFF0;
|
|
break;
|
|
case CAN_INT_RFO0:
|
|
/* Clear CAN_RFR0_RFO0 (rc_w1)*/
|
|
CANx->RFR0 = CAN_RFR0_RFO0;
|
|
break;
|
|
case CAN_INT_RFF1:
|
|
/* Clear CAN_RFR1_RFF1 (rc_w1)*/
|
|
CANx->RFR1 = CAN_RFR1_RFF1;
|
|
break;
|
|
case CAN_INT_RFO1:
|
|
/* Clear CAN_RFR1_RFO1 (rc_w1)*/
|
|
CANx->RFR1 = CAN_RFR1_RFO1;
|
|
break;
|
|
case CAN_INT_WU:
|
|
/* Clear CAN_STR_WIF (rc_w1)*/
|
|
CANx->STR = CAN_STR_WIF;
|
|
break;
|
|
case CAN_INT_SLP:
|
|
/* Clear CAN_STR_SEIF (rc_w1)*/
|
|
CANx->STR = CAN_STR_SEIF;
|
|
break;
|
|
case CAN_INT_WE:
|
|
/* Clear CAN_STR_EIF (rc_w1) */
|
|
CANx->STR = CAN_STR_EIF;
|
|
break;
|
|
case CAN_INT_PE:
|
|
/* Clear CAN_MSR_ERRI (rc_w1) */
|
|
CANx->STR = CAN_STR_EIF;
|
|
break;
|
|
case CAN_INT_BOE:
|
|
/* Clear CAN_STR_EIF (rc_w1) */
|
|
CANx->STR = CAN_STR_EIF;
|
|
break;
|
|
case CAN_INT_ET:
|
|
/* Clear ET bits */
|
|
CANx->ER = RESET;
|
|
/* Clear CAN_STR_EIF (rc_w1) */
|
|
CANx->STR = CAN_STR_EIF;
|
|
break;
|
|
case CAN_INT_ERR:
|
|
/*Clear ET bits */
|
|
CANx->ER = RESET;
|
|
/* Clear CAN_STR_EIF (rc_w1) */
|
|
CANx->STR = CAN_STR_EIF;
|
|
break;
|
|
default :
|
|
break;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @brief Check whether the CAN interrupt has occurred or not.
|
|
* @param CAN_Reg: the register of CAN interrupt to check.
|
|
* @param Int_Bit: the bit of interrupt source to check.
|
|
* @retval The new state of the CAN Interrupt (SET or RESET).
|
|
*/
|
|
static TypeState CheckINTState(uint32_t CAN_Reg, uint32_t Int_Bit)
|
|
{
|
|
if ((CAN_Reg & Int_Bit) != (uint32_t)RESET) {
|
|
/* CAN_INT is set */
|
|
return SET;
|
|
} else {
|
|
/* CAN_IT is reset */
|
|
return RESET;
|
|
}
|
|
}
|
|
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|