409 lines
14 KiB
C
409 lines
14 KiB
C
/*
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* Copyright (c) 2006-2022, Synwit Technology Co.,Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-07-01 lik first version
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*/
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#include "drv_pwm.h"
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#ifdef RT_USING_PWM
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#ifdef BSP_USING_PWM
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//#define DRV_DEBUG
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#define LOG_TAG "drv.pwm"
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#include <drv_log.h>
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#if !defined(BSP_USING_PWM0) && !defined(BSP_USING_PWM1) && !defined(BSP_USING_PWM2) && !defined(BSP_USING_PWM3) && !defined(BSP_USING_PWM4)
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#error "Please define at least one BSP_USING_PWMx"
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/* this driver can be disabled at menuconfig ? RT-Thread Components ? Device Drivers */
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#endif
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#define MIN_PERIOD 2
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#define MIN_PULSE 1
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#ifdef BSP_USING_PWM0
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#ifndef PWM0_CFG
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#define PWM0_CFG \
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{ \
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.name = "pwm0", \
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.PWMx = PWM0, \
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.pwm_initstruct.Mode = PWM_CENTER_ALIGNED, \
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.pwm_initstruct.Clkdiv = 15, \
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.pwm_initstruct.Period = 10000, \
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.pwm_initstruct.HdutyA = 5000, \
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.pwm_initstruct.DeadzoneA = 0, \
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.pwm_initstruct.IdleLevelA = 0, \
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.pwm_initstruct.IdleLevelAN = 0, \
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.pwm_initstruct.OutputInvA = 0, \
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.pwm_initstruct.OutputInvAN = 1, \
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.pwm_initstruct.HdutyB = 5000, \
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.pwm_initstruct.DeadzoneB = 0, \
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.pwm_initstruct.IdleLevelB = 0, \
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.pwm_initstruct.IdleLevelBN = 0, \
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.pwm_initstruct.OutputInvB = 0, \
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.pwm_initstruct.OutputInvBN = 1, \
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.pwm_initstruct.UpOvfIE = 0, \
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.pwm_initstruct.DownOvfIE = 0, \
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.pwm_initstruct.UpCmpAIE = 0, \
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.pwm_initstruct.DownCmpAIE = 0, \
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.pwm_initstruct.UpCmpBIE = 0, \
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.pwm_initstruct.DownCmpBIE = 0, \
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.pwm_mask = PWM0_MSK, \
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}
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#endif /* PWM0_CFG */
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#endif /* BSP_USING_PWM0 */
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#ifdef BSP_USING_PWM1
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#ifndef PWM1_CFG
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#define PWM1_CFG \
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{ \
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.name = "pwm1", \
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.PWMx = PWM1, \
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.pwm_initstruct.Mode = PWM_CENTER_ALIGNED, \
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.pwm_initstruct.Clkdiv = 15, \
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.pwm_initstruct.Period = 10000, \
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.pwm_initstruct.HdutyA = 5000, \
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.pwm_initstruct.DeadzoneA = 0, \
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.pwm_initstruct.IdleLevelA = 0, \
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.pwm_initstruct.IdleLevelAN = 0, \
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.pwm_initstruct.OutputInvA = 0, \
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.pwm_initstruct.OutputInvAN = 1, \
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.pwm_initstruct.HdutyB = 5000, \
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.pwm_initstruct.DeadzoneB = 0, \
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.pwm_initstruct.IdleLevelB = 0, \
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.pwm_initstruct.IdleLevelBN = 0, \
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.pwm_initstruct.OutputInvB = 0, \
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.pwm_initstruct.OutputInvBN = 1, \
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.pwm_initstruct.UpOvfIE = 0, \
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.pwm_initstruct.DownOvfIE = 0, \
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.pwm_initstruct.UpCmpAIE = 0, \
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.pwm_initstruct.DownCmpAIE = 0, \
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.pwm_initstruct.UpCmpBIE = 0, \
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.pwm_initstruct.DownCmpBIE = 0, \
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.pwm_mask = PWM1_MSK, \
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}
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#endif /* PWM1_CFG */
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#endif /* BSP_USING_PWM1 */
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#ifdef BSP_USING_PWM2
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#ifndef PWM2_CFG
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#define PWM2_CFG \
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{ \
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.name = "pwm2", \
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.PWMx = PWM2, \
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.pwm_initstruct.Mode = PWM_CENTER_ALIGNED, \
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.pwm_initstruct.Clkdiv = 15, \
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.pwm_initstruct.Period = 10000, \
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.pwm_initstruct.HdutyA = 5000, \
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.pwm_initstruct.DeadzoneA = 0, \
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.pwm_initstruct.IdleLevelA = 0, \
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.pwm_initstruct.IdleLevelAN = 0, \
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.pwm_initstruct.OutputInvA = 0, \
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.pwm_initstruct.OutputInvAN = 1, \
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.pwm_initstruct.HdutyB = 5000, \
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.pwm_initstruct.DeadzoneB = 0, \
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.pwm_initstruct.IdleLevelB = 0, \
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.pwm_initstruct.IdleLevelBN = 0, \
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.pwm_initstruct.OutputInvB = 0, \
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.pwm_initstruct.OutputInvBN = 1, \
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.pwm_initstruct.UpOvfIE = 0, \
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.pwm_initstruct.DownOvfIE = 0, \
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.pwm_initstruct.UpCmpAIE = 0, \
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.pwm_initstruct.DownCmpAIE = 0, \
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.pwm_initstruct.UpCmpBIE = 0, \
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.pwm_initstruct.DownCmpBIE = 0, \
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.pwm_mask = PWM2_MSK, \
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}
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#endif /* PWM2_CFG */
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#endif /* BSP_USING_PWM2 */
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#ifdef BSP_USING_PWM3
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#ifndef PWM3_CFG
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#define PWM3_CFG \
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{ \
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.name = "pwm3", \
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.PWMx = PWM3, \
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.pwm_initstruct.Mode = PWM_CENTER_ALIGNED, \
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.pwm_initstruct.Clkdiv = 15, \
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.pwm_initstruct.Period = 10000, \
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.pwm_initstruct.HdutyA = 5000, \
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.pwm_initstruct.DeadzoneA = 0, \
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.pwm_initstruct.IdleLevelA = 0, \
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.pwm_initstruct.IdleLevelAN = 0, \
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.pwm_initstruct.OutputInvA = 0, \
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.pwm_initstruct.OutputInvAN = 1, \
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.pwm_initstruct.HdutyB = 5000, \
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.pwm_initstruct.DeadzoneB = 0, \
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.pwm_initstruct.IdleLevelB = 0, \
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.pwm_initstruct.IdleLevelBN = 0, \
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.pwm_initstruct.OutputInvB = 0, \
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.pwm_initstruct.OutputInvBN = 1, \
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.pwm_initstruct.UpOvfIE = 0, \
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.pwm_initstruct.DownOvfIE = 0, \
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.pwm_initstruct.UpCmpAIE = 0, \
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.pwm_initstruct.DownCmpAIE = 0, \
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.pwm_initstruct.UpCmpBIE = 0, \
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.pwm_initstruct.DownCmpBIE = 0, \
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.pwm_mask = PWM3_MSK, \
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}
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#endif /* PWM3_CFG */
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#endif /* BSP_USING_PWM3 */
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#ifdef BSP_USING_PWM4
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#ifndef PWM4_CFG
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#define PWM4_CFG \
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{ \
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.name = "pwm4", \
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.PWMx = PWM4, \
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.pwm_initstruct.Mode = PWM_CENTER_ALIGNED, \
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.pwm_initstruct.Clkdiv = 15, \
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.pwm_initstruct.Period = 10000, \
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.pwm_initstruct.HdutyA = 5000, \
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.pwm_initstruct.DeadzoneA = 0, \
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.pwm_initstruct.IdleLevelA = 0, \
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.pwm_initstruct.IdleLevelAN = 0, \
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.pwm_initstruct.OutputInvA = 0, \
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.pwm_initstruct.OutputInvAN = 1, \
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.pwm_initstruct.HdutyB = 5000, \
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.pwm_initstruct.DeadzoneB = 0, \
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.pwm_initstruct.IdleLevelB = 0, \
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.pwm_initstruct.IdleLevelBN = 0, \
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.pwm_initstruct.OutputInvB = 0, \
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.pwm_initstruct.OutputInvBN = 1, \
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.pwm_initstruct.UpOvfIE = 0, \
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.pwm_initstruct.DownOvfIE = 0, \
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.pwm_initstruct.UpCmpAIE = 0, \
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.pwm_initstruct.DownCmpAIE = 0, \
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.pwm_initstruct.UpCmpBIE = 0, \
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.pwm_initstruct.DownCmpBIE = 0, \
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.pwm_mask = PWM4_MSK, \
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}
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#endif /* PWM4_CFG */
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#endif /* BSP_USING_PWM4 */
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struct swm_pwm_cfg
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{
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const char *name;
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PWM_TypeDef *PWMx;
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PWM_InitStructure pwm_initstruct;
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uint32_t pwm_mask;
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};
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struct swm_pwm_device
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{
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struct swm_pwm_cfg *pwm_cfg;
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struct rt_device_pwm pwm_device;
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};
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static struct swm_pwm_cfg swm_pwm_cfg[] =
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{
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#ifdef BSP_USING_PWM0
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PWM0_CFG,
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#endif
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#ifdef BSP_USING_PWM1
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PWM1_CFG,
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#endif
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#ifdef BSP_USING_PWM2
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PWM2_CFG,
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#endif
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#ifdef BSP_USING_PWM3
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PWM3_CFG,
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#endif
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#ifdef BSP_USING_PWM4
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PWM4_CFG,
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#endif
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};
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static struct swm_pwm_device pwm_obj[sizeof(swm_pwm_cfg) / sizeof(swm_pwm_cfg[0])] = {0};
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static rt_err_t swm_pwm_enable(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration, rt_bool_t enable)
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{
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struct swm_pwm_cfg *pwm_cfg = RT_NULL;
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RT_ASSERT(pwm_device != RT_NULL);
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pwm_cfg = pwm_device->parent.user_data;
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if (!enable)
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{
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PWM_Stop(pwm_cfg->pwm_mask);
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}
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else
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{
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PWM_Start(pwm_cfg->pwm_mask);
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}
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return RT_EOK;
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}
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static rt_err_t swm_pwm_get(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration)
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{
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rt_uint64_t tim_clock;
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struct swm_pwm_cfg *pwm_cfg = RT_NULL;
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RT_ASSERT(pwm_device != RT_NULL);
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pwm_cfg = pwm_device->parent.user_data;
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configuration->period = PWM_GetPeriod(pwm_cfg->PWMx) * 1000UL; //中心对称模式下频率降低一半
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configuration->pulse = PWM_GetHDuty(pwm_cfg->PWMx, configuration->channel) * 1000UL;
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return RT_EOK;
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}
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static rt_err_t swm_pwm_set(struct rt_device_pwm *pwm_device, struct rt_pwm_configuration *configuration)
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{
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rt_uint32_t period, pulse;
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rt_uint64_t tim_clock;
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struct swm_pwm_cfg *pwm_cfg = RT_NULL;
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RT_ASSERT(pwm_device != RT_NULL);
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pwm_cfg = pwm_device->parent.user_data;
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period = (unsigned long long)configuration->period / 1000UL; //中心对称模式下频率降低一半
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pulse = (unsigned long long)configuration->pulse / 1000UL;
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if (period < MIN_PERIOD)
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{
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period = MIN_PERIOD;
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}
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if (pulse < MIN_PULSE)
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{
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pulse = MIN_PULSE;
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}
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PWM_SetPeriod(pwm_cfg->PWMx, period);
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PWM_SetHDuty(pwm_cfg->PWMx, PWM_CH_A, pulse);
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PWM_SetHDuty(pwm_cfg->PWMx, PWM_CH_B, pulse);
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return RT_EOK;
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}
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static rt_err_t swm_pwm_control(struct rt_device_pwm *pwm_device, int cmd, void *arg)
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{
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RT_ASSERT(pwm_device != RT_NULL);
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struct rt_pwm_configuration *configuration = (struct rt_pwm_configuration *)arg;
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switch (cmd)
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{
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case PWM_CMD_ENABLE:
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return swm_pwm_enable(pwm_device, configuration, RT_TRUE);
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case PWM_CMD_DISABLE:
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return swm_pwm_enable(pwm_device, configuration, RT_FALSE);
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case PWM_CMD_SET:
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return swm_pwm_set(pwm_device, configuration);
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case PWM_CMD_GET:
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return swm_pwm_get(pwm_device, configuration);
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default:
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return -RT_EINVAL;
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}
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}
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static const struct rt_pwm_ops pwm_ops =
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{
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.control = swm_pwm_control};
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int swm_pwm_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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for (i = 0; i < sizeof(swm_pwm_cfg) / sizeof(swm_pwm_cfg[0]); i++)
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{
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pwm_obj[i].pwm_cfg = &swm_pwm_cfg[i];
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if (pwm_obj[i].pwm_cfg->PWMx == PWM0)
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{
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#ifdef BSP_USING_PWM0A
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PORT_Init(PORTM, PIN1, PORTM_PIN1_PWM0A, 0);
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#endif
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#ifdef BSP_USING_PWM0AN
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PORT_Init(PORTM, PIN4, PORTM_PIN4_PWM0AN, 0);
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#endif
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#ifdef BSP_USING_PWM0B
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PORT_Init(PORTM, PIN2, PORTM_PIN2_PWM0B, 0);
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#endif
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#ifdef BSP_USING_PWM0BN
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PORT_Init(PORTM, PIN5, PORTM_PIN5_PWM0BN, 0);
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#endif
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}
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else if (pwm_obj[i].pwm_cfg->PWMx == PWM1)
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{
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#ifdef BSP_USING_PWM1A
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PORT_Init(PORTM, PIN3, PORTM_PIN3_PWM1A, 0);
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#endif
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#ifdef BSP_USING_PWM1AN
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PORT_Init(PORTM, PIN6, PORTM_PIN6_PWM1AN, 0);
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#endif
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#ifdef BSP_USING_PWM1B
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PORT_Init(PORTD, PIN9, PORTD_PIN9_PWM1B, 0);
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#endif
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#ifdef BSP_USING_PWM1BN
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PORT_Init(PORTD, PIN8, PORTD_PIN8_PWM1BN, 0);
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#endif
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}
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else if (pwm_obj[i].pwm_cfg->PWMx == PWM2)
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{
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#ifdef BSP_USING_PWM2A
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PORT_Init(PORTM, PIN12, PORTM_PIN12_PWM2A, 0);
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#endif
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#ifdef BSP_USING_PWM2AN
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PORT_Init(PORTM, PIN9, PORTM_PIN9_PWM2AN, 0);
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#endif
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#ifdef BSP_USING_PWM2B
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PORT_Init(PORTM, PIN11, PORTM_PIN11_PWM2B, 0);
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#endif
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#ifdef BSP_USING_PWM2BN
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PORT_Init(PORTM, PIN8, PORTM_PIN8_PWM2BN, 0);
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#endif
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}
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else if (pwm_obj[i].pwm_cfg->PWMx == PWM3)
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{
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#ifdef BSP_USING_PWM3A
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PORT_Init(PORTC, PIN2, PORTC_PIN2_PWM3A, 0);
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#endif
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#ifdef BSP_USING_PWM3AN
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PORT_Init(PORTC, PIN3, PORTC_PIN3_PWM3AN, 0);
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#endif
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#ifdef BSP_USING_PWM3B
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PORT_Init(PORTB, PIN1, PORTB_PIN1_PWM3B, 0);
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#endif
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#ifdef BSP_USING_PWM3BN
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PORT_Init(PORTB, PIN0, PORTB_PIN0_PWM3BN, 0);
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#endif
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}
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else if (pwm_obj[i].pwm_cfg->PWMx == PWM4)
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{
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#ifdef BSP_USING_PWM4A
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PORT_Init(PORTB, PIN15, PORTB_PIN15_PWM4A, 0);
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#endif
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#ifdef BSP_USING_PWM4AN
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// PORT_Init(PORTB, PIN14, PORTB_PIN14_PWM4AN, 0); //SWDIO
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#endif
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#ifdef BSP_USING_PWM4B
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PORT_Init(PORTB, PIN13, PORTB_PIN13_PWM4B, 0);
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#endif
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#ifdef BSP_USING_PWM4BN
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// PORT_Init(PORTB, PIN12, PORTB_PIN12_PWM4BN, 0); //SWDCK
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#endif
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}
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pwm_obj[i].pwm_cfg->pwm_initstruct.Clkdiv = SystemCoreClock / 1000000UL / 2; //中心对称模式下频率降低一半
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PWM_Init(pwm_obj[i].pwm_cfg->PWMx, &(pwm_obj[i].pwm_cfg->pwm_initstruct));
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result = rt_device_pwm_register(&pwm_obj[i].pwm_device, pwm_obj[i].pwm_cfg->name, &pwm_ops, pwm_obj[i].pwm_cfg);
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if(result != RT_EOK)
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{
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LOG_E("%s register fail.", pwm_obj[i].pwm_cfg->name);
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}
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else
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{
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LOG_D("%s register success.", pwm_obj[i].pwm_cfg->name);
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}
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}
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return result;
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}
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INIT_DEVICE_EXPORT(swm_pwm_init);
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#endif /* BSP_USING_PWM */
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#endif /* RT_USING_PWM */
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