75 lines
2.0 KiB
C
75 lines
2.0 KiB
C
/*
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* File : board.h
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2009, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2009-09-22 Bernard add board.h to this bsp
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*/
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// <<< Use Configuration Wizard in Context Menu >>>
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#ifndef __BOARD_H__
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#define __BOARD_H__
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#include <gd32f4xx.h>
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// <o>Begin Address of External SDRAM
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// <i>Default: 0xD0000000
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#define EXT_SDRAM_BEGIN SDRAM_BANK_ADDR /* the begining address of external SDRAM */
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// <o>End Address of External SRAM
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// <i>Default: 0xD0800000
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#define EXT_SDRAM_END (SDRAM_BANK_ADDR + W9825G6KH_SIZE) /* the end address of external SDRAM */
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// <o> Internal SRAM memory size[Kbytes] <8-64>
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// <i>Default: 64
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#ifdef __ICCARM__
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// Use *.icf ram symbal, to avoid hardcode.
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extern char __ICFEDIT_region_RAM_end__;
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#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__
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#else
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#define GD32_SRAM_SIZE 128
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#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024)
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#endif
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#ifdef __CC_ARM
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extern int Image$$RW_IRAM1$$ZI$$Limit;
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#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit)
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#elif __ICCARM__
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#pragma section="HEAP"
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#define HEAP_BEGIN (__segment_end("HEAP"))
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#else
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extern int __bss_end;
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#define HEAP_BEGIN (&__bss_end)
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#endif
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#define HEAP_END GD32_SRAM_END
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// <o> Console on USART: <0=> no console <1=>USART 1 <2=>USART 2 <3=> USART 3
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// <i>Default: 1
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#define GD32_CONSOLE_USART 1
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void rt_hw_board_init(void);
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#if GD32_CONSOLE_USART == 0
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#define CONSOLE_DEVICE "no"
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#elif GD32_CONSOLE_USART == 1
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#define CONSOLE_DEVICE "uart1"
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#elif GD32_CONSOLE_USART == 2
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#define CONSOLE_DEVICE "uart2"
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#elif GD32_CONSOLE_USART == 3
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#define CONSOLE_DEVICE "uart3"
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#endif
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#define FINSH_DEVICE_NAME CONSOLE_DEVICE
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void Error_Handler(void);
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#endif
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//*** <<< end of configuration section >>> ***
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