90917cc75a
* [dfs] fixup compiler warning Signed-off-by: Shell <smokewood@qq.com> * [format] libcpu/arm64: separate context switching codes Signed-off-by: Shell <smokewood@qq.com> * [format] libcpu/arm64: separate vector Signed-off-by: Shell <smokewood@qq.com> * [format] libcpu/arm64: separate context_gcc.S Signed-off-by: Shell <smokewood@qq.com> * [format] libcpu/arm64: moving headers to include directory Signed-off-by: Shell <smokewood@qq.com> * style: replace tab with space --------- Signed-off-by: Shell <smokewood@qq.com>
40 lines
1.1 KiB
C
40 lines
1.1 KiB
C
/*
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* Copyright (c) 2006-2022, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-12-18 RT-Thread the first version
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*/
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#ifndef __CACHE_H__
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#define __CACHE_H__
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#include <rtdef.h>
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void __asm_invalidate_icache_all(void);
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void rt_hw_dcache_flush_all(void);
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void rt_hw_dcache_invalidate_all(void);
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void rt_hw_dcache_flush_range(unsigned long start_addr, unsigned long size);
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void rt_hw_cpu_dcache_clean(void *addr, unsigned long size);
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void rt_hw_cpu_dcache_invalidate(void *start_addr, unsigned long size);
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static inline void rt_hw_icache_invalidate_all(void)
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{
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/* wait for previous modification to complete */
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__asm__ volatile ("dsb ishst");
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__asm__ volatile ("ic ialluis");
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/* wait for ic to retire */
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__asm__ volatile ("dsb nsh");
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/* flush instruction pipeline */
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__asm__ volatile ("isb");
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}
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void rt_hw_cpu_icache_invalidate(void *addr, rt_size_t size);
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void rt_hw_cpu_dcache_clean_and_invalidate(void *addr, rt_size_t size);
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#endif /* __CACHE_H__ */
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