105 lines
4.5 KiB
C
105 lines
4.5 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fpwm_hw.c
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-25 11:45:05
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* Description: This file is for pwm register implementation.
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 wangxiaodong 2022/4/15 init commit
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*/
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#include <stdio.h>
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#include "fparameters.h"
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#include "fpwm_hw.h"
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#include "fassert.h"
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/**
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* @name: FPwmLsdEnable
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* @msg: enable pwm lsd syn
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* @param {uintptr} lsd_addr, base address of the lsd_pwm_syn
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* @param {u8} pwm_id, pwm id parameters of FPWM
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* @return
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*/
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void FPwmLsdEnable(uintptr lsd_addr, u8 pwm_id)
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{
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FASSERT(pwm_id < FPWM_NUM);
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u32 reg_val = 0;
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reg_val = FPWM_READ_REG32(lsd_addr, FLSD_MIO_PWM_SYN_OFFSET);
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reg_val |= (FLSD_MIO_PWM_SYN_MASK & (1 << pwm_id));
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FPWM_WRITE_REG32(lsd_addr, FLSD_MIO_PWM_SYN_OFFSET, reg_val);
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}
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/**
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* @name: FPwmLsdDisable
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* @msg: disable pwm lsd syn
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* @param {uintptr} lsd_addr, base address of the lsd_pwm_syn
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* @param {u8} pwm_id, pwm id parameters of FPWM
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* @return
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*/
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void FPwmLsdDisable(uintptr lsd_addr, u8 pwm_id)
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{
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FASSERT(pwm_id < FPWM_NUM);
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u32 reg_val = 0;
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reg_val = FPWM_READ_REG32(lsd_addr, FLSD_MIO_PWM_SYN_OFFSET);
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reg_val &= (~(FLSD_MIO_PWM_SYN_MASK & (1 << pwm_id)));
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FPWM_WRITE_REG32(lsd_addr, FLSD_MIO_PWM_SYN_OFFSET, reg_val);
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}
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/**
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* @name: FPwmDump
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* @msg: dump some pwm registers value.
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* @param {FPwmCtrl} *pctrl, instance of FPWM controller
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* @return
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*/
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void FPwmDump(uintptr base_addr)
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{
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uintptr db_base_addr = base_addr;
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uintptr pwm_base_addr = base_addr + FPWM_OFFSET;
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printf("Off[0x%x]: FPWM_DB_CTRL_OFFSET = 0x%08x\r\n", db_base_addr + FPWM_DB_CTRL_OFFSET, FPWM_READ_REG32(db_base_addr, FPWM_DB_CTRL_OFFSET));
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printf("Off[0x%x]: FPWM_DB_DLY_OFFSET = 0x%08x\r\n", db_base_addr + FPWM_DB_DLY_OFFSET, FPWM_READ_REG32(db_base_addr, FPWM_DB_DLY_OFFSET));
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printf("\r\n");
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printf("Off[0x%x]: FPWM_TIM_CNT_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_TIM_CNT_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_TIM_CNT_OFFSET));
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printf("Off[0x%x]: FPWM_TIM_CTRL_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_TIM_CTRL_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_TIM_CTRL_OFFSET));
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printf("Off[0x%x]: FPWM_STATE_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_STATE_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_STATE_OFFSET));
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printf("Off[0x%x]: FPWM_PERIOD_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_PERIOD_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_PERIOD_OFFSET));
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printf("Off[0x%x]: FPWM_CTRL_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_CTRL_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_CTRL_OFFSET));
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printf("Off[0x%x]: FPWM_CCR_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_CCR_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_CCR_OFFSET));
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pwm_base_addr = pwm_base_addr + FPWM_OFFSET;
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printf("\r\n");
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printf("Off[0x%x]: FPWM_TIM_CNT_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_TIM_CNT_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_TIM_CNT_OFFSET));
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printf("Off[0x%x]: FPWM_TIM_CTRL_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_TIM_CTRL_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_TIM_CTRL_OFFSET));
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printf("Off[0x%x]: FPWM_STATE_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_STATE_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_STATE_OFFSET));
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printf("Off[0x%x]: FPWM_PERIOD_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_PERIOD_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_PERIOD_OFFSET));
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printf("Off[0x%x]: FPWM_CTRL_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_CTRL_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_CTRL_OFFSET));
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printf("Off[0x%x]: FPWM_CCR_OFFSET = 0x%08x\r\n", pwm_base_addr + FPWM_CCR_OFFSET, FPWM_READ_REG32(pwm_base_addr, FPWM_CCR_OFFSET));
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#if defined(FLSD_CONFIG_BASE)
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printf("Off[0x%x]: FPWM_LSD_OFFSET = 0x%08x\r\n", FLSD_CONFIG_BASE + FLSD_MIO_PWM_SYN_OFFSET, FPWM_READ_REG32(FLSD_CONFIG_BASE, FLSD_MIO_PWM_SYN_OFFSET));
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#endif
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printf("\r\n");
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}
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