224 lines
6.7 KiB
C
224 lines
6.7 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fpwm.h
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-04-15 11:45:05
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* Description: This file is for detailed description of the device configuration and driver.
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 wangxiaodong 2022/4/15 init commit
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*/
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#ifndef FPWM_H
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#define FPWM_H
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#include "ftypes.h"
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#include "fdebug.h"
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#include "ferror_code.h"
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#include "fkernel.h"
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#include "fassert.h"
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#include "fparameters.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#define FPWM_SUCCESS FT_SUCCESS
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#define FPWM_ERR_INVAL_PARM FT_MAKE_ERRCODE(ErrModBsp, ErrBspPwm, 1)
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#define FPWM_ERR_NOT_READY FT_MAKE_ERRCODE(ErrModBsp, ErrBspPwm, 2)
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#define FPWM_ERR_TIMEOUT FT_MAKE_ERRCODE(ErrModBsp, ErrBspPwm, 3)
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#define FPWM_ERR_NOT_SUPPORT FT_MAKE_ERRCODE(ErrModBsp, ErrBspPwm, 4)
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#define FPWM_ERR_CMD_FAILED FT_MAKE_ERRCODE(ErrModBsp, ErrBspPwm, 5)
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typedef enum
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{
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FPWM_INTR_EVENT_COUNTER = 0, /**< Handler type for counter interrupt */
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FPWM_INTR_EVENT_FIFO_EMPTY = 1, /**< Handler type for fifo empty interrupt*/
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FPWM_INTR_EVENT_NUM
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} FPwmIntrEventType;
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/* duty sel */
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typedef enum
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{
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FPWM_DUTY_CCR = 0, /* duty value from pwm ccr register */
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FPWM_DUTY_FIFO = 1, /* duty value from fifo */
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FPWM_DUTY_SEL_MODE_NUM
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} FPwmDutySourceMode;
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/* tim_ctrl mode, counter mode */
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typedef enum
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{
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FPWM_MODULO = 0, /* count from 0~period */
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FPWM_UP_DOWN = 1, /* count from 0~period~0 */
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FPWM_TIM_CTRL_MODE_NUM
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} FPwmTimCtrlMode;
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/* pwm mode, only the compare output mode is supported currently*/
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typedef enum
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{
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FPWM_NONE_MODE = 0,/* no mode */
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FPWM_OUTPUT_COMPARE = 1,/* compare output mode */
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FPWM_CTRL_MODE_NUM
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} FPwmCtrlMode;
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/**
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* enum pwm_polarity - polarity of a PWM compare signal
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* @FPWM_POLARITY_NORMAL: a high signal for the duration of the duty-
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* cycle, followed by a low signal for the remainder of the pulse
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* period
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* @FPWM_POLARITY_INVERSED: a low signal for the duration of the duty-
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* cycle, followed by a high signal for the remainder of the pulse
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* period
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*/
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typedef enum
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{
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FPWM_POLARITY_OUTPUT_HIGH = 0b000,
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FPWM_POLARITY_OUTPUT_LOW = 0b001,
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FPWM_POLARITY_OUTPUT_FLIP = 0b010,
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FPWM_POLARITY_INVERSED = 0b011,
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FPWM_POLARITY_NORMAL = 0b100,
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FPWM_POLARITY_CCR_LOW = 0b101,
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FPWM_POLARITY_CCR_HIGH = 0b110,
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FPWM_POLARITY_INIT = 0b111,
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FPWM_POLARITY_NUM
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} FPwmPolarity;
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/* db polarity select */
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typedef enum
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{
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FPWM_DB_AH = 0, /* no flip */
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FPWM_DB_ALC = 1,/* pwm0 flip */
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FPWM_DB_AHC, /* pwm1 flip */
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FPWM_DB_AL, /* pwm0 and pwm1 flip */
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FPWM_DB_POLARITY_NUM
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} FPwmDbPolarity;
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/* db out mode */
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typedef enum
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{
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FPWM_DB_OUT_MODE_BYPASS = 0b00, /* by pass */
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FPWM_DB_OUT_MODE_FORBID_RISE = 0b01,/* forbid rise delay */
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FPWM_DB_OUT_MODE_FORBID_FALL = 0b10,/* forbid fall delay */
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FPWM_DB_OUT_MODE_ENABLE_RISE_FALL = 0b11,/* enable rise and fall delay */
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FPWM_DB_OUT_MODE_NUM
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} FPwmDbOutMode;
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/* db input source select, channel 0 or 1 */
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typedef enum
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{
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FPWM_DB_IN_MODE_PWM0 = 0,/* db input source choose pwm0 */
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FPWM_DB_IN_MODE_PWM1 = 1,/* db input source choose pwm1 */
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FPWM_DB_IN_MODE_NUM
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} FPwmDbInMode;
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typedef struct
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{
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FPwmDbPolarity db_polarity_sel;/* db polarity select*/
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FPwmDbOutMode db_out_mode;/* db output mode*/
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FPwmDbInMode db_in_mode;/* db input source*/
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u16 db_fall_cycle;/* db falling edge delay cycle */
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u16 db_rise_cycle;/* db rising edge delay cycle */
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} FPwmDbVariableConfig;
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typedef struct
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{
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FPwmTimCtrlMode tim_ctrl_mode;/* tim_ctrl mode, counter mode */
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u16 tim_ctrl_div;/* pwm divider */
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u16 pwm_period;/* pwm period value */
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FPwmCtrlMode pwm_mode;/* pwm mode, compare output */
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FPwmPolarity pwm_polarity;/* pwm compare output polarity */
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FPwmDutySourceMode pwm_duty_source_mode;/* pwm duty value source */
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u16 pwm_pulse;/* pwm pulse value */
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} FPwmVariableConfig;
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typedef struct
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{
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u8 instance_id;/* pwm id */
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uintptr db_base_addr;
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uintptr pwm_base_addr;
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u64 base_clk;
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u32 irq_num[FPWM_CHANNEL_NUM]; /* pwm irq num */
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u32 irq_prority[FPWM_CHANNEL_NUM]; /* pwm irq priority */
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const char *instance_name;/* instance name */
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} FPwmConfig; /* Pwm配置 */
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typedef void (*FPwmIntrEventHandler)(void *param);
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typedef struct
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{
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FPwmConfig config;/* Pwm配置 */
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u32 is_ready;/* Pwm初始化完成标志 */
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u8 channel_ctrl_enable[FPWM_CHANNEL_NUM]; /* pwm channel ctrl enable state */
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FPwmIntrEventHandler event_handler[FPWM_INTR_EVENT_NUM]; /* event handler for interrupt */
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void *event_param[FPWM_INTR_EVENT_NUM]; /* parameters ptr of event handler */
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} FPwmCtrl;
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/* interrupt handler function */
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void FPwmIntrHandler(s32 vector, void *args);
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/* register the handler function */
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void FPwmRegisterInterruptHandler(FPwmCtrl *instance_p, FPwmIntrEventType event_type, FPwmIntrEventHandler handler, void *param);
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/* get pwm configs by id */
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const FPwmConfig *FPwmLookupConfig(u32 instance_id);
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/* DeInitialization function for the device instance */
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void FPwmDeInitialize(FPwmCtrl *pctrl);
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/*Initializes a specific instance such that it is ready to be used*/
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FError FPwmCfgInitialize(FPwmCtrl *pctrl, const FPwmConfig *input_config_p);
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/* set pwm db configuration */
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FError FPwmDbVariableSet(FPwmCtrl *pctrl, FPwmDbVariableConfig *db_cfg_p);
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/* get pwm db configuration */
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FError FPwmDbVariableGet(FPwmCtrl *pctrl, FPwmDbVariableConfig *db_cfg_p);
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/* set pwm channel configuration */
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FError FPwmVariableSet(FPwmCtrl *pctrl, u32 channel, FPwmVariableConfig *pwm_cfg_p);
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/* get pwm channel configuration */
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FError FPwmVariableGet(FPwmCtrl *pctrl, u32 channel, FPwmVariableConfig *pwm_cfg_p);
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/* config pwm pulse, pwm_ccr is less than pwm_period */
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FError FPwmPulseSet(FPwmCtrl *pctrl, u32 channel, u16 pwm_ccr);
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/* disable pwm */
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void FPwmDisable(FPwmCtrl *pctrl, u32 channel);
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/* enable pwm */
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void FPwmEnable(FPwmCtrl *pctrl, u32 channel);
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/* dump some pwm registers value */
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void FPwmDump(uintptr base_addr);
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/* control gpio output */
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void FPwmGpioSet(FPwmCtrl *pctrl, u32 channel, u32 output);
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#ifdef __cplusplus
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}
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#endif
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#endif |