165 lines
5.5 KiB
C
165 lines
5.5 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fgmac_hw.c
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* Date: 2022-04-06 14:46:52
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* LastEditTime: 2022-04-06 14:46:58
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* Description: This file is for manipulation of hardware registers .
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 huanghe 2021/07/13 first release
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*/
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#include "fassert.h"
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#include "fdebug.h"
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#include "fgmac.h"
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#include "fgmac_hw.h"
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/***************************** Include Files *********************************/
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/************************** Variable Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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#define FGMAC_DEBUG_TAG "FGMAC-HW"
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#define FGMAC_ERROR(format, ...) FT_DEBUG_PRINT_E(FGMAC_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FGMAC_WARN(format, ...) FT_DEBUG_PRINT_W(FGMAC_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FGMAC_INFO(format, ...) FT_DEBUG_PRINT_I(FGMAC_DEBUG_TAG, format, ##__VA_ARGS__)
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#define FGMAC_DEBUG(format, ...) FT_DEBUG_PRINT_D(FGMAC_DEBUG_TAG, format, ##__VA_ARGS__)
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/************************** Function Prototypes ******************************/
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/**
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* @name: FGmacGetMacAddr
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* @msg: 获取FGMAC控制器配置的MAC地址
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* @return {*}
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* @param {uintptr} base_addr 控制器寄存器基地址
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* @param {FGmacMacAddr} mac_addr 配置的MAC地址
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*/
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void FGmacGetMacAddr(uintptr base_addr, FGmacMacAddr mac_addr)
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{
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u32 mac_high = FGMAC_READ_REG32(base_addr, FGMAC_MAC_ADDR0_UPPER16BIT_OFFSET);
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u32 mac_low = FGMAC_READ_REG32(base_addr, FGMAC_MAC_ADDR0_LOWER32BIT_OFFSET);
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/* get lower 32 bits of mac addr */
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mac_addr[0] = (u8)(mac_low & 0xff);
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mac_addr[1] = (u8)((mac_low >> 8) & 0xff);
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mac_addr[2] = (u8)((mac_low >> 16) & 0xff);
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mac_addr[3] = (u8)((mac_low >> 24) & 0xff);
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/* get upper 16 bits of mac addr */
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mac_addr[4] = (u8)(mac_high & 0xff);
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mac_addr[5] = (u8)((mac_high >> 8) & 0xff);
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return;
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}
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/**
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* @name: FGmacSetMacAddr
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* @msg: 设置FGMAC控制器的MAC地址
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* @return {*}
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* @param {uintptr} base_addr 控制器寄存器基地址
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* @param {FGmacMacAddr} mac_addr 配置的MAC地址
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*/
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void FGmacSetMacAddr(uintptr base_addr, const FGmacMacAddr mac_addr)
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{
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u32 reg_val;
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reg_val = ((u32)mac_addr[5] << 8) | (u32)mac_addr[4];
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FGMAC_WRITE_REG32(base_addr, FGMAC_MAC_ADDR0_UPPER16BIT_OFFSET, reg_val);
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reg_val = ((u32)mac_addr[3] << 24) | ((u32)mac_addr[2] << 16) | ((u32)mac_addr[1] << 8) | mac_addr[0];
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FGMAC_WRITE_REG32(base_addr, FGMAC_MAC_ADDR0_LOWER32BIT_OFFSET, reg_val);
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return;
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}
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/**
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* @name: FGmacSoftwareReset
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* @msg: 触发FGMAC控制器软件复位 GMac DMA寄存器列表 和 控制寄存器列表
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* @return {*}
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* @param {uintptr} base_addr 控制器寄存器基地址
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* @param {int} timeout 等待复位完成的状态检测周期数目
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*/
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FError FGmacSoftwareReset(uintptr base_addr, int timeout)
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{
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FASSERT(timeout > 1); /* 至少等待一个周期 */
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u32 reg_val;
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FGMAC_SET_REG32(base_addr, FGMAC_DMA_BUS_MODE_OFFSET, FGMAC_DMA_BUS_SWR); /*最后一位写为1 此时MAC DMA 控制器将复位所有 GMAC子系统内部寄存器和逻辑。 完成后会自动清0*/
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do
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{
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reg_val = FGMAC_READ_REG32(base_addr, FGMAC_DMA_BUS_MODE_OFFSET);
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}
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while ((reg_val & FGMAC_DMA_BUS_SWR) && (--timeout > 0)); /*判断swr位是否为1，当读到0时此时判断 复位操作已完成 软件复位成功*/
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if ((0 >= timeout) && (reg_val & FGMAC_DMA_BUS_SWR))
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{
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FGMAC_ERROR("Reset timeout, please check phy connection!!!");
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return FGMAC_ERR_TIMEOUT;
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}
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return FGMAC_SUCCESS;
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}
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FError FGmacFlushTxFifo(uintptr base_addr, int timeout)
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{
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FASSERT(timeout > 1); /* 至少等待一个周期 */
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u32 reg_val;
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FGMAC_SET_REG32(base_addr, FGMAC_DMA_OP_OFFSET, FGMAC_DMA_OP_FTF);
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do
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{
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reg_val = FGMAC_READ_REG32(base_addr, FGMAC_DMA_OP_OFFSET);
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}
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while ((reg_val & FGMAC_DMA_OP_FTF) && (--timeout > 0));
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if ((0 >= timeout) && (reg_val & FGMAC_DMA_OP_FTF))
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{
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FGMAC_ERROR("Flush tx fifo timeout !!!");
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return FGMAC_ERR_TIMEOUT;
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}
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return FGMAC_SUCCESS;
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}
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/**
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* @name: FGmacPhyWaitBusBusy
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* @msg: wait phy gmii is not busy
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* @param {uintptr} base_addr, base address of FGmac controller register
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* @param {int} timeout, wait timeout
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* @return err code information, FGMAC_SUCCESS indicates success，others indicates failed
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*/
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FError FGmacPhyWaitBusBusy(uintptr base_addr, int timeout)
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{
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u32 reg_val;
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/* Check for the Busy flag */
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do
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{
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reg_val = FGMAC_READ_REG32(base_addr, FGMAC_GMII_ADDR_OFFSET);
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}
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while ((FGMAC_MII_ADDR_GB & reg_val) && (0 <= --timeout));
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if (0 >= timeout)
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{
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FGMAC_ERROR("Wait gmii timeout");
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return FGMAC_ERR_TIMEOUT;
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}
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return FGMAC_SUCCESS;
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} |