45 lines
982 B
C
45 lines
982 B
C
/*
|
|
* Copyright (c) 2006-2022, RT-Thread Development Team
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*
|
|
* Change Logs:
|
|
* Date Author Notes
|
|
* 2021-09-09 WCH the first version
|
|
*/
|
|
|
|
#ifndef CPUPORT_H__
|
|
#define CPUPORT_H__
|
|
|
|
/* bytes of register width */
|
|
//#define ARCH_RISCV_FPU
|
|
#define ARCH_RISCV_FPU_S
|
|
|
|
#ifdef ARCH_CPU_64BIT
|
|
#define STORE sd
|
|
#define LOAD ld
|
|
#define REGBYTES 8
|
|
#else
|
|
#define STORE sw
|
|
#define LOAD lw
|
|
#define REGBYTES 4
|
|
#endif
|
|
|
|
/* FPU */
|
|
#ifdef ARCH_RISCV_FPU
|
|
#ifdef ARCH_RISCV_FPU_D
|
|
#define FSTORE fsd
|
|
#define FLOAD fld
|
|
#define FREGBYTES 8
|
|
#define rv_floatreg_t rt_int64_t
|
|
#endif
|
|
#ifdef ARCH_RISCV_FPU_S
|
|
#define FSTORE fsw
|
|
#define FLOAD flw
|
|
#define FREGBYTES 4
|
|
#define rv_floatreg_t rt_int32_t
|
|
#endif
|
|
#endif
|
|
|
|
#endif
|