/* * Copyright (c) 2006-2018, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2018-10-30 SummerGift first version */ #include "board.h" #include "drv_usart.h" #include "drv_config.h" #ifdef RT_USING_SERIAL //#define DRV_DEBUG #define LOG_TAG "drv.usart" #include #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) \ && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && !defined(BSP_USING_LPUART1) #error "Please define at least one BSP_USING_UARTx" /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */ #endif #ifdef RT_SERIAL_USING_DMA static void stm32_dma_config(struct rt_serial_device *serial); #endif enum { #ifdef BSP_USING_UART1 UART1_INDEX, #endif #ifdef BSP_USING_UART2 UART2_INDEX, #endif #ifdef BSP_USING_UART3 UART3_INDEX, #endif #ifdef BSP_USING_UART4 UART4_INDEX, #endif #ifdef BSP_USING_UART5 UART5_INDEX, #endif #ifdef BSP_USING_UART6 UART6_INDEX, #endif #ifdef BSP_USING_LPUART1 LPUART1_INDEX, #endif }; static struct stm32_uart_config uart_config[] = { #ifdef BSP_USING_UART1 UART1_CONFIG, #endif #ifdef BSP_USING_UART2 UART2_CONFIG, #endif #ifdef BSP_USING_UART3 UART3_CONFIG, #endif #ifdef BSP_USING_UART4 UART4_CONFIG, #endif #ifdef BSP_USING_UART5 UART5_CONFIG, #endif #ifdef BSP_USING_UART6 UART6_CONFIG, #endif #ifdef BSP_USING_LPUART1 LPUART1_CONFIG, #endif }; static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0}; static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg) { struct stm32_uart *uart; RT_ASSERT(serial != RT_NULL); RT_ASSERT(cfg != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; RT_ASSERT(uart != RT_NULL); uart->handle.Instance = uart->config->Instance; uart->handle.Init.BaudRate = cfg->baud_rate; uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; uart->handle.Init.Mode = UART_MODE_TX_RX; uart->handle.Init.OverSampling = UART_OVERSAMPLING_16; switch (cfg->data_bits) { case DATA_BITS_8: uart->handle.Init.WordLength = UART_WORDLENGTH_8B; break; case DATA_BITS_9: uart->handle.Init.WordLength = UART_WORDLENGTH_9B; break; default: uart->handle.Init.WordLength = UART_WORDLENGTH_8B; break; } switch (cfg->stop_bits) { case STOP_BITS_1: uart->handle.Init.StopBits = UART_STOPBITS_1; break; case STOP_BITS_2: uart->handle.Init.StopBits = UART_STOPBITS_2; break; default: uart->handle.Init.StopBits = UART_STOPBITS_1; break; } switch (cfg->parity) { case PARITY_NONE: uart->handle.Init.Parity = UART_PARITY_NONE; break; case PARITY_ODD: uart->handle.Init.Parity = UART_PARITY_ODD; break; case PARITY_EVEN: uart->handle.Init.Parity = UART_PARITY_EVEN; break; default: uart->handle.Init.Parity = UART_PARITY_NONE; break; } if (HAL_UART_Init(&uart->handle) != HAL_OK) { return -RT_ERROR; } return RT_EOK; } static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg) { struct stm32_uart *uart; #ifdef RT_SERIAL_USING_DMA rt_ubase_t ctrl_arg = (rt_ubase_t)arg; #endif RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; RT_ASSERT(uart != RT_NULL); switch (cmd) { /* disable interrupt */ case RT_DEVICE_CTRL_CLR_INT: /* disable rx irq */ NVIC_DisableIRQ(uart->config->irq_type); /* disable interrupt */ __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE); break; /* enable interrupt */ case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ NVIC_EnableIRQ(uart->config->irq_type); /* enable interrupt */ __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE); break; #ifdef RT_SERIAL_USING_DMA case RT_DEVICE_CTRL_CONFIG: if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) { stm32_dma_config(serial); } break; #endif } return RT_EOK; } static int stm32_putc(struct rt_serial_device *serial, char c) { struct stm32_uart *uart; RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC); #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \ || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) uart->handle.Instance->TDR = c; #else uart->handle.Instance->DR = c; #endif while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET); return 1; } static int stm32_getc(struct rt_serial_device *serial) { int ch; struct stm32_uart *uart; RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *)serial->parent.user_data; RT_ASSERT(uart != RT_NULL); ch = -1; if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) { #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \ || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) ch = uart->handle.Instance->RDR & 0xff; #else ch = uart->handle.Instance->DR & 0xff; #endif } return ch; } static const struct rt_uart_ops stm32_uart_ops = { .configure = stm32_configure, .control = stm32_control, .putc = stm32_putc, .getc = stm32_getc, }; /** * Uart common interrupt process. This need add to uart ISR. * * @param serial serial device */ static void uart_isr(struct rt_serial_device *serial) { struct stm32_uart *uart; #ifdef RT_SERIAL_USING_DMA rt_size_t recv_total_index, recv_len; rt_base_t level; #endif RT_ASSERT(serial != RT_NULL); uart = (struct stm32_uart *) serial->parent.user_data; RT_ASSERT(uart != RT_NULL); /* UART in mode Receiver -------------------------------------------------*/ if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET)) { rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); } #ifdef RT_SERIAL_USING_DMA else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET)) { level = rt_hw_interrupt_disable(); recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle)); recv_len = recv_total_index - uart->dma.last_index; uart->dma.last_index = recv_total_index; rt_hw_interrupt_enable(level); if (recv_len) { rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); } __HAL_UART_CLEAR_IDLEFLAG(&uart->handle); } #endif else { if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET) { __HAL_UART_CLEAR_OREFLAG(&uart->handle); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET) { __HAL_UART_CLEAR_NEFLAG(&uart->handle); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET) { __HAL_UART_CLEAR_FEFLAG(&uart->handle); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET) { __HAL_UART_CLEAR_PEFLAG(&uart->handle); } #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \ && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7) if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD); } #endif if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC); } if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) { UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE); } } } #if defined(BSP_USING_UART1) void USART1_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&(uart_obj[UART1_INDEX].serial)); /* leave interrupt */ rt_interrupt_leave(); } #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) void UART1_DMA_RX_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma.handle); /* leave interrupt */ rt_interrupt_leave(); } #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */ #endif /* BSP_USING_UART1 */ #if defined(BSP_USING_UART2) void USART2_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&(uart_obj[UART2_INDEX].serial)); /* leave interrupt */ rt_interrupt_leave(); } #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) void UART2_DMA_RX_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma.handle); /* leave interrupt */ rt_interrupt_leave(); } #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */ #endif /* BSP_USING_UART2 */ #if defined(BSP_USING_UART3) void USART3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&(uart_obj[UART3_INDEX].serial)); /* leave interrupt */ rt_interrupt_leave(); } #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA) void UART3_DMA_RX_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma.handle); /* leave interrupt */ rt_interrupt_leave(); } #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */ #endif /* BSP_USING_UART3*/ #if defined(BSP_USING_UART4) void UART4_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&(uart_obj[UART4_INDEX].serial)); /* leave interrupt */ rt_interrupt_leave(); } #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA) void UART4_DMA_RX_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma.handle); /* leave interrupt */ rt_interrupt_leave(); } #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */ #endif /* BSP_USING_UART4*/ #if defined(BSP_USING_UART5) void UART5_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&(uart_obj[UART5_INDEX].serial)); /* leave interrupt */ rt_interrupt_leave(); } #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) void UART5_DMA_RX_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma.handle); /* leave interrupt */ rt_interrupt_leave(); } #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */ #endif /* BSP_USING_UART5*/ #if defined(BSP_USING_UART6) void USART6_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&(uart_obj[UART6_INDEX].serial)); /* leave interrupt */ rt_interrupt_leave(); } #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) void UART6_DMA_RX_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma.handle); /* leave interrupt */ rt_interrupt_leave(); } #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */ #endif /* BSP_USING_UART6*/ #if defined(BSP_USING_LPUART1) void LPUART1_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); uart_isr(&(uart_obj[LPUART1_INDEX].serial)); /* leave interrupt */ rt_interrupt_leave(); } #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) void LPUART1_DMA_RX_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle); /* leave interrupt */ rt_interrupt_leave(); } #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */ #endif /* BSP_USING_LPUART1*/ #ifdef RT_SERIAL_USING_DMA static void stm32_dma_config(struct rt_serial_device *serial) { RT_ASSERT(serial != RT_NULL); struct stm32_uart *uart = (struct stm32_uart *)serial->parent.user_data; RT_ASSERT(uart != RT_NULL); struct rt_serial_rx_fifo *rx_fifo; LOG_D("%s dma config start", uart->config->name); { rt_uint32_t tmpreg= 0x00U; #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \ || defined(SOC_SERIES_STM32L0) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc); tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc); #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) /* enable DMA clock && Delay after an RCC peripheral clock enabling*/ SET_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc); tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc); #endif UNUSED(tmpreg); /* To avoid compiler warnings */ } __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle); #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0) uart->dma.handle.Instance = uart->config->dma_rx->Instance; #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) uart->dma.handle.Instance = uart->config->dma_rx->Instance; uart->dma.handle.Init.Channel = uart->config->dma_rx->channel; #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) uart->dma.handle.Instance = uart->config->dma_rx->Instance; uart->dma.handle.Init.Request = uart->config->dma_rx->request; #endif uart->dma.handle.Init.Direction = DMA_PERIPH_TO_MEMORY; uart->dma.handle.Init.PeriphInc = DMA_PINC_DISABLE; uart->dma.handle.Init.MemInc = DMA_MINC_ENABLE; uart->dma.handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; uart->dma.handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; uart->dma.handle.Init.Mode = DMA_CIRCULAR; uart->dma.handle.Init.Priority = DMA_PRIORITY_MEDIUM; #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) uart->dma.handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE; #endif if (HAL_DMA_DeInit(&(uart->dma.handle)) != HAL_OK) { RT_ASSERT(0); } if (HAL_DMA_Init(&(uart->dma.handle)) != HAL_OK) { RT_ASSERT(0); } rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; /* Start DMA transfer */ if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK) { /* Transfer error in reception process */ RT_ASSERT(0); } /* enable interrupt */ __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE); /* enable rx irq */ HAL_NVIC_SetPriority(uart->config->dma_rx->dma_irq, 0, 0); HAL_NVIC_EnableIRQ(uart->config->dma_rx->dma_irq); HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0); HAL_NVIC_EnableIRQ(uart->config->irq_type); LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance); LOG_D("%s dma config done", uart->config->name); } /** * @brief UART error callbacks * @param huart: UART handle * @note This example shows a simple way to report transfer error, and you can * add your own implementation. * @retval None */ void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { RT_ASSERT(huart != NULL); struct stm32_uart *uart = (struct stm32_uart *)huart; LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode); UNUSED(uart); } /** * @brief Rx Transfer completed callback * @param huart: UART handle * @note This example shows a simple way to report end of DMA Rx transfer, and * you can add your own implementation. * @retval None */ void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { struct rt_serial_device *serial; struct stm32_uart *uart; rt_size_t recv_len; rt_base_t level; RT_ASSERT(huart != NULL); uart = (struct stm32_uart *)huart; serial = &uart->serial; level = rt_hw_interrupt_disable(); recv_len = serial->config.bufsz - uart->dma.last_index; uart->dma.last_index = 0; rt_hw_interrupt_enable(level); if (recv_len) { rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); } } #endif /* RT_SERIAL_USING_DMA */ static void stm32_uart_get_dma_config(void) { #ifdef BSP_UART1_RX_USING_DMA uart_obj[UART1_INDEX].uart_dma_flag = 1; static struct dma_config uart1_dma_rx = UART1_DMA_CONFIG; uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx; #endif #ifdef BSP_UART2_RX_USING_DMA uart_obj[UART2_INDEX].uart_dma_flag = 1; static struct dma_config uart2_dma_rx = UART2_DMA_CONFIG; uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx; #endif #ifdef BSP_UART3_RX_USING_DMA uart_obj[UART3_INDEX].uart_dma_flag = 1; static struct dma_config uart3_dma_rx = UART3_DMA_CONFIG; uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx; #endif #ifdef BSP_UART4_RX_USING_DMA uart_obj[UART4_INDEX].uart_dma_flag = 1; static struct dma_config uart4_dma_rx = UART4_DMA_CONFIG; uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx; #endif #ifdef BSP_UART5_RX_USING_DMA uart_obj[UART5_INDEX].uart_dma_flag = 1; static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG; uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx; #endif #ifdef BSP_UART6_RX_USING_DMA uart_obj[UART6_INDEX].uart_dma_flag = 1; static struct dma_config uart6_dma_rx = UART6_DMA_CONFIG; uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx; #endif #ifdef BSP_LPUART1_RX_USING_DMA uart_obj[LPUART1_INDEX].uart_dma_flag = 1; static struct dma_config lpuart1_dma_rx = LPUART1_DMA_CONFIG; uart_config[LPUART1_INDEX].dma_rx = &lpuart1_dma_rx; #endif } int rt_hw_usart_init(void) { rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart); struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT; rt_err_t result = 0; stm32_uart_get_dma_config(); for (int i = 0; i < obj_num; i++) { uart_obj[i].config = &uart_config[i]; uart_obj[i].serial.ops = &stm32_uart_ops; uart_obj[i].serial.config = config; #if defined(RT_SERIAL_USING_DMA) if(uart_obj[i].uart_dma_flag) { /* register UART device */ result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX| RT_DEVICE_FLAG_DMA_RX ,&uart_obj[i]); } else #endif { /* register UART device */ result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX ,&uart_obj[i]); } RT_ASSERT(result == RT_EOK); } return result; } #endif /* RT_USING_SERIAL */