#include "usart.h" #include #include /* * Use UART1 as console output and finsh input * interrupt Rx and poll Tx (stream mode) * * Use UART2 with DMA Rx and poll Tx -- DMA channel 6 * Use UART3 with DMA Tx and interrupt Rx -- DMA channel 2 * * USART DMA setting on STM32 * USART1 Tx --> DMA Channel 4 * USART1 Rx --> DMA Channel 5 * USART2 Tx --> DMA Channel 7 * USART2 Rx --> DMA Channel 6 * USART3 Tx --> DMA Channel 2 * USART3 Rx --> DMA Channel 3 */ #ifdef RT_USING_UART1 struct stm32_serial_int_rx uart1_int_rx; struct stm32_serial_device uart1 = { USART1, &uart1_int_rx, RT_NULL, RT_NULL, RT_NULL }; struct rt_device uart1_device; #endif #ifdef RT_USING_UART2 struct stm32_serial_int_rx uart2_int_rx; struct stm32_serial_dma_rx uart2_dma_rx; struct stm32_serial_device uart2 = { USART2, &uart2_int_rx, &uart2_dma_rx, RT_NULL, RT_NULL }; struct rt_device uart2_device; #endif #ifdef RT_USING_UART3 struct stm32_serial_int_rx uart3_int_rx; struct stm32_serial_dma_tx uart3_dma_tx; struct stm32_serial_device uart3 = { USART3, &uart3_int_rx, RT_NULL, RT_NULL, &uart3_dma_tx }; struct rt_device uart3_device; #endif #define USART1_DR_Base 0x40013804 #define USART2_DR_Base 0x40004404 #define USART3_DR_Base 0x40004804 /* USART1_REMAP = 0 */ #define UART1_GPIO_TX GPIO_Pin_9 #define UART1_GPIO_RX GPIO_Pin_10 #define UART1_GPIO GPIOA #define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1 #define UART1_TX_DMA DMA1_Channel4 #define UART1_RX_DMA DMA1_Channel5 /* USART2_REMAP = 0 */ #define UART2_GPIO_TX GPIO_Pin_2 #define UART2_GPIO_RX GPIO_Pin_3 #define UART2_GPIO GPIOA #define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2 #define UART2_TX_DMA DMA1_Channel7 #define UART2_RX_DMA DMA1_Channel6 /* USART3_REMAP[1:0] = 00 */ #define UART3_GPIO_RX GPIO_Pin_11 #define UART3_GPIO_TX GPIO_Pin_10 #define UART3_GPIO GPIOB #define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3 #define UART3_TX_DMA DMA1_Channel2 #define UART3_RX_DMA DMA1_Channel3 static void RCC_Configuration(void) { RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE); #ifdef RT_USING_UART1 /* Enable USART1 and GPIOA clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE); #endif #ifdef RT_USING_UART2 /* Enable GPIOD clocks */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE); /* Enable USART2 clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); #endif #ifdef RT_USING_UART3 RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE); /* Enable USART3 clock */ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); #endif #if defined (RT_USING_UART2) || defined (RT_USING_UART3) /* DMA clock enable */ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE); #endif } static void GPIO_Configuration(void) { GPIO_InitTypeDef GPIO_InitStructure; #ifdef RT_USING_UART1 /* Configure USART1 Rx (PA.10) as input floating */ GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(UART1_GPIO, &GPIO_InitStructure); /* Configure USART1 Tx (PA.09) as alternate function push-pull */ GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_Init(UART1_GPIO, &GPIO_InitStructure); #endif #ifdef RT_USING_UART2 /* Configure USART2 Rx as input floating */ GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(UART2_GPIO, &GPIO_InitStructure); /* Configure USART2 Tx as alternate function push-pull */ GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(UART2_GPIO, &GPIO_InitStructure); #endif #ifdef RT_USING_UART3 /* Configure USART3 Rx as input floating */ GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(UART3_GPIO, &GPIO_InitStructure); /* Configure USART3 Tx as alternate function push-pull */ GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_Init(UART3_GPIO, &GPIO_InitStructure); #endif } static void NVIC_Configuration(void) { NVIC_InitTypeDef NVIC_InitStructure; /* Configure the NVIC Preemption Priority Bits */ NVIC_PriorityGroupConfig(NVIC_PriorityGroup_0); #ifdef RT_USING_UART1 /* Enable the USART1 Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); #endif #ifdef RT_USING_UART2 /* Enable the USART2 Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); /* Enable the DMA1 Channel6 Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel6_IRQn; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); #endif #ifdef RT_USING_UART3 /* Enable the USART3 Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); /* Enable the DMA1 Channel2 Interrupt */ NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn; NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; NVIC_Init(&NVIC_InitStructure); #endif } static void DMA_Configuration(void) { #if defined(RT_USING_UART2) || defined (RT_USING_UART3) DMA_InitTypeDef DMA_InitStructure; /* fill init structure */ DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte; DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; #endif #ifdef RT_USING_UART2 /* DMA1 Channel4 (triggered by USART2 Rx event) Config */ DMA_DeInit(UART2_RX_DMA); DMA_InitStructure.DMA_PeripheralBaseAddr = USART2_DR_Base; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0; DMA_InitStructure.DMA_BufferSize = 0; DMA_Init(UART2_RX_DMA, &DMA_InitStructure); DMA_ITConfig(UART2_RX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE); DMA_ClearFlag(DMA1_FLAG_TC4); #endif #ifdef RT_USING_UART3 /* DMA1 Channel5 (triggered by USART3 Tx event) Config */ DMA_DeInit(UART3_TX_DMA); DMA_InitStructure.DMA_PeripheralBaseAddr = USART3_DR_Base; DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; DMA_InitStructure.DMA_MemoryBaseAddr = (u32)0; DMA_InitStructure.DMA_BufferSize = 0; DMA_Init(UART3_TX_DMA, &DMA_InitStructure); DMA_ITConfig(UART3_TX_DMA, DMA_IT_TC | DMA_IT_TE, ENABLE); DMA_ClearFlag(DMA1_FLAG_TC5); #endif } /* * Init all related hardware in here * rt_hw_serial_init() will register all supported USART device */ void rt_hw_usart_init() { USART_InitTypeDef USART_InitStructure; USART_ClockInitTypeDef USART_ClockInitStructure; RCC_Configuration(); GPIO_Configuration(); NVIC_Configuration(); DMA_Configuration(); /* uart init */ #ifdef RT_USING_UART1 USART_InitStructure.USART_BaudRate = 115200; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; USART_Init(USART1, &USART_InitStructure); USART_ClockInit(USART1, &USART_ClockInitStructure); /* register uart1 */ rt_hw_serial_register(&uart1_device, "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM, &uart1); /* enable interrupt */ USART_ITConfig(USART1, USART_IT_RXNE, ENABLE); #endif #ifdef RT_USING_UART2 USART_InitStructure.USART_BaudRate = 115200; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; USART_Init(USART2, &USART_InitStructure); USART_ClockInit(USART2, &USART_ClockInitStructure); uart2_dma_rx.dma_channel= UART2_RX_DMA; /* register uart2 */ rt_hw_serial_register(&uart2_device, "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_DMA_RX, &uart2); /* Enable USART2 DMA Rx request */ USART_DMACmd(USART2, USART_DMAReq_Rx , ENABLE); #endif #ifdef RT_USING_UART3 USART_InitStructure.USART_BaudRate = 115200; USART_InitStructure.USART_WordLength = USART_WordLength_8b; USART_InitStructure.USART_StopBits = USART_StopBits_1; USART_InitStructure.USART_Parity = USART_Parity_No; USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None; USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx; USART_ClockInitStructure.USART_Clock = USART_Clock_Disable; USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low; USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge; USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable; USART_Init(USART3, &USART_InitStructure); USART_ClockInit(USART3, &USART_ClockInitStructure); uart3_dma_tx.dma_channel= UART3_TX_DMA; /* register uart3 */ rt_hw_serial_register(&uart3_device, "uart3", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_DMA_TX, &uart3); /* Enable USART3 DMA Tx request */ USART_DMACmd(USART3, USART_DMAReq_Tx , ENABLE); /* enable interrupt */ USART_ITConfig(USART3, USART_IT_RXNE, ENABLE); #endif }