/* * Copyright (c) 2006-2023, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Email: opensource_embedded@phytium.com.cn * * Change Logs: * Date Author Notes * 2022-10-26 huanghe first commit * 2022-10-26 zhugengyu support aarch64 * 2023-07-26 huanghe update psci uage * */ #include #include "board.h" #include #include "rtconfig.h" #include "phytium_cpu.h" #if defined(TARGET_ARMV8_AARCH64) #include "cpuport.h" #include "gtimer.h" #include "mmu.h" #include "cp15.h" #endif #ifdef RT_USING_SMP #include #if defined(TARGET_ARMV8_AARCH64) #include "psci.h" extern void _secondary_cpu_entry(void); #else extern void rt_secondary_cpu_entry(void); #endif #include "fpsci.h" rt_uint64_t rt_cpu_mpidr_early[] = { #if defined(TARGET_E2000D) [0] = 0x80000200, [1] = 0x80000201, #elif defined(TARGET_E2000Q) || defined(TARGET_PHYTIUMPI) [0] = 0x80000000, [1] = 0x80000100, [2] = 0x80000200, [3] = 0x80000201, #elif defined(TARGET_F2000_4) || defined(TARGET_D2000) [0] = 0x80000000, [1] = 0x80000001, [2] = 0x80000100, [3] = 0x80000101, #if defined(TARGET_D2000) [4] = 0x80000200, [5] = 0x80000201, [6] = 0x80000300, [7] = 0x80000301, #endif #endif }; extern int rt_hw_timer_init(void); void rt_hw_secondary_cpu_up(void) { rt_uint32_t i; rt_uint32_t cpu_mask = 0; int cpu_id; cpu_id = rt_hw_cpu_id(); rt_kprintf("rt_hw_secondary_cpu_up is processing \r\n"); for (i = 0; i < RT_CPUS_NR; i++) { if (i == cpu_id) { continue; } cpu_mask = 1<