1.0
### uVision Project, (C) Keil Software
*.c
*.s*; *.src; *.a*
*.obj
*.lib
*.txt; *.h; *.inc
*.plm
*.cpp
0
0
RT-Thread LPC122x
0x4
ARM-ADS
12000000
1
1
1
0
1
65535
0
0
0
79
66
8
.\lst\
1
1
1
0
1
1
0
1
0
0
0
0
1
1
1
1
1
1
1
0
0
1
0
1
255
SARMCM3.DLL
DARMCM1.DLL
SARMCM3.DLL
TARMCM1.DLL
0
1
1
1
1
1
1
1
1
1
0
1
1
1
0
1
0
0
1
.\FLASH.ini
BIN\UL2CM3.DLL
0
DLGTARM
(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=234,124,600,353,0)
0
ARMDBGFLAGS
0
DLGUARM
(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)
0
UL2CM3
-UV1498UAE -O494 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO11 -FD10000000 -FC800 -FN1 -FF0LPC115x_128 -FS00 -FL020000
0
1
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Startup
0
0
0
1
1
1
0
0
0
0
13
20
0
.\application.c
application.c
1
2
1
0
0
44
0
7
12
0
.\board.c
board.c
1
3
1
0
0
22
0
51
57
0
.\startup.c
startup.c
1
4
5
0
0
0
0
0
0
0
.\board.h
board.h
1
5
5
0
0
0
0
0
0
0
.\rtconfig.h
rtconfig.h
1
6
1
0
0
11
0
67
67
0
.\uart.c
uart.c
Kernel
0
0
0
2
7
1
0
0
0
0
0
0
0
..\..\src\clock.c
clock.c
2
8
1
0
0
0
0
0
0
0
..\..\src\device.c
device.c
2
9
1
0
0
0
0
0
0
0
..\..\src\idle.c
idle.c
2
10
1
0
0
0
0
0
0
0
..\..\src\ipc.c
ipc.c
2
11
1
0
0
0
0
0
0
0
..\..\src\irq.c
irq.c
2
12
1
0
0
0
0
0
0
0
..\..\src\kservice.c
kservice.c
2
13
1
0
0
0
0
0
0
0
..\..\src\mem.c
mem.c
2
14
1
0
0
0
0
0
0
0
..\..\src\mempool.c
mempool.c
2
15
1
0
0
0
0
0
0
0
..\..\src\module.c
module.c
2
16
1
0
0
0
0
0
0
0
..\..\src\object.c
object.c
2
17
1
0
0
0
0
0
0
0
..\..\src\rtm.c
rtm.c
2
18
1
0
0
0
0
0
0
0
..\..\src\scheduler.c
scheduler.c
2
19
1
0
0
0
0
0
0
0
..\..\src\slab.c
slab.c
2
20
1
0
0
0
0
0
0
0
..\..\src\thread.c
thread.c
2
21
1
0
0
0
0
0
0
0
..\..\src\timer.c
timer.c
LPC122x
0
0
0
3
22
1
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\cpu.c
cpu.c
3
23
1
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\fault.c
fault.c
3
24
1
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\interrupt.c
interrupt.c
3
25
1
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\stack.c
stack.c
3
26
2
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\context_rvds.S
context_rvds.S
3
27
2
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\fault_rvds.S
fault_rvds.S
3
28
2
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\start_rvds.S
start_rvds.S
3
0
1
0
0
60
0
1
16
0
..\..\examples\kernel\tc_comm.c
tc_comm.c
CMSIS
0
0
0
4
29
1
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\CMSIS\system_LPC122x.c
system_LPC122x.c
4
30
1
0
0
0
0
0
0
0
..\..\libcpu\arm\lpc122x\CMSIS\core_cm0.c
core_cm0.c