#! armclang -mcpu=cortex-m4 --target=arm-arm-none-eabi -E -x c -I. #include "memory_regions.scat" ; This scatter-file places the vector table, application code, data, stacks and heap at suitable addresses in the memory map. #define ROM_REGISTERS_START 0x400 #ifdef FLASH_BOOTLOADER_LENGTH #define BL_FLASH_IMAGE_START (FLASH_APPLICATION_IMAGE_NUMBER == 1 ? FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH : \ FLASH_BOOTLOADER_LENGTH + FLASH_BOOTLOADER_SCRATCH_LENGTH + FLASH_APPLICATION_S_LENGTH + FLASH_BOOTLOADER_HEADER_LENGTH) #define BL_FLASH_IMAGE_END (BL_FLASH_IMAGE_START + FLASH_APPLICATION_S_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH) #define BL_FLASH_NS_START (FLASH_APPLICATION_NS_LENGTH == 0 ? BL_FLASH_IMAGE_END : \ BL_FLASH_IMAGE_START - FLASH_BOOTLOADER_HEADER_LENGTH + FLASH_APPLICATION_S_LENGTH) #define BL_FLASH_NSC_START (FLASH_APPLICATION_NS_LENGTH == 0 ? BL_FLASH_IMAGE_END : \ BL_FLASH_NS_START - FLASH_APPLICATION_NSC_LENGTH) #define BL_FLASH_NS_IMAGE_START (FLASH_APPLICATION_NS_LENGTH == 0 ? BL_FLASH_IMAGE_END : \ BL_FLASH_NS_START + FLASH_BOOTLOADER_HEADER_LENGTH_2) #define BL_RAM_NS_START (FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH : \ RAM_START + RAM_LENGTH - RAM_APPLICATION_NS_LENGTH) #define BL_RAM_NSC_START (FLASH_APPLICATION_NS_LENGTH == 0 ? RAM_START + RAM_LENGTH : \ BL_RAM_NS_START - RAM_APPLICATION_NSC_LENGTH) #define BLN_FLASH_IMAGE_START (BL_FLASH_NS_IMAGE_START) #define BLN_FLASH_IMAGE_END (FLASH_APPLICATION_NS_LENGTH == 0 ? BL_FLASH_IMAGE_END : \ BL_FLASH_NS_IMAGE_START + FLASH_APPLICATION_NS_LENGTH - FLASH_BOOTLOADER_HEADER_LENGTH_2) #define FLASH_ORIGIN FLASH_START #define LIMITED_FLASH_LENGTH FLASH_BOOTLOADER_LENGTH #elif defined FLASH_IMAGE_START #define FLASH_ORIGIN FLASH_IMAGE_START #ifdef FLASH_NS_START #define LIMITED_FLASH_LENGTH FLASH_NS_START - FLASH_IMAGE_START #else #define LIMITED_FLASH_LENGTH FLASH_IMAGE_END - FLASH_IMAGE_START #endif #else #define FLASH_ORIGIN FLASH_START #define LIMITED_FLASH_LENGTH FLASH_LENGTH #endif ; If a flat project has defined RAM_NS_BUFFER_LENGTH, then emit IDAU symbols to allocate non-secure RAM. #if !defined(PROJECT_NONSECURE) && defined(RAM_NS_BUFFER_LENGTH) #define __RESERVE_NS_RAM (1) ; Allocate required RAM and align to 32K boundary #define RAM_NS_BUFFER_START ((RAM_START + RAM_LENGTH - RAM_NS_BUFFER_LENGTH) AND 0xFFFFFFE0) #else #define __RESERVE_NS_RAM (0) #endif #ifndef FLASH_S_START #define FLASH_S_START 0 #endif #ifndef RAM_S_START #define RAM_S_START RAM_START #endif #ifndef DATA_FLASH_S_START #define DATA_FLASH_S_START DATA_FLASH_START #endif #if __RESERVE_NS_RAM #ifndef RAM_NSC_START #define RAM_NSC_START RAM_NS_BUFFER_START AND 0xFFFFE000 #endif #ifndef RAM_NS_START #define RAM_NS_START RAM_NS_BUFFER_START AND 0xFFFFE000 #endif #ifndef DATA_FLASH_NS_START #define DATA_FLASH_NS_START DATA_FLASH_START + DATA_FLASH_LENGTH #endif #ifndef FLASH_NSC_START #define FLASH_NSC_START FLASH_ORIGIN + LIMITED_FLASH_LENGTH #endif #ifndef FLASH_NS_START #define FLASH_NS_START FLASH_ORIGIN + LIMITED_FLASH_LENGTH #endif #else #ifndef RAM_NSC_START #ifdef PROJECT_SECURE #define RAM_NSC_START +0 ALIGN 1024 #else #define RAM_NSC_START RAM_START + RAM_LENGTH #endif #endif #ifndef RAM_NS_START #ifdef PROJECT_SECURE #define RAM_NS_START +0 ALIGN 8192 #else #define RAM_NS_START RAM_START + RAM_LENGTH #endif #endif #ifndef DATA_FLASH_NS_START #define DATA_FLASH_NS_START +0 ALIGN 1024 #endif #ifndef FLASH_NSC_START #define FLASH_NSC_START +0 ALIGN 1024 #endif #ifndef FLASH_NS_START #define FLASH_NS_START +0 ALIGN 32768 #endif #endif #ifndef QSPI_FLASH_S_START #define QSPI_FLASH_S_START QSPI_FLASH_START #endif #ifndef QSPI_FLASH_NS_START #define QSPI_FLASH_NS_START +0 #endif #ifndef OSPI_DEVICE_0_S_START #define OSPI_DEVICE_0_S_START OSPI_DEVICE_0_START #endif #ifndef OSPI_DEVICE_0_NS_START #define OSPI_DEVICE_0_NS_START +0 #endif #ifndef OSPI_DEVICE_1_S_START #define OSPI_DEVICE_1_S_START OSPI_DEVICE_1_START #endif #ifndef OSPI_DEVICE_1_NS_START #define OSPI_DEVICE_1_NS_START +0 #endif #ifndef SDRAM_S_START #define SDRAM_S_START SDRAM_START #endif #ifndef SDRAM_NS_START #define SDRAM_NS_START +0 #endif #ifdef QSPI_FLASH_SIZE #define QSPI_FLASH_PRV_LENGTH QSPI_FLASH_SIZE #else #define QSPI_FLASH_PRV_LENGTH QSPI_FLASH_LENGTH #endif #ifdef OSPI_DEVICE_0_SIZE #define OSPI_DEVICE_0_PRV_LENGTH OSPI_DEVICE_0_SIZE #else #define OSPI_DEVICE_0_PRV_LENGTH OSPI_DEVICE_0_LENGTH #endif #ifdef OSPI_DEVICE_1_SIZE #define OSPI_DEVICE_1_PRV_LENGTH OSPI_DEVICE_1_SIZE #else #define OSPI_DEVICE_1_PRV_LENGTH OSPI_DEVICE_1_LENGTH #endif #define OPTION_SETTING_NS_OFFSET 0x80 LOAD_REGION_FLASH FLASH_ORIGIN ALIGN 0x80 LIMITED_FLASH_LENGTH { __tz_FLASH_S +0 EMPTY 0 { } VECTORS +0 FIXED PADVALUE 0xFFFFFFFF ; maximum of 256 exceptions (256*4 bytes == 0x400) { *(.fixed_vectors, +FIRST) *(.application_vectors) } #if (OPTION_SETTING_LENGTH == 0) && (FLASH_ORIGIN == FLASH_START) /* MCUs with the OPTION_SETTING region do not use the ROM registers at 0x400. */ VECTORS_FILL +0 FIXED FILL 0xFFFFFFFF (0x400 - ImageLength(VECTORS)) { } ROM_REGISTERS FLASH_START+0x400 FIXED PADVALUE 0xFFFFFFFF { bsp_rom_registers.o (.rom_registers) } ROM_REGISTERS_FILL +0 FIXED FILL 0xFFFFFFFF (0x100 - ImageLength(ROM_REGISTERS)) { } #endif MCUBOOT_SCE9_KEY +0 FIXED { *(.mcuboot_sce9_key) } INIT_ARRAY +0 FIXED { *(.init_array) } USB_DESC_FS +0 FIXED { *(.usb_device_desc_fs*) *(.usb_config_desc_fs*) *(.usb_interface_desc_fs*) } RO_CODE_DATA +0 FIXED { *(.text*,.rodata*,.constdata*) .ANY(+RO) } __tz_RAM_S RAM_S_START EMPTY 0 { } DTC_VECTOR_TABLE RAM_START UNINIT NOCOMPRESS RAM_LENGTH { ; If DTC is used, put the DTC vector table at the start of SRAM. ; This avoids memory holes due to 1K alignment required by it. *(.bss.fsp_dtc_vector_table) } DATA +0 NOCOMPRESS { ; Do not use *(.data*) because it will place data meant for .data_flash in this section. *(.data.*) *(.data) *(.code_in_ram) #if !__RESERVE_NS_RAM *(.ns_buffer*) #endif .ANY(+RW) } BSS +0 NOCOMPRESS { *(+ZI) } NOINIT +0 UNINIT NOCOMPRESS { *(.bss.noinit) } ARM_LIB_HEAP +0 ALIGN 8 UNINIT NOCOMPRESS { *(.bss.heap) } ; ARM_LIB_STACK is not used in FSP, but it must be in the scatter file to avoid a linker error ARM_LIB_STACK +0 ALIGN 8 UNINIT NOCOMPRESS EMPTY 0 { } STACK +0 ALIGN 8 UNINIT NOCOMPRESS { *(.bss.stack) *(.bss.stack.thread) } /* This is the end of RAM used in the application. */ RAM_END +0 EMPTY 4 { } ; Support for OctaRAM OSPI_DEVICE_0_NO_LOAD OSPI_DEVICE_0_START UNINIT NOCOMPRESS { *(.ospi_device_0_no_load*) } ; Support for OctaRAM OSPI_DEVICE_1_NO_LOAD OSPI_DEVICE_1_START UNINIT NOCOMPRESS { *(.ospi_device_1_no_load*) } __tz_RAM_C RAM_NSC_START EMPTY 0 { } __tz_RAM_N RAM_NS_START EMPTY 0 { } #ifdef FLASH_BOOTLOADER_LENGTH __bl_FLASH_IMAGE_START BL_FLASH_IMAGE_START OVERLAY UNINIT 4 { *(.bl_boundary.bl_flash_image_start) } #if FLASH_APPLICATION_NS_LENGTH == 0 __bl_FLASH_IMAGE_END BL_FLASH_IMAGE_END OVERLAY UNINIT 4 { *(.bl_boundary.bl_flash_image_end) } #else __bl_FLASH_NS_START BL_FLASH_NS_START OVERLAY UNINIT 4 { *(.bl_boundary.bl_flash_ns_start) } __bl_FLASH_NSC_START BL_FLASH_NSC_START OVERLAY UNINIT 4 { *(.bl_boundary.bl_flash_nsc_start) } __bl_FLASH_NS_IMAGE_START BL_FLASH_NS_IMAGE_START OVERLAY UNINIT 4 { *(.bl_boundary.bl_flash_ns_image_start) } __bln_FLASH_IMAGE_START BLN_FLASH_IMAGE_START OVERLAY UNINIT 4 { *(.bl_boundary.bln_flash_image_start) } __bln_FLASH_IMAGE_END BLN_FLASH_IMAGE_END OVERLAY UNINIT 4 { *(.bl_boundary.bln_flash_image_end) } __bl_RAM_NS_START BL_RAM_NS_START OVERLAY UNINIT 4 { *(.bl_boundary.bl_ram_ns_start) } __bl_RAM_NSC_START BL_RAM_NSC_START OVERLAY UNINIT 4 { *(.bl_boundary.bl_ram_nsc_start) } #endif #endif #if __RESERVE_NS_RAM RAM_NS_BUFFER RAM_NS_BUFFER_START { *(.ns_buffer*) } #endif RAM_LIMIT RAM_START+RAM_LENGTH EMPTY 4 { } } LOAD_REGION_NSC_FLASH FLASH_NSC_START { __tz_FLASH_C FLASH_NSC_START EMPTY 0 { } EXEC_NSCR FLASH_NSC_START FIXED { *(Veneer$$CMSE) } __tz_FLASH_N FLASH_NS_START EMPTY 0 { } } #if ID_CODE_LENGTH != 0 LOAD_REGION_ID_CODE ID_CODE_START ID_CODE_LENGTH { __tz_ID_CODE_S ID_CODE_START EMPTY 0 { } ID_CODE +0 FIXED { *(.id_code*) } __tz_ID_CODE_N +0 EMPTY 0 { } } #else LOAD_REGION_ID_CODE ID_CODE_START 4 { __tz_ID_CODE_S ID_CODE_START EMPTY 0 { } __tz_ID_CODE_N +0 EMPTY 0 { } } #endif #if OPTION_SETTING_LENGTH != 0 LOAD_REGION_OPTION_SETTING OPTION_SETTING_START OPTION_SETTING_LENGTH { __tz_OPTION_SETTING_S OPTION_SETTING_START EMPTY 0 { } #ifndef PROJECT_NONSECURE OFS0 OPTION_SETTING_START+0 FIXED { *(.option_setting_ofs0) } UNUSED_0 (ImageBase(OFS0)+ImageLength(OFS0)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS0) + 0x10 - (ImageBase(OFS0)+ImageLength(OFS0))) { } DUALSEL 0x0100A100+0x10 FIXED { *(.option_setting_dualsel) } UNUSED_1 (ImageBase(DUALSEL)+ImageLength(DUALSEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS0) + 0x34 - (ImageBase(DUALSEL)+ImageLength(DUALSEL))) { } SAS 0x0100A100+0x34 FIXED { *(.option_setting_sas) } UNUSED_2 (ImageBase(SAS)+ImageLength(SAS)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS0) + 0x80 - (ImageBase(SAS)+ImageLength(SAS))) { } #else OFS1 0x0100A100+0x80 FIXED { *(.option_setting_ofs1) } UNUSED_3 (ImageBase(OFS1)+ImageLength(OFS1)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1) + 0x10 - (ImageBase(OFS1)+ImageLength(OFS1))) { } BANKSEL 0x0100A100+0x90 FIXED { *(.option_setting_banksel) } UNUSED_4 (ImageBase(BANKSEL)+ImageLength(BANKSEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1) + 0x40 - (ImageBase(BANKSEL)+ImageLength(BANKSEL))) { } BPS 0x0100A100+0xC0 FIXED { *(.option_setting_bps0) *(.option_setting_bps1) *(.option_setting_bps2) } UNUSED_5 (ImageBase(BPS)+ImageLength(BPS)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1) + 0x60 - (ImageBase(BPS)+ImageLength(BPS))) { } PBPS 0x0100A100+0xE0 FIXED { *(.option_setting_pbps0) *(.option_setting_pbps1) *(.option_setting_pbps2) } UNUSED_6 (ImageBase(PBPS)+ImageLength(PBPS)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1) + 0x80 - (ImageBase(PBPS)+ImageLength(PBPS))) { } #endif __tz_OPTION_SETTING_N OPTION_SETTING_START + OPTION_SETTING_NS_OFFSET EMPTY 0 { } } #if OPTION_SETTING_S_LENGTH != 0 LOAD_REGION_OPTION_SETTING_S OPTION_SETTING_S_START OPTION_SETTING_S_LENGTH { __tz_OPTION_SETTING_S_S OPTION_SETTING_S_START EMPTY 0 { } #ifndef PROJECT_NONSECURE OFS1_SEC OPTION_SETTING_S_START+0 FIXED { *(.option_setting_ofs1_sec) } UNUSED_7 (ImageBase(OFS1_SEC)+ImageLength(OFS1_SEC)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x10 - (ImageBase(OFS1_SEC)+ImageLength(OFS1_SEC))) { } BANKSEL_SEC OPTION_SETTING_S_START+0x10 FIXED { *(.option_setting_banksel_sec) } UNUSED_8 (ImageBase(BANKSEL_SEC)+ImageLength(BANKSEL_SEC)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x40 - (ImageBase(BANKSEL_SEC)+ImageLength(BANKSEL_SEC))) { } BPS_SEC OPTION_SETTING_S_START+0x40 FIXED { *(.option_setting_bps_sec0) *(.option_setting_bps_sec1) *(.option_setting_bps_sec2) } UNUSED_9 (ImageBase(BPS_SEC)+ImageLength(BPS_SEC)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x60 - (ImageBase(BPS_SEC)+ImageLength(BPS_SEC))) { } PBPS_SEC OPTION_SETTING_S_START+0x60 FIXED { *(.option_setting_pbps_sec0) *(.option_setting_pbps_sec1) *(.option_setting_pbps_sec2) } UNUSED_10 (ImageBase(PBPS_SEC)+ImageLength(PBPS_SEC)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x80 - (ImageBase(PBPS_SEC)+ImageLength(PBPS_SEC))) { } OFS1_SEL OPTION_SETTING_S_START+0x80 FIXED { *(.option_setting_ofs1_sel) } UNUSED_11 (ImageBase(OFS1_SEL)+ImageLength(OFS1_SEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x90 - (ImageBase(OFS1_SEL)+ImageLength(OFS1_SEL))) { } BANKSEL_SEL OPTION_SETTING_S_START+0x90 FIXED { *(.option_setting_banksel_sel) } UNUSED_12 (ImageBase(BANKSEL_SEL)+ImageLength(BANKSEL_SEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0xC0 - (ImageBase(BANKSEL_SEL)+ImageLength(BANKSEL_SEL))) { } BPS_SEL OPTION_SETTING_S_START+0xC0 FIXED { *(.option_setting_bps_sel0) *(.option_setting_bps_sel1) *(.option_setting_bps_sel2) } UNUSED_13 (ImageBase(BPS_SEL)+ImageLength(BPS_SEL)) FIXED FILL 0xFFFFFFFF (ImageBase(OFS1_SEC) + 0x100 - (ImageBase(BPS_SEL)+ImageLength(BPS_SEL))) { } #endif __tz_OPTION_SETTING_S_N +0 EMPTY 0 { } } #endif #endif LOAD_REGION_DATA_FLASH DATA_FLASH_START DATA_FLASH_LENGTH { __tz_DATA_FLASH_S DATA_FLASH_S_START EMPTY 0 { } DATA_FLASH +0 FIXED { *(.data_flash*) } __tz_DATA_FLASH_N DATA_FLASH_NS_START EMPTY 0 { } } LOAD_REGION_QSPI_FLASH QSPI_FLASH_START QSPI_FLASH_PRV_LENGTH { __tz_QSPI_FLASH_S QSPI_FLASH_S_START EMPTY 0 { } QSPI_FLASH +0 FIXED { *(.qspi_flash*) *(.code_in_qspi*) } __tz_QSPI_FLASH_N QSPI_FLASH_NS_START EMPTY 0 { } } LOAD_REGION_OSPI_DEVICE_0 OSPI_DEVICE_0_START OSPI_DEVICE_0_PRV_LENGTH { __tz_OSPI_DEVICE_0_S OSPI_DEVICE_0_S_START EMPTY 0 { } OSPI_DEVICE_0 +0 FIXED { *(.ospi_device_0*) *(.code_in_ospi_device_0*) } __tz_OSPI_DEVICE_0_N OSPI_DEVICE_0_NS_START EMPTY 0 { } } LOAD_REGION_OSPI_DEVICE_1 OSPI_DEVICE_1_START OSPI_DEVICE_1_PRV_LENGTH { __tz_OSPI_DEVICE_1_S OSPI_DEVICE_1_S_START EMPTY 0 { } OSPI_DEVICE_1 +0 FIXED { *(.ospi_device_1*) *(.code_in_ospi_device_1*) } __tz_OSPI_DEVICE_1_N OSPI_DEVICE_1_NS_START EMPTY 0 { } } LOAD_REGION_SDRAM SDRAM_START SDRAM_LENGTH { __tz_SDRAM_S SDRAM_S_START EMPTY 0 { } SDRAM +0 FIXED { *(.sdram*) *(.frame*) } __tz_SDRAM_N SDRAM_NS_START EMPTY 0 { } }