/**************************************************************************//** * @file SYS.h * @version V2.1 * $Revision: 10 $ * $Date: 14/02/05 1:17p $ * @brief M051 Series Global Control and Clock Control Driver Header File * * @note * Copyright (C) 2011 Nuvoton Technology Corp. All rights reserved. * ******************************************************************************/ #ifndef __SYS_H__ #define __SYS_H__ #include "M051Series.h" #ifdef __cplusplus extern "C" { #endif /** @addtogroup M051_Device_Driver M051 Device Driver @{ */ /** @addtogroup M051_SYS_Driver SYS Driver @{ */ /** @addtogroup M051_SYS_EXPORTED_CONSTANTS SYS Exported Constants @{ */ /*---------------------------------------------------------------------------------------------------------*/ /* Module Reset Control Resister constant definitions. */ /*---------------------------------------------------------------------------------------------------------*/ #define CHIP_RST ((0x0<<24) | SYS_IPRSTC1_CPU_RST_Pos ) /*!< CPU reset is one of the SYS_ResetModule parameter */ #define CPU_RST ((0x0<<24) | SYS_IPRSTC1_CHIP_RST_Pos ) /*!< CHIP reset is one of the SYS_ResetModule parameter */ #define EBI_RST ((0x0<<24) | SYS_IPRSTC1_EBI_RST_Pos ) /*!< EBI reset is one of the SYS_ResetModule parameter */ #define HDIV_RST ((0x0<<24) | SYS_IPRSTC1_HDIV_RST_Pos ) /*!< HDIV reset is one of the SYS_ResetModule parameter */ #define GPIO_RST ((0x4<<24) | SYS_IPRSTC2_GPIO_RST_Pos ) /*!< GPIO reset is one of the SYS_ResetModule parameter */ #define TMR0_RST ((0x4<<24) | SYS_IPRSTC2_TMR0_RST_Pos ) /*!< TMR0 reset is one of the SYS_ResetModule parameter */ #define TMR1_RST ((0x4<<24) | SYS_IPRSTC2_TMR1_RST_Pos ) /*!< TMR1 reset is one of the SYS_ResetModule parameter */ #define TMR2_RST ((0x4<<24) | SYS_IPRSTC2_TMR2_RST_Pos ) /*!< TMR2 reset is one of the SYS_ResetModule parameter */ #define TMR3_RST ((0x4<<24) | SYS_IPRSTC2_TMR3_RST_Pos ) /*!< TMR3 reset is one of the SYS_ResetModule parameter */ #define I2C0_RST ((0x4<<24) | SYS_IPRSTC2_I2C0_RST_Pos ) /*!< I2C0 reset is one of the SYS_ResetModule parameter */ #define I2C1_RST ((0x4<<24) | SYS_IPRSTC2_I2C1_RST_Pos ) /*!< I2C1 reset is one of the SYS_ResetModule parameter */ #define SPI0_RST ((0x4<<24) | SYS_IPRSTC2_SPI0_RST_Pos ) /*!< SPI0 reset is one of the SYS_ResetModule parameter */ #define SPI1_RST ((0x4<<24) | SYS_IPRSTC2_SPI1_RST_Pos ) /*!< SPI1 reset is one of the SYS_ResetModule parameter */ #define UART0_RST ((0x4<<24) | SYS_IPRSTC2_UART0_RST_Pos ) /*!< UART0 reset is one of the SYS_ResetModule parameter */ #define UART1_RST ((0x4<<24) | SYS_IPRSTC2_UART1_RST_Pos ) /*!< UART1 reset is one of the SYS_ResetModule parameter */ #define PWM03_RST ((0x4<<24) | SYS_IPRSTC2_PWM03_RST_Pos ) /*!< PWM03 reset is one of the SYS_ResetModule parameter */ #define PWM47_RST ((0x4<<24) | SYS_IPRSTC2_PWM47_RST_Pos ) /*!< PWM47 reset is one of the SYS_ResetModule parameter */ #define ACMP01_RST ((0x4<<24) | SYS_IPRSTC2_ACMP01_RST_Pos ) /*!< ACMP01 reset is one of the SYS_ResetModule parameter */ #define ACMP23_RST ((0x4<<24) | SYS_IPRSTC2_ACMP23_RST_Pos ) /*!< ACMP23 reset is one of the SYS_ResetModule parameter */ #define ADC_RST ((0x4<<24) | SYS_IPRSTC2_ADC_RST_Pos ) /*!< ADC reset is one of the SYS_ResetModule parameter */ /*---------------------------------------------------------------------------------------------------------*/ /* Brown Out Detector Threshold Voltage Selection constant definitions. */ /*---------------------------------------------------------------------------------------------------------*/ #define SYS_BODCR_BOD_RST_EN (1UL<BODCR |= SYS_BODCR_BOD_INTF_Msk) /** * @brief This macro set Brown-out detect to normal mode. * @return None */ #define SYS_CLEAR_BOD_LPM() (SYS->BODCR &= ~SYS_BODCR_BOD_LPM_Msk) /** * @brief This macro disable Brown-out detect function. * @return None */ #define SYS_DISABLE_BOD() (SYS->BODCR &= ~SYS_BODCR_BOD_EN_Msk) /** * @brief This macro enable Brown-out detect function. * @return None */ #define SYS_ENABLE_BOD() (SYS->BODCR |= SYS_BODCR_BOD_EN_Msk) /** * @brief This macro get Brown-out detect interrupt flag. * @return 0: Brown-out detect interrupt flag is not set. * 1: Brown-out detect interrupt flag is set. */ #define SYS_GET_BOD_INT_FLAG() ((SYS->BODCR & SYS_BODCR_BOD_INTF_Msk)>>SYS_BODCR_BOD_INTF_Pos) /** * @brief This macro get Brown-out detector output status. * @return 0: System voltage is higher than BOD_VL setting or BOD_EN is 0. * 1: System voltage is lower than BOD_VL setting. * @details If the BOD_EN is 0, this function always return 0. */ #define SYS_GET_BOD_OUTPUT() ((SYS->BODCR & SYS_BODCR_BOD_OUT_Msk)>>SYS_BODCR_BOD_OUT_Msk) /** * @brief This macro enable Brown-out detect interrupt function. * @return None */ #define SYS_DISABLE_BOD_RST() (SYS->BODCR &= ~SYS_BODCR_BOD_RSTEN_Msk) /** * @brief This macro enable Brown-out detect reset function. * @return None */ #define SYS_ENABLE_BOD_RST() (SYS->BODCR |= SYS_BODCR_BOD_RSTEN_Msk) /** * @brief This macro set Brown-out detect to low power mode. * @return None */ #define SYS_SET_BOD_LPM() (SYS->BODCR |= SYS_BODCR_BOD_LPM_Msk) /** * @brief This macro set Brown-out detect voltage level. * @param u32Level is Brown-out voltage level. Including : * - \ref SYS_BODCR_BOD_VL_4_4V * - \ref SYS_BODCR_BOD_VL_3_7V * - \ref SYS_BODCR_BOD_VL_2_7V * - \ref SYS_BODCR_BOD_VL_2_2V * @return None */ #define SYS_SET_BOD_LEVEL(u32Level) (SYS->BODCR = (SYS->BODCR & ~SYS_BODCR_BOD_VL_Msk) | u32Level) /** * @brief This macro get previous reset source is from Brown-out detect reset. * @return 0: Previous reset source is not from Brown-out detect reset * 1: Previous reset source is from Brown-out detect reset */ #define SYS_IS_BOD_RST() (SYS->RSTSRC & SYS_RSTSRC_RSTS_BOD_Msk) /** * @brief This macro get previous reset source is from Low-Voltage-Reset. * @return 0: Previous reset source is not from CPU reset * 1: Previous reset source is from CPU reset */ #define SYS_IS_CPU_RST() (SYS->RSTSRC & SYS_RSTSRC_RSTS_CPU_Msk) /** * @brief This macro get previous reset source is from Power-on Reset. * @return 0: Previous reset source is not from Low-Voltage-Reset * 1: Previous reset source is from Low-Voltage-Reset */ #define SYS_IS_POR_RST() (SYS->RSTSRC & SYS_RSTSRC_RSTS_POR_Msk) /** * @brief This macro get previous reset source is from reset pin reset. * @return 0: Previous reset source is not from Power-on Reset * 1: Previous reset source is from Power-on Reset */ #define SYS_IS_RSTPIN_RST() (SYS->RSTSRC & SYS_RSTSRC_RSTS_RESET_Msk) /** * @brief This macro get previous reset source is from system reset. * @return 0: Previous reset source is not from reset pin reset * 1: Previous reset source is from reset pin reset */ #define SYS_IS_SYSTEM_RST() (SYS->RSTSRC & SYS_RSTSRC_RSTS_MCU_Msk) /** * @brief This macro get previous reset source is from window watch dog reset. * @return 0: Previous reset source is not from reset system reset * 1: Previous reset source is from reset system reset */ #define SYS_IS_WDT_RST() (SYS->RSTSRC & SYS_RSTSRC_RSTS_WDT_Msk) /** * @brief This macro disable Low-Voltage-Reset function. * @return None */ #define SYS_DISABLE_LVR() (SYS->BODCR &= ~SYS_BODCR_LVR_EN_Msk) /** * @brief This macro enable Low-Voltage-Reset function. * @return None */ #define SYS_ENABLE_LVR() (SYS->BODCR |= SYS_BODCR_LVR_EN_Msk) /** * @brief This macro disable Power-on Reset function. * @return None */ #define SYS_DISABLE_POR() (SYS->PORCR = 0x5AA5) /** * @brief This macro enable Power-on Reset function. * @return None */ #define SYS_ENABLE_POR() (SYS->PORCR = 0) /** * @brief This macro clear reset source flag. * @param u32RstSrc is reset source. * @return None */ #define SYS_CLEAR_RST_SOURCE(u32RstSrc) (SYS->RSTSRC | u32RstSrc ) /** * @brief This function enable register write-protection function * @return None * @details To lock the protected register to forbid write access */ static __INLINE void SYS_LockReg(void) { SYS->REGWRPROT = 0; } /** * @brief This function disable register write-protection function * @return None * @details To unlock the protected register to allow write access */ static __INLINE void SYS_UnlockReg(void) { while(SYS->REGWRPROT != SYS_REGWRPROT_REGPROTDIS_Msk) { SYS->REGWRPROT = 0x59; SYS->REGWRPROT = 0x16; SYS->REGWRPROT = 0x88; } } void SYS_ClearResetSrc(uint32_t u32Src); uint32_t SYS_GetBODStatus(void); uint32_t SYS_GetResetSrc(void); uint32_t SYS_IsRegLocked(void); uint32_t SYS_ReadPDID(void); void SYS_ResetChip(void); void SYS_ResetCPU(void); void SYS_ResetModule(uint32_t u32ModuleIndex); void SYS_EnableBOD(int32_t i32Mode, uint32_t u32BODLevel); void SYS_DisableBOD(void); /*@}*/ /* end of group M051_SYS_EXPORTED_FUNCTIONS */ /*@}*/ /* end of group M051_SYS_Driver */ /*@}*/ /* end of group M051_Device_Driver */ #ifdef __cplusplus } #endif #endif //__SYS_H__