//------------------------------------------------
// SDRAM initialization script for the ASM9260T
//------------------------------------------------

__setup_PLL()
{
	__message "Enabling PLL for CPU\n";

	// outl(1<<2, REG_SET(HW_AHBCLKCTRL0));
	__writeMemory32(0x00000004, 0x80040024, "Memory");
	// outl(1<<8, REG_SET(HW_AHBCLKCTRL1));
	__writeMemory32(0x00000100, 0x80040034, "Memory");
	// outl(3<<9, REG_SET(HW_AHBCLKCTRL0));
	__writeMemory32(0x00000600, 0x80040024, "Memory");
	// outl(inl(HW_PDRUNCFG)&0xFFFFFFFA, HW_PDRUNCFG);
	__writeMemory32(0x00000770, 0x80040238, "Memory");
	// outl(2, HW_CPUCLKDIV);
	__writeMemory32(0x00000002, 0x8004017C, "Memory");
	// outl(2, HW_SYSAHBCLKDIV);
	__writeMemory32(0x00000002, 0x80040180, "Memory");
	// outl(480, HW_SYSPLLCTRL);
	__writeMemory32(0x000001E0, 0x80040100, "Memory");
	__delay(50);
	// outl(1, HW_MAINCLKSEL);
	__writeMemory32(0x00000001, 0x80040120, "Memory");
	// outl(0, HW_MAINCLKUEN);
	__writeMemory32(0x00000000, 0x80040124, "Memory");
	// outl(1, HW_MAINCLKUEN);
	__writeMemory32(0x00000001, 0x80040124, "Memory");
}

__setup_SDRAM()
{
	__message "Enabling on-chip SDRAM\n";

	// outl((1<<6), REG_SET(HW_AHBCLKCTRL0));
	__writeMemory32(0x00000040, 0x80040024, "Memory");
	// outl(0x00001188, HW_EMI_SCONR);
	__writeMemory32(0x00001188, 0x80700000, "Memory");
	// outl(0x000a0500, HW_EMI_CTRL);
	__writeMemory32(0x000a0500, 0x8004034c, "Memory");
	// outl(0x20000000, HW_EMI_SCSLR2_LOW);
	__writeMemory32(0x20000000, 0x8070001c, "Memory");
	// outl(0x0000000c, HW_EMI_SMSKR2);
	__writeMemory32(0x0000000c, 0x8070005c, "Memory");
	// outl(0x024996d9, HW_EMI_STMG0R);
	__writeMemory32(0x024996d9, 0x80700004, "Memory");
	// outl(0x00542b4f, HW_EMI_SMTMGR_SET0);
	__writeMemory32(0x00542b4f, 0x80700094, "Memory");
	// outl(0x00003288, HW_EMI_SCTLR);
	__writeMemory32(0x00003288, 0x8070000c, "Memory");
}

execUserPreload()
{   
	__message "------- Prepare for debug ASM9260T -------";
	__setup_PLL();
	__setup_SDRAM();
}