Commit Graph

75 Commits

Author SHA1 Message Date
Z8MAN8 f5156774b2 bsp: cvitek: Canonically rename some macro definitions
Analysis: Some macro definition names are not standardized
and lack prefixes.

Solution: Add BSP_ prefix to GPIO_IRQ_BASE SYS_GPIO_IRQ_BASE
PLIC_PHY_ADDR TIMER_CLK_FREQ UART_IRQ_BASE I2C_IRQ_BASE.

Signed-off-by: Shicheng Chu <1468559561@qq.com>
2024-08-20 09:52:18 +08:00
Chen Wang deb35d3fb3 bsp: cvitek: SConstruct: optimize drivers_path_prefix
For bsp/cvitek, all drivers related files are moved to the directory
bsp/cvitek/drivers, so the drivers_path_prefix processing in the
SConstruct of the three bsp projects can be simplified.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-08-12 16:43:56 +08:00
Z8MAN8 b6c26d4537 bsp: cvitek: fix c906_little IRQ_MAX_NR error num
Analysis: The IRQ_MAX_NR value of c906_little is wrong.
interrupt.h relies on IRQ_MAX_NR defined in rtconfig.h but
does not explicitly include this header file.

Solution: Change IRQ_MAX_NR to the correct value 61 in
the datasheet. Explicitly include rtconfig.h in interrupt.h.

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-08-07 11:35:27 +08:00
Z8MAN8 bce592e949 bsp: cvitek: fix cv18xx_risc-v IRQ_MAX_NR error num
Analysis: The IRQ_MAX_NR value of cv18xx_risc-v is wrong.
The wrong IRQ_MAX_NR will cause the install of an interrupt
number larger than its value to fail.

Solution: Change IRQ_MAX_NR to the correct value 101 in
the datasheet.

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-08-07 11:35:27 +08:00
Z8MAN8 dc95efe17c bsp: cvitek: add support for RTCSYS_SARADC
Cvitek adc dirver only supports one adc controller now,
but the other adc controller RTCSYS_SARADC is missing.

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-08-07 11:15:37 +08:00
Shell 148e5774c9 bsp: enable KERNEL_REMAP for cvitek platform
Changes:

- board.c: add static assert for KERNEL_VADDR_START to check if it's valid
- board.h: updated deafult KERNEL_VADDR_START for standard version
- config bsp for v5.2.0 smart requirements
- kconfig: update bsp Kconfig for remap kernel

Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9229
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-29 20:18:19 +08:00
Shell cfa3ecfa9e bsp: cvitek/c906B: feat: add config of bootfs
To support more choice on bootfs. romfs, cromfs are now supported on
risc_v_big platform.

Changes:
- added mount operations under port
- added prototypes for cromfs init APIs

Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9229
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-29 20:16:54 +08:00
Z8MAN8 a1b01ee865 bsp: cvitek: fix cv18xx_aarch64 mnt init blocking
The aarch64 core of duo on the master cannot enter the
console interface. It can only print the RT flag and hold it.

Analysis: The latest commit that can work is ae6a328 ("Add
psoc62, 61 config"). This phenomenon will occur after adding
754c59a ("[Feature] DFS mount auto by kernel parameters").
The specific reason is that when aarch bsp enables the device
tree, the current u-boot will pass in bootargs, which contains
"root=/dev/mmcblk0p2 rootwait rw", which means that the
kernel is required to wait until the rootfs in /dev/mmcblk0p2
loaded successfully. However, the current aarch64 bsp default
does not implement sdmmc device mounting, causing the
 kernel file system mounting module (rootfs_mnt_init() of
components/drivers/core/mnt.c) to enter an infinite loop waiting.

Solution: At present, we do not plan to modify the startup
parameters of u-boot. The temporary solution adopted is to
create a pseudo /dev/mmcblk0p2 device during the board
initialization process, and then cancel the pseudo device
after mnt is completed. This allows the kernel boot to be
completed successfully.

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-25 21:35:48 +08:00
Bernard Xiong 30f995dfb4
Merge pull request #9221 from Z8MAN8/cvitek_arm_uart
bsp: cvitek: add missing soc type for aarch64
2024-07-25 18:58:34 +08:00
Bernard Xiong 660f3aa205
Merge pull request #9247 from Z8MAN8/cvitek_arm_board_init
bsp: cviteK: update board init for aarch64
2024-07-25 09:11:05 +08:00
Chen Wang c8914c7f2b bsp: cvitek: fixed stacksize issue
In the original Sconstruct script, `GetDepend('__STACKSIZE__')`
is placed before the call to `PrepareBuilding()`, which causes
the value of `GetDepend('__STACKSIZE__')` to always be False,
and the value of `__STACKSIZE__` in `link_stacksize.lds` will
not be updated.

Solution: move the call if `PrepareBuilding()` ahead.

Also sync and update the .config and rtconfig.h, plus the
link_stacksize.lds.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-24 23:18:25 +08:00
Z8MAN8 84eea6c654 bsp: cviteK: update board init for aarch64
When compiling CV18xx_arch64, have a error:
can not find "rt_fdt_commit_memregion_early"

Analysis: b785ef9 ("[libcpu][aarch64]memory setup using memblock ")
no longer support  "rt_fdt_commit_memregion_early", become use
"rt_memblock_reserve_memory"

Solution: Refer to the bsp/qemu-virt64-aarch64/drivers/board.c
delete "rt_fdt_commit_memregion_early"

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-24 19:44:52 +08:00
Z8MAN8 4c2fe22cbe bsp: cvitek: add missing soc type for aarch64
When compiling CV18xx_arch64, there are the following errors:
1. missing soc type for aarch64
2. uart device objects defined but not used

Analysis: a63c07f ("bsp: cvitek: new design for pinmux") and
114e143("bsp:cvitek: add pinmux for uart"), CV18xx_arch64 is not
considered.

Solution: Refer to the cv18xx_riscv format to add the corresponding
chip type SOC_Type_SG2002, as well as the corresponding macro
for the serial port pins and interrupts

Signed-off-by: Shicheng Chu <1468559561@qq.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-24 19:29:46 +08:00
Bernard Xiong 8dc166b16c
Merge pull request #9242 from heyuanjie87/hyj724
[bsp/cvitek]添加ioremap兼容定义以适应smart运行
2024-07-24 13:36:11 +08:00
heyuanjie87 5b82841748 [feat]添加ioremap兼容定义以适应smart运行 2024-07-24 12:28:50 +08:00
Chen Wang 04cad7f9c6 bsp: cvitek: improve documentation
Currently, the documents under bsp/cvitek are a bit
messy. There are currently four readme files:

- bsp/cvitek/README.md (Chinese)
- bsp/cvitek/c906_little/README.md (Chinese/English)
- bsp/cvitek/cv18xx_aarch64/README.md (Chinese)
- bsp/cvitek/cv18xx_risc-v/README.md (Chinese/English)

Regarding the working mode of the big + small cores, it
is meaningless to describe the small core alone, or the
large core alone. This can also be seen in the existing
files. The readme of the small core will also introduce
the programming of the large core, and vice versa.

Considering that the official default mode is
C906B + C906L. ARM large core can be treataed as a
special case. So the document structure is modified as
follows:
- Remove `bsp/cvitek/c906_little/README.md` and
  `bsp/cvitek/cv18xx_risc-v/README.md`, merge them all
  into `bsp/cvitek/README.md`
- Add a link to `bsp/cvitek/cv18xx_aarch64/README.md`
  in `bsp/cvitek/README.md`

FIXME: The modified document does not provide English
version. Is it really necessary?

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-22 22:54:56 +08:00
Z8MAN8 78f3ebfb33 [bsp][cvitek] 修复 cv18xx_aarch64 gpio 驱动相关宏配置 2024-07-21 17:37:56 +08:00
Z8MAN8 2a3bb2bf95 [bsp][cvitek]: 将adc wdt驱动的局部函数移至源文件 2024-07-21 17:37:09 +08:00
Chen Wang 7c1d205a4e bsp: cvitek: switch to device init function for some drivers
Some drivers use INIT_BOARD_EXPORT, it is not necessary,
it is enough to use INIT_DEVICE_EXPORT for genearl drivers.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-18 21:35:35 +08:00
Bernard Xiong a974cde8f9
Merge pull request #9201 from unicornx/dev-wdt-bugfix
bsp: cvitek:  accuulated bugfixes for wdt driver
2024-07-17 22:26:05 +08:00
Bernard Xiong a2f4e120c3
Merge pull request #9200 from unicornx/dev-spi-new
bsp: cvitek: re-wrote spi driver
2024-07-17 22:25:26 +08:00
Bernard Xiong 4e630fed08
Merge pull request #9199 from unicornx/dev-i2c-new
bsp: cvitek: re-wrote i2c driver
2024-07-17 22:24:24 +08:00
Chen Wang 1bcf232d12 bsp: cvitek: fix the wdt timeout unit problem
See `components/drivers/include/drivers/watchdog.h`

maco definition of
RT_DEVICE_CTRL_WDT_GET_TIMEOUT
RT_DEVICE_CTRL_WDT_SET_TIMEOUT
RT_DEVICE_CTRL_WDT_GET_TIMELEFT

The wdt timeout time unit is defined as seconds in the API, but
the code incorrectly uses ms.

Correct this and comply with the API definition.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
2024-07-17 16:56:07 +08:00
flyingcys 1ef2afbc93 bsp: cvitek: re-wrote spi driver
Rewrote the spi driver.

Reuse the driver code from https://github.com/sophgo/cvi_alios_open,
which is Apache 2.0 licenced.

Signed-off-by: flyingcys <flyingcys@163.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-17 11:52:27 +08:00
Shell f6f570df74
Merge branch 'master' into shell/rv64-tick 2024-07-17 09:39:54 +08:00
Chen Wang 2d5eb2669f bsp: cvitek: remove warning when building wdt driver
```
./bsp/cvitek/drivers/drv_wdt.c: In function '_wdt_control':
warning: assignment to 'void *' from 'unsigned int' makes pointer
from integer without a cast [-Wint-conversion]
  119 |         wdt_device->parent.user_data = (rt_uint32_t)(*(rt_uint32_t *)arg);
      |                                      ^
warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
  122 |         *(rt_uint32_t *)arg = (rt_uint32_t)wdt_device->parent.user_data;
      |                               ^
```

Rootcasue: It's not portable to store integar in a pointer.

Solution: use global _wdt_dev to store the timeout value.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-17 09:05:26 +08:00
flyingcys dda79ad6bc bsp: cvitek: re-wrote i2c driver
Optimize the original i2c driver code.

Signed-off-by: flyingcys <flyingcys@163.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-17 08:19:03 +08:00
Chen Wang d8294de640 bsp:cvitek: add pinmux for adc
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 2c85bcb463 bsp:cvitek: add pinmux for spi
Board level pin available info:

duo & duo256:

NAME    SPI         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP6     SPI2_SCK    PWR_GPIO[23]    SD1_CLK__SPI2_SCK
GP7     SPI2_SDO    PWR_GPIO[22]    SD1_CMD__SPI2_SDO
GP8     SPI2_SDI    PWR_GPIO[21]    SD1_D0__SPI2_SDI
GP9     SPI2_CS_X   PWR_GPIO[18]    SD1_D3__SPI2_CS_X

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 51825a5b5c bsp:cvitek: add pinmux for pwm
Board level pin available info is summarized and list here for memo:

Duo:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP2     PWM10       PWR_GPIO[26]    SD1_GPIO1__PWM_10
GP3     PWM11       PWR_GPIO[25]    SD1_GPIO0__PWM_11

Duo256:

NAME    PWM         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
PWM-1
GP9     PWM4        PWR_GPIO[18]    SD1_D3__PWM_4
GP12    PWM4        XGPIOA[16]      UART0_TX__PWM_4

GP4     PWM5        PWR_GPIO[19]    SD1_D2__PWM_5
GP13    PWM5        XGPIOA[17]      UART0_RX__PWM_5

GP3     PWM6        XGPIOA[18]      JTAG_CPU_TCK__PWM_6
GP5     PWM6        PWR_GPIO[20]    SD1_D1__PWM_6

GP2     PWM7        XGPIOA[19]      JTAG_CPU_TMS__PWM_7
GP8     PMW7        PWR_GPIO[21]    SD1_D0__PWM_7

PWM-2
GP7     PWM8        PWR_GPIO[22]    SD1_CMD__PWM_8
GP6     PWM9        PWR_GPIO[23]    SD1_CLK__PWM_9
GP10    PWM10       XGPIOC[14]      PAD_MIPI_TXM1__PWM_10
GP11    PWM11       XGPIOC[15]      PAD_MIPI_TXP1__PWM_11

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang 114e143d56 bsp:cvitek: add pinmux for uart
Board level UART pinmux summary, following capability
should be controlled by pinname whitelist.

Duo:

NAME    UART        CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP13    UART0_RX    XGPIOA[17]      UART0_RX__UART0_RX
GP12    UART0_TX    XGPIOA[16]      UART0_TX__UART0_TX

GP1     UART1_RX    XGPIOA[29]      IIC0_SDA__UART1_RX
GP13    UART1_RX    XGPIOA[17]      UART0_RX__UART1_RX
GP0     UART1_TX    XGPIOA[28]      IIC0_SCL__UART1_TX
GP12    UART1_TX    XGPIOA[16]      UART0_TX__UART1_TX

GP1     UART2_RX    XGPIOA[29]      IIC0_SDA__UART2_RX
GP5     UART2_RX    PWR_GPIO[20]    SD1_D1__UART2_RX
GP0     UART2_TX    XGPIOA[28]      IIC0_SCL__UART2_TX
GP4     UART2_TX    PWR_GPIO[19]    SD1_D2__UART2_TX

GP5     UART3_RX    PWR_GPIO[20]    SD1_D1__UART3_RX
GP4     UART3_TX    PWR_GPIO[19]    SD1_D2__UART3_TX

GP3     UART4_RX    PWR_GPIO[25]    SD1_GPIO0__UART4_RX
GP2     UART4_TX    PWR_GPIO[26]    SD1_GPIO1__UART4_TX

Duo 256m:

NAME    UART        CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP13    UART0_RX    XGPIOA[17]      UART0_RX__UART0_RX
GP12    UART0_TX    XGPIOA[16]      UART0_TX__UART0_TX

GP1     UART1_RX    XGPIOA[29]      IIC0_SDA__UART1_RX
GP3     UART1_RX    XGPIOA[18]      JTAG_CPU_TCK__UART1_RX
GP13    UART1_RX    XGPIOA[17]      UART0_RX__UART1_RX
GP0     UART1_TX    XGPIOA[28]      IIC0_SCL__UART1_TX
GP2     UART1_TX    XGPIOA[19]      JTAG_CPU_TMS__UART1_TX
GP12    UART1_TX    XGPIOA[16]      UART0_TX__UART1_TX

GP1     UART2_RX    XGPIOA[29]      IIC0_SDA__UART2_RX
GP5     UART2_RX    PWR_GPIO[20]    SD1_D1__UART2_RX
GP0     UART2_TX    XGPIOA[28]      IIC0_SCL__UART2_TX
GP4     UART2_TX    PWR_GPIO[19]    SD1_D2__UART2_TX

GP5     UART3_RX    PWR_GPIO[20]    SD1_D1__UART3_RX
GP4     UART3_TX    PWR_GPIO[19]    SD1_D2__UART3_TX

Note: this patch also update the .config and rtconfig.h
because this patch modify some configuration items's name,
for example: RT_USIMG_UART0 -> BSP_USING_UART0.

FIXME: only handle RISC-V related, no ARM.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang e1eb3d3217 bsp:cvitek: add pinmux for i2c
Based on new pinmux framework, add configuration for uart.

Board level pin available info is summarized and should be
controlled by pin whitelist.

Duo

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo256m

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S(Note, we have not supported duo S, just list for memo)

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 18:29:17 +08:00
Chen Wang d8d0af9143 bsp:cvitek: add calibration for adc
The ADC controller needs to be calibrated during the initialization
phase, otherwise the measured voltage value will be inaccurate.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-16 11:47:22 +08:00
Chen Wang a63c07fd75 bsp: cvitek: new design for pinmux
In the new design, we require the user to manually enter the
PinName (as a string) in menuconfig instead of being given
menu items to select.

The original method will lead to too many menu item-related
macros being defined in the code, causing ifdef and other
codes scatter everywhere in the driver code, which is
inconvenient to maintain.

The new design adds a pinmux driver module to manage the
multiplexing of pins. This patch provides this driver module.

P.S., the reason why users are allowed to specify pinname
in a string instead of the pin number is mainly because
the technical manual provided by the SOC manufacturer
does not have numbers for some pins, only names.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
2024-07-16 11:37:23 +08:00
Chen Wang 80668e0ba2 bsp:cvitek: revert add i2c pinmux config for c906
The contents of the SOC type part in the Kconfig configuration
are retained, and other parts related to I2C pin multiplexing
selection have been rolled back.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Yuanjie He <943313837@qq.com>
Reviewed-by: Shell <smokewood@qq.com>
2024-07-16 11:37:23 +08:00
Shell 65ffe4e13e [libcpu/rv64] feat: unify tick.c
The changes unify the tick.c implementations for all risc-v64
architectures, leveraging the CPUTIME feature. This refactoring was
necessary to streamline the codebase, and ensure consistent timer
handling across different platforms.

Changes:
- Updated `Kconfig` in `bsp/cvitek/cv18xx_risc-v` to fix formatting issues.
- Updated .config for BSPs to update `CPUTIME_TIMER_FREQ`
- Updated header of for API `riscv_cputime_init`
- Initialized riscv timer on `rt_hw_tick_init`
- Refactored `tick.c` and `tick.h` in `libcpu/risc-v/t-head/c906` and `libcpu/risc-v/virt64`:
  - Replaced direct use of `rdtime` with `clock_cpu_gettime`.
  - Removed redundant timer frequency definitions.
  - Added static assertions to check the value of `CPUTIME_TIMER_FREQ`.
  - Initialized `tick_cycles` based on `CPUTIME_TIMER_FREQ`.
  - Integrated `ktime` support for tick initialization.

Signed-off-by: Shell <smokewood@qq.com>
Reviewed-on: https://github.com/RT-Thread/rt-thread/pull/9164
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
2024-07-15 12:06:39 +08:00
heyuanjie87 6180dabab3
[bsp/cvitek]将eth驱动中地址类型改为指针以适应ioremap (#9137)
ioremap后地址可能超32位
2024-07-11 10:28:02 +08:00
Shell 66ff62413e document: add ref to gpio pinout 2024-07-08 22:09:35 +08:00
heyuanjie87 776764c4d6 [bsp/cvitek/eth]解决编译警告 2024-07-04 00:33:32 +08:00
heyuanjie87 017c31a062 [bsp/cvitek]解决eth编译报错 2024-07-02 22:54:58 +08:00
Z8MAN8 071b3d9244 [bsp]: fix bugs of cvitek and pico drivers 2024-06-26 20:28:29 +08:00
LTreeshu f687ace6ef
bsp/cvitek update readme 2024-06-26 20:22:05 +08:00
heyuanjie87 7ae476dcf2
[bsp/Cvitek]去除shell脚本中的'\r' (#9097)
* [bsp/cvitek]去除脚本中'\r'

* [bsp/cvitek]删除脚本中的'\r'

* Update combine-fip.sh
2024-06-26 01:21:18 +08:00
latercomer fe3c4d456e bsp中option env语句替换为新语句,并同步更新了source "$xxx"语句 2024-06-20 14:40:42 +08:00
Shell 65c9947225
[libcpu] rv64: support for ARCH_REMAP_KERNEL (#9067)
* [libcpu] support for ARCH_REMAP_KERNEL

These changes introduce support for the ARCH_REMAP_KERNEL configuration,
which isolates kernel space in high virtual address regions. This feature
is necessary to enhance memory protection and management by segregating
user and kernel spaces more effectively.

Changes:
- Updated conditional macros to check for ARCH_REMAP_KERNEL instead of
  ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new
  configuration option.
- Modified qemu-virt64-riscv Kconfig and SConstruct files to include and
  utilize ARCH_REMAP_KERNEL.
- Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv.
- Updated rtconfig.py to use a more flexible execution path setup.
- Enhanced user address space definitions in `lwp_arch.h` to support the
  new virtual address mappings.
- Adjusted kernel memory initialization and mapping logic in `c906/mmu.c`
  and `virt64/mmu.c` to account for high virtual address regions.
- Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures.
- Enhanced memory setup functions to support new mapping scheme, including
  updates to early page table setup and address relocation logic.

These modifications ensure that the system can utilize high memory
addresses for the kernel, improving memory isolation and system stability.

Signed-off-by: Shell <smokewood@qq.com>

* fixup: CI run failed

* bsp: default config without using smart

* fixup: static checks

* restore rt_hw_mmu_kernel_map_init for D1

---------

Signed-off-by: Shell <smokewood@qq.com>
2024-06-18 11:15:59 +08:00
flyingcys 09a0e4c5f8 update gpio driver 2024-05-27 11:26:09 +08:00
Chen Wang 5dd3b7427a
Accumulated patchsets for bsp/cvitek (#8968)
* bsp: cvitek: kconfig: add wdt for cv18xx_riscv

Add Watchdog timer in Kconfig.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* drv: cvitek: remove using macro from source file

Building of source file should be controlled by SConscript,
but not in source file itself.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: kconfig: add i2c for cv18xx_riscv

Add I2C in Kconfig for c906B.

Note, the IRQ# is different from that of c906L.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: kconfig: add rtc for cv18xx_riscv

Add RTC in Kconfig for c906B.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: fix channel issue for pwm driver

The original code confuses the concepts of controllers and channels.
Fixed it and do some code cleanup.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: add i2c pinmux config for cv18xx_riscv

Pinmux in driver code is controlled by SOC type, bcos driver
code should be general and support all pins defined by SoC.

Pinmux configuration in Kconfig is controlled by BOARD type,
bcos when we operate on board, it does not expose all chip-level
pin signals and we can only use part of them.

Following is I2C signals exported by duo family. Details see
https://milkv.io/docs/duo/overview.

Note: we have not added support for duo-S.

Duo
===

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo 256m
========

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S
=====

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>

* bsp:cvitek: remove using macro from source file for i2c

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: unify menu message text for i2c as other drivers

Other dirvers has no extra word "HW".

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: add i2c pinmux config for c906_little

Porting what we have done in commit "bsp:cvitek: add i2c pinmux config
for cv18xx_riscv" to c906_little.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

---------

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>
Co-authored-by: flyingcys <flyingcys@163.com>
2024-05-22 08:19:07 +08:00
flyingcys ec8ff90a4a
[bsp/cvitek]update gpio driver (#8946)
update gpio driver
2024-05-13 18:20:57 -04:00
flyingcys 7890e2cb14
[bsp/cvitek]add eth driver 2024-04-29 17:47:50 -04:00
flyingcys aee6048a53
[bsp/cvitek]update cvitek sdhci drvier (#8874)
update cvitek sdhci drvier
2024-04-28 23:07:42 +08:00