12 Commits

Author SHA1 Message Date
Man, Jianting (Meco)
99bdf978d7
[rtdef] use lower-case to define attributes (#6728)
* [rtdef] rename RT_WEAK attribute as rt_weak

* [rtdef] rename RT_USED attribute as rt_used

* [rtdef] rename RT_SECTION attribute as rt_section

* [rtdef] rename ALIGN attribute as rt_align

* [legacy] add RT_USED ALIGN RT_SECTION RT_WEAK as legacy support
2022-12-11 13:12:03 -05:00
guo
ecf2d82159
sync branch rt-smart. (#6641)
* Synchronize the code of the rt mart branch to the master branch.
  * TTY device
  * Add lwP code from rt-smart
  * Add vnode in DFS, but DFS will be re-write for rt-smart
  * There are three libcpu for rt-smart:
    * arm/cortex-a, arm/aarch64
    * riscv64

Co-authored-by: Rbb666 <zhangbingru@rt-thread.com>
Co-authored-by: zhkag <zhkag@foxmail.com>
2022-12-03 12:07:44 +08:00
Meco Man
50f041f5c2 [Scons] 将GCC判断条件改为列表方式,方便后续增加新的编译工具链 2022-06-09 07:01:59 +08:00
Meco Man
1997113fbc FINSH_USING_BUILT_IN_COMMANDS改MSH_USING_BUILT_IN_COMMANDS 2021-08-28 16:48:08 -04:00
Meco Man
29828dc94f [finsh] finsh组件可以选择是否包含内置命令 2021-08-25 19:48:15 -04:00
yangjie
75e4c9dd0a [bsp]update GPL license to Apache-2.0, and format files 2021-04-09 10:52:34 +08:00
Meco Man
dfa72b980d [allwinner_tina] manual & auto formatted 2021-03-29 07:11:44 +08:00
Howard Su
b22b7cbdfe Cleanup Interrupt for F1S
Use structure to handle the registers access, which simplified the logic
2021-03-02 14:00:26 +08:00
neal
257d21c0bd [bsp][at91sam9g45]Fix build bugs which caused by the change of libcpu/arm/arm926/start_gcc.S 2019-05-13 18:36:31 -07:00
shaojinchun
a8953e9211 add lwp support 2018-12-10 16:44:48 +08:00
liruncong
e8e9ca8a25 [bsp/allwinner_tina]rt_hw_interrupt_install函数name参数增加const限定 2018-12-05 20:43:44 +08:00
uestczyh222
9bf2a755e0 [Bsp][New BSP]New bsp for allwinner tina 2018-02-09 15:20:38 +08:00