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9806 Commits

Author SHA1 Message Date
Bernard Xiong c1a3de7b8a
Merge pull request #3478 from SummerLife/optimize_uart 
[stm32/driver] optimize uart driver
 2020-03-26 22:04:45 +08:00
qz721 a49ddaef96
修复USB不能正常识别composite设备的bug 2020-03-26 16:24:10 +08:00
Bernard Xiong 130550d5a6
Merge pull request #3480 from leeehui/master 
fix return type error of rt_strcasecmp: rt_uint32_t to rt_int32_t
 2020-03-26 13:56:23 +08:00
lihui d0ebdc54d4 fix return type error of rt_strcasecmp: rt_uint32_t to rt_int32_t 
Signed-off-by: lihui <leehui_hrbeu71102@163.com>
 2020-03-24 18:59:31 +08:00
SummerGift e5c1183350 [optimize] stm32 uart driver 2020-03-23 15:44:54 +08:00
Bernard Xiong 5ddb0d51c0
Merge pull request #3475 from armink/fix_eclipse 
[tools] update eclipse tools version number.
 2020-03-23 09:32:44 +08:00
armink 32b4c0f293 [tools] update eclipse tools version number. 2020-03-23 08:50:08 +08:00
Bernard Xiong f91b9e7670
Merge pull request #3431 from tanglj86/master 
[bsp/stm32] add support for NUCLEO-F410RB board;
 2020-03-22 21:27:48 +08:00
Bernard Xiong 9388434043
Merge pull request #3452 from supperthomas/aa 
[bsp/stm32] add the bsp of stm32l496zg-nucleo board
 2020-03-22 21:27:36 +08:00
Bernard Xiong a8cd463347
Merge pull request #3470 from Sunwancn/fix-adc-channel-bug 
[drv_adc.c]Fixed ADC channel configuration bug for SMT32F0/L0/H7
 2020-03-22 21:25:56 +08:00
Bernard Xiong 2e42ad8279
Merge pull request #3442 from redocCheng/master 
drv_flash_f1.c support stm32f103vg
 2020-03-22 21:24:47 +08:00
Bernard Xiong 88eafe77e9
Merge pull request #3466 from gyd0317/dev 
add STM32L1 HAL DRIVER
 2020-03-22 21:24:11 +08:00
Bernard Xiong d1ba07a47b
Merge pull request #3474 from Guozhanxin/rtt_master 
修复 scons --target=eclipse 时，部分带值宏出错的问题
 2020-03-22 21:23:39 +08:00
guozhanxin c1b35a48a5 修复 scons --target=eclipse 时，部分带值宏出错的问题 2020-03-22 09:13:50 +08:00
David Lin 985a70ab15
Update hub.c 2020-03-21 20:56:31 +08:00
David Lin 10e0f28754
Update cdc_vcom.c 2020-03-21 20:54:13 +08:00
David Lin 3679dfa07e
Update ecm.c 2020-03-21 20:42:55 +08:00
Bernard Xiong 30a9ef64c1
Merge pull request #3427 from DavidLin1577/patch-2 
Fixed typos in Kconfig
 2020-03-21 11:45:40 +08:00
tanglj86 9554792275 [bsp/stm32] add bsp stm32f410-st-nucleo in travis file. 2020-03-21 08:51:18 +08:00
Sunwancn d211a27aff [drv_adc.c]Fix ADC channel Configuration bug for SMT32F0/L0/H7 2020-03-20 09:05:45 +08:00
Bernard Xiong 9c544e069c
Merge pull request #3468 from bigmagic123/aarch64_cache_api 
Aarch64 cache api
 2020-03-19 02:11:34 +08:00
supperthomas b094cf14df Merge branch 'aa' of github.com:supperthomas/rt-thread into aa 2020-03-18 22:49:28 +08:00
supperthomas bd85518665 Merge branch 'master' of github.com:supperthomas/rt-thread into back 2020-03-18 22:43:04 +08:00
gyd0317 588bda5553 change gcc statup files 2020-03-18 21:42:13 +08:00
Bernard Xiong f70d14ef93
Merge pull request #3467 from luhuadong/develop 
fixed a typo
 2020-03-18 20:36:26 +08:00
tanglj86 816a714de1 fix some format issues; 2020-03-18 18:51:22 +08:00
redoc 4b46aafa75
Update drv_flash_f1.c 
1、【修改】返回值。
 2020-03-18 15:38:10 +08:00
redoc 5a5f262649
Update drv_flash_f1.c 
调整stm32_flash_erase的返回值
 2020-03-18 15:31:20 +08:00
redoc bac9410d7d
Update drv_flash_f1.c 
1、【修改】运算方式，更加简洁易懂；
2、【修正】代码格式 tab、 LOG_D；
3、【增加】返回值；
4、【去除】bank1_flag和bank2_flag，改用bank_size判定。
 2020-03-18 15:05:12 +08:00
bigmagic e6600dbf10 remove cortex-a53 from libcpu/arm 2020-03-18 14:22:37 +08:00
bigmagic f6a13de08f add raspi3-64 spi driver 2020-03-18 14:22:15 +08:00
bigmagic ba482c3346 add raspi3-64 i2c driver 2020-03-18 14:22:05 +08:00
bigmagic 6416a18554 add cache option api 2020-03-18 14:21:11 +08:00
luhuadong e6417379ca fixed a typo 2020-03-18 13:47:50 +08:00
Bernard Xiong ed0637fef4
Merge pull request #3463 from sheltonyu/develop 
1. modify at32_msp default configuration 2. add hwtimer driver and fi…
 2020-03-17 23:23:53 +08:00
Bernard Xiong 388e714ef9
Merge pull request #3465 from SummerLife/replace_introduce_picture 
[readme/update] readme architecture figures
 2020-03-17 23:12:15 +08:00
unknown db23a69f49 dd STM32L1 HAL DRIVER 2020-03-17 22:11:13 +08:00
SummerGift f8ad59be56 [update] architecture figures 2020-03-17 18:30:13 +08:00
sheltonyu ce4ac6315d 1. modify at32_msp default configuration 2. add hwtimer driver and fix up some driver errors 3. update related files 2020-03-17 10:10:43 +08:00
supperthomas 56a2e831f4 Merge branch 'master' of github.com:supperthomas/rt-thread 2020-03-16 23:59:08 +08:00
Bernard Xiong 41b3ffc497
Merge pull request #3461 from andychen329/patch-2 
update readme ：Fixed spelling mistakes
 2020-03-16 21:31:39 +08:00
Bernard Xiong beda0899f5
Merge pull request #3397 from luhuadong/develop 
[Sensor] Support custom commands for rt_sensor_control
 2020-03-16 21:28:30 +08:00
Bernard Xiong 19a7e5fd2c
Merge pull request #3450 from RT-Thread/README-patch 
[skip ci] Update README.md
 2020-03-16 21:20:31 +08:00
Bernard Xiong cc319ac1aa
Merge pull request #3458 from shawn1221/mmc-upstream-20200316 
component: sdio: fix potential ricky clock setting
 2020-03-16 21:20:09 +08:00
andychen329 96cb2579cf
update readme ：Fixed spelling mistakes 
MM32L073PF ->  MM32L373PF
 2020-03-16 18:02:10 +08:00
Bernard Xiong 822d8f4002
Merge pull request #3456 from zhao0116/spi 
spi: support slave mode and master mode runtime config
 2020-03-16 15:34:33 +08:00
Bernard Xiong 32e07e51a7
Merge pull request #3457 from cliff-cmc/msc 
Support msc mode automatic switching
 2020-03-16 15:31:35 +08:00
Shawn Lin 4c7106fa9d component: sdio: fix potential ricky clock setting 
Currently RTT mmc stack only support Highspeed mode or
blow, which means the max speed should be 52MHz according
to JEDEC spec. Two problems show here:

(1) max_data_rate = (unsigned int)-1. The value of unsigned int
depends on compilers/arch. Moreover, it makes no sense to assume
cpu addressing width with IP clock rate limit.
(1)hs_max_data_rate was set to 200MHz.

So what should BSP drivers do if 52MHz < max_data_rate < 200MHz?
Either it blindly sets a spec-violated clock rate to drive a Highspeed
card, or just adjust the clock rate internally. Both cases are
really bad for practice.

If the card claims to support Highspeed, we set the clock to not
to exceed 52MHz. Otherwise it should be set according to
card->max_data_rate parsed by ext_csd. This patch fixes it as-is,
and also simplify the code a lot.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
 2020-03-16 14:45:41 +08:00
luhuadong 7c4e70b3b3 [Sensor] Add user-commands range limitation 2020-03-16 11:03:32 +08:00
Cliff Chen 1c68bd9d3c Support msc mode automatic switching 
Signed-off-by: Cliff Chen <cliff.chen@rock-chips.com>
 2020-03-16 10:50:34 +08:00