Grissiom
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ff3ab9c0ab
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lpc43xx: add readme
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2015-01-06 10:46:32 +08:00 |
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Grissiom
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090adcf4c0
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lpc43xx: don't set the Clock again in M0 core
M0 core is always booted by the M4 core. It means that if we are running
in M0, the clock is always configured.
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2015-01-06 10:46:32 +08:00 |
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Grissiom
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21ef733251
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lpc43xx: use the RIT timer as SysTick in M0 core
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2015-01-06 10:46:31 +08:00 |
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Grissiom
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773a884a4b
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lpc43xx: move board.c into M0/M4
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2015-01-06 10:46:31 +08:00 |
|
Grissiom
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d2e4050a70
|
lpc43xx: update template.uvproj and add sct files
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2015-01-06 10:46:31 +08:00 |
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Grissiom
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959f6c695f
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lpc43xx: move the application code into its own space
|
2015-01-06 10:46:31 +08:00 |
|
Grissiom
|
5542af8b7c
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lpc43xx/driver: fix the VTOR setting
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2015-01-06 10:25:43 +08:00 |
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Grissiom
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f609a63564
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lpc43xx: add uart3 support
|
2015-01-06 10:25:43 +08:00 |
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Grissiom
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a447b5f3cf
|
lpc43xx: refactor uart drivers
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2015-01-06 10:25:43 +08:00 |
xiaonong
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d5332e2799
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bsp:fix the bug of lpc43xx uart interrupt enable in driver initialize.
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2014-11-03 23:02:36 +08:00 |
bernard
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c45f5a2490
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[Drivers] re-write serial framework.
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2014-07-18 06:45:54 +08:00 |
|
nongxiaoming
|
7b32a2bd31
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lpc43xx:add the linker script file.
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2014-07-15 15:42:22 +08:00 |
|
nongxiaoming
|
67e79c3e97
|
lpc43xx:update the startup code.
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2014-07-15 15:40:05 +08:00 |
|
nongxiaoming
|
e152b68e33
|
add the lpc43xx bsp support.
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2014-07-13 14:13:39 +08:00 |